2082results about "From solid state" patented technology

In a process for producing an oriented inorganic crystalline film, a non-monocrystalline film containing inorganic crystalline particles is formed on a substrate by a liquid phase technique using a raw-material solution which contains a raw material and an organic solvent, where the inorganic crystalline particles have a layered crystal structure and are contained in the raw material. Then, the non-monocrystalline film is crystallized by heating the non-monocrystalline film to a temperature equal to or higher than the crystallization temperature of the non-monocrystalline film so that part of the inorganic crystalline particles act as crystal nuclei.

The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.

The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.

The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.

The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.

A laser beam processing method for a semiconductor wafer having a low-dielectric insulating film formed on the front surface of a semiconductor substrate thereof, a plurality of circuits sectioned by streets into a lattice pattern, and metal patterns for testing formed partially on each street. The method includes a laser beam processing step for applying a laser beam to the positions of areas at which the metal patterns are located, and to the low-dielectric insulating film, under different processing conditions so as to remove the metal patterns and the low-dielectric insulating film without damaging the substrate and its circuits.

A method of depositing a film of a metal chalcogenide. The first of these methods includes the steps of: contacting at least one metal chalcogenide, a hydrazine compound and optionally, an elemental chalcogen, to produce a solution of a hydrazinium-based precursor of the metal chalcogenide; applying the solution of the hydrazinium-based precursor of the metal chalcogenide onto a substrate to produce a film of the precursor; and thereafter annealing the film of the precursor to remove excess hydrazine and hydrazinium chalcogenide salts to produce a metal chalcogenide film on the substrate. The second of these methods includes the steps of: contacting: at least one metal chalcogenide and a salt of an amine compound to produce an ammonium-based precursor of the metal chalcogenide; contacting the ammonium-based precursor of the metal chalcogenide and a hydrazine compound, and optionally, an elemental chalcogen, to produce a solution of a hydrazinium-based precursor of the metal chalcogenide in the hydrazine compound; applying the solution of the hydrazinium-based precursor onto a substrate to produce a film; and thereafter, annealing to produce a metal chalcogenide film. Also provided is a thin-film field-effect transistor device using the metal chalcogenides as the channel layer.

A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.

An anneal of an epitaxially grown crystalline semiconductor layer comprising a combination of group-IV elements. The layer contains at least one of the group of carbon and tin. The layer of epitaxially grown material is annealed at a temperature substantially in a range of 1,000 to 1,400 degrees Celsius for a period not to exceed 100 milliseconds within 10% of the peak temperature. The anneal is performed for example with a laser anneal or a flash lamp anneal. The limited-time anneal may improve carrier mobility of a transistor.

The present disclosure relates, generally, to a semiconductor substrate with a planarized surface comprising mixed single-crystal orientation regions and / or mixed single-crystal semiconductor material regions, where each region is electrically isolated. In accordance with one embodiment of the disclosure CMOS devices on SOI regions are manufactured on semiconductors having different orientations. According to another embodiment, an SOI device is contemplated as having a plurality of semiconductor regions having at least one of a different semiconductor material, crystalline lattice constant or lattice strain. Methods and processes for fabricating the different embodiments of the invention is also disclosed.

A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer is grown overlying the carbon-doped silicon layer to provide a starting wafer for the integrated circuit device fabrication. An integrated circuit device is fabricated on the starting wafer by the following steps. A gate electrode is formed on the starting wafer. LDD and source and drain regions are implanted in the starting wafer adjacent to the gate electrode. Indium is implanted to form halo implants adjacent to the LDD regions and underlying the gate electrode wherein the halo implants extend to an interface between the epitaxial silicon layer and the carbon-doped silicon layer wherein carbon ions in the carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by the halo implants to prevent end of range secondary defect formation.

A method for removing defects at high pressure and high temperature (HP / HT) or for relieving strain in a non-diamond crystal commences by providing a crystal, which contains defects, and a pressure medium. The crystal and the pressure medium are disposed in a high pressure cell and placed in a high pressure apparatus, for processing under reaction conditions of sufficiently high pressure and high temperature for a time adequate for one or more of removing defects or relieving strain in the single crystal.