514results about How to "Simplify manufacturing steps" patented technology

A cascaded organic electroluminescent device includes an anode and a cathode. The device also includes a plurality of organic electroluminescent units disposed between the anode and the cathode, wherein the organic electroluminescent units comprise at least a hole-transporting layer, an electron-transporting layer, and an electroluminescent zone formed between the hole-transporting layer and the electron-transporting layer wherein the physical spacing between adjacent electroluminescent zones is more than 90 nm; and a connecting unit disposed between each adjacent organic electroluminescent unit, wherein the connecting unit comprises, in sequence, an n-type doped organic layer and a p-type doped organic layer forming a transparent p-n junction structure wherein the resistivity of each of the doped layers is higher than 10 Ω-cm.

A manufacturing method of a display device having TFTs capable of high-speed operation with few variations of threshold voltage is provided, in which materials are used with high efficiency and a small number of photomasks is required. The display device of the invention comprises a gate electrode layer and a pixel electrode layer formed over an insulating surface, a gate insulating layer formed over the gate electrode layer, a crystalline semiconductor layer formed over the gate insulating layer, a semiconductor layer having one conductivity type formed in contact with the crystalline semiconductor layer, a source electrode layer and a drain electrode layer formed in contact with the semiconductor layer having one conductivity type, an insulating later formed over the source electrode layer, the drain electrode layer, and the pixel electrode layer, a first opening formed in the insulating layer to reach the source electrode layer or the drain electrode layer, a second opening formed in the gate insulating layer and the insulating layer to reach the pixel electrode layer, and a wiring layer formed in the first opening and the second opening to electrically connect the source electrode layer or the drain electrode layer to the pixel electrode layer.

A semiconductor graphene is used for a channel layer, and a metal graphene is used for electrode layers for a source, a drain, and a gate which serve as interconnections as well. An oxide is used for a gate insulating layer. The channel layer and the electrode layers are located on the same plane.

A method of manufacturing a dye-sensitized photoelectric conversion device is provided by which a dye-sensitized photoelectric conversion device being excellent in strength and durability and free of any projection, as a result of the absence of need for an end seal, can be fabricated through simple manufacturing steps. In manufacturing a dye-sensitized photoelectric conversion device which has an electrolyte between a dye-sensitized semiconductor layer and a counter electrode and which also has a first armor member provided on the outside of the dye-sensitized semiconductor layer and a second armor member provided on the outside of the counter electrode, a sealing material and the electrolyte are formed at predetermined locations of one or both of the first armor member and the second armor member, thereafter the first armor member and the second armor member, with the sealing material and the electrolyte sandwiched therebetween, are adhered to each other with the sealing material under a gas pressure of not higher than the atmospheric air pressure and not lower than the vapor pressure of the electrolyte.

The invention is constituted by a vehicular lamp characterized in a lens having a first light source, a second light source, a front light emitting face, a side end face to which the first light source is opposed, and a rear face, wherein the rear face includes a lens having pluralities of reflecting portions and transmitting portions consecutively aligned alternately in a direction of being remote from the side end face, and a reflecting face arranged on a rear side of the lens, light of the first light source is incident on the lens from the side end face of the lens, reflected by an interface of the reflecting portion, thereafter, radiated from the front light emitting face, and light of the second light source is reflected by the reflecting portion, thereafter, incident on the lens from the transmitting portion and radiated from the front light emitting face.

At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.

The invention provides a display device and a method for manufacturing thereof by increasing a material efficiently as well as simplifying steps. Also, the invention provides a technique for forming a pattern such as a wiring, that is used for forming a display device, to have a predetermined shape with an excellent controllability. The method for manufacturing a display device includes the steps of: forming a lyophobic region; selectively irradiating laser beam in the lyophobic region to form a lyophilic region; selectively discharging a composition, that contains a conductive material, in the lyophilic region to form a gate electrode layer; forming a gate insulating layer and a semiconductor layer over the gate electrode layer; discharging a composition containing a conductive material over the semiconductor layer to form a source electrode layer and a drain electrode layer; and forming a pixel electrode layer on the source or drain electrode layer.

A manufacturing method of a display device having TFTs capable of high-speed operation with few variations of threshold voltage is provided, in which materials are used with high efficiency and a small number of photomasks is required. The display device of the invention comprises a gate electrode layer and a pixel electrode layer formed over an insulating surface, a gate insulating layer formed over the gate electrode layer, a crystalline semiconductor layer formed over the gate insulating layer, a semiconductor layer having one conductivity type formed in contact with the crystalline semiconductor layer, a source electrode layer and a drain electrode layer formed in contact with the semiconductor layer having one conductivity type, an insulating later formed over the source electrode layer, the drain electrode layer, and the pixel electrode layer, a first opening formed in the insulating layer to reach the source electrode layer or the drain electrode layer, a second opening formed in the gate insulating layer and the insulating layer to reach the pixel electrode layer, and a wiring layer formed in the first opening and the second opening to electrically connect the source electrode layer or the drain electrode layer to the pixel electrode layer.

A display panel substrate according to the present invention includes at least an insulating substrate, first conductive wires formed on the insulating substrate, a piezoelectric material film formed on the first conductive wires, second conductive wires intersecting with the first conductive wires, and a protecting film for protecting the first conductive wires, the second conductive wires, and the piezoelectric material film. The insulating film is formed at least in an area in an effective display area on the insulating substrate. The piezoelectric film is formed at least at an intersection of a first conductive wire and a second conductive wire. This makes it possible to provide a display panel substrate that allows integration of a touch panel function into a display panel without causing an increase in size of the display panel.

Disclosed herein is a biosensor for measuring analyte in a fluid that comprises a substrate layer having disposed thereon at least one each of an electrode, cathode, anode, and a novel spacer material. The spacer material according to the present disclosure comprises a heat sealable organic layer that covers at least a portion of the anode and defines at least one edge of the anode, wherein the spacer material has at least one hole punched through it and defines a cavity or well for accepting chemistry. Also disclosed is a method of making such biosensors.

The invention is intended to present an insulated gate type semiconductor device that can be manufactured easily and its manufacturing method while realizing both higher withstand voltage design and lower on-resistance design. The semiconductor device comprises N+ source region 31, N+ drain region 11, P− body region 41, and N− drift region 12. By excavating part of the upper side of the semiconductor device, a gate trench 21 is formed. The gate trench 21 floating region 51 is provided beneath the gate trench 21. A further trench 35 differing in depth from the gate trench 21 may be formed, a P floating region 54 being provided beneath the trench 25.

An electric power collection / distribution ring of a rotary electric machine including: a plurality of ring shaped bus rings each of which is to be connected to one of a plurality of coils provided in the rotary electric machine, the coils each corresponding to phases of the rotary electric machine; a plurality of fixing member which are fixed to the bus rings and arranged along the circumferential direction thereof; and a plurality of connection terminals which are fixed to the bus rings and arranged along said circumferential direction, and which can be connected with one of leader line sections of the coils.

A liquid crystal display device includes: an active matrix substrate including a glass substrate; a counter substrate which is arranged to face the active matrix substrate and includes a glass substrate which is thinner than the glass substrate of the active matrix substrate; and a display medium layer which is provided between the active matrix substrate and the counter substrate. The rate at which the glass substrate of the active matrix substrate is etched by an etching solution is lower than the rate at which the glass substrate of the counter substrate is etched by the etching solution.

To solve degradation with time of a light emitting element by a new method. When the potential of an electrode of a monitor pixel is sampled and fed back to a light emitting pixel, degradation with time of a light emitting element can be corrected. In addition, when a writing period is divided into a plurality of periods during which a plurality of rows are selected, a gray scale can be expressed by a weighted light emitting period. That is to say, a light emitting device of the invention has a plurality of monitoring light emitting elements, a monitor line for monitoring changes in the potentials of electrodes of the plurality of light emitting elements, and a means for preventing, when any one of the plurality of monitoring light emitting elements is short-circuited, a current from flowing to the short-circuited monitoring light emitting element through the monitor line.

An object of the present invention is to provide a method for manufacturing a semiconductor device of which manufacturing process is simplified by improving usage rate of a material. A method for manufacturing a semiconductor device of the invention comprises the steps of: forming gate electrodes with a droplet discharge method on a substrate having an insulating surface; laminating gate insulating layers, semiconductor layers, and a semiconductor layer containing one-conductivity type impurity over the gate electrodes; forming first conductive layers serving as masks with a droplet discharge method in a position overlapping the gate electrodes, etching the semiconductor layer and the semiconductor layer containing one-conductivity type impurity with the first conductive layers, forming a second conductive layer serving as a source wiring or a drain wiring with a droplet discharge method over the first conductive layers; and etching the first conductive layers and the semiconductor layer containing one-conductivity type impurity, using the second conductive layers as masks.

It is an object of the present invention to avoid the above-mentioned problems and provide a multicolor OLED display with improved power efficiency that reduces the need for precisely patterning one or more of the OLED layers. This object is achieved by an OLED display having at least red, green, and blue colored pixels, including a magenta light emitting layer provided over a substrate for red and blue pixels and a green light emitting layer provided over the substrate for producing at least a green pixel. It is also achieved by first and second color filters in operative relationship with the magenta light-emitting layer to respectively produce red and blue pixels.

Method of manufacturing liquid crystal display element includes disposing adhesive on at least one of first and second substrates; disposing spacer particles on at least one substrate; supplying liquid crystal material onto at least one substrate; and fixing the substrates together with adhesive spacer particles and liquid crystal material therebetween. The substrates are fixed together by applying pressure and / or heat to the substrates from an end portion toward the other end portion thereof. An impulse applied to each spacer particle can be between 0.001 gf.sec and 0.1 gf.sec in substrate fixing step. Parameter X relating to heating in fixing step can satisfy 200<=X<=3000, where X=(T-20) / (V.D), T is temperature (°C), V is fixing speed (mm / sec) of substrates, and D is diameter of spacer particles (mm). The spacer particles can occupy an area ratio of 0.003 or more to unit area of the substrate.

A gate insulating film (13) and a gate electrode (14) of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate (10). Using the gate electrode (14) as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source / drain region of the nMOS transistor, whereby the gate electrode (14) is amorphized. Subsequently, a silicon oxide film (40) is provided to cover the gate electrode (14), at a temperature which is less than the one at which recrystallization of the gate electrode (14) occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode (14), and high tensile stress is applied to a channel region under the gate electrode (14). As a result, carrier mobility of the nMOS transistor is enhanced.

A luminous keyboard includes: a plurality of key caps; a light guiding plate disposed under the key caps; a reflector disposed under the light guiding plate; a masking layer disposed between the key caps and the light guiding plate; a membrane circuit unit disposed under the key caps and on the masking layer; and a luminous unit having a conductive lead, and an illuminant electrically connected to the conductive lead. The conductive lead is made of a material including a conductive polymer gel and a conductive powder and is formed directly on one of the reflector, the masking layer and the membrane circuit unit.

This compact fluorescent lamp comprises a discharge tube arrangement with at least one discharge tube. The tube is formed of glass, encloses a discharge volume filled with a discharge gas and has a fluorescent phosphor coating disposed on the inner surface of the tube. The tube forms a continuous arc path and the tube is provided with electrodes disposed at each end of the arc path. The lamp also comprises a ballast circuit connected to the electrodes for controlling the current in the tube and a lamp base for connecting said lamp to a power supply through a socket. The lamp is enclosed in an outer envelope comprising a substantially spherical portion enclosing the tube arrangement and an elongated end portion enclosing the ballast circuit. The end portion of the outer envelope is closed and sealed by a sealing means of the same material as the material of the outer envelope. The sealing means is connected to the envelope in a hermetically sealing way. A method for manufacturing a compact fluorescent lamp as described above is also disclosed. In the method, an outer envelope with an open end on the base side is provided. The open end of the envelope is closed and sealed with a sealing means to provide a hermetic seal. The envelope is separated by cutting along a circumferential line into an upper part and a lower part. The ballast circuit is introduced into the lower part and respective connection points of the ballast circuit are connected to power supply lead-out wires. The discharge tube arrangement is connected to respective connection points of the ballast circuit by lead-in wires. The lead-in wires and the lead-out wires are short and need not be insulated. The ballast circuit and the discharge tube arrangement are held and supported in the outer envelope by the connecting wires and fixing means.

An interposer with which the manufacturing steps are able to be simplified and which shows superior high frequency characteristics is provided. The interposer includes: a substrate having a front face and a rear face; a wiring that is formed on the front face side of the substrate and is electrically connected to a semiconductor chip; an electric device connected to the wiring; and a concave section that is formed from the rear face side of the substrate in a position corresponding to the electric device.

A light transmission window member capable of simplifying the structure and capable of simplifying manufacturing steps is obtained. This light transmission window member (10, 10a), which is a light transmission window member employed for a semiconductor package (30, 30a), comprises a flat metal frame (2) having an opening (2a) for defining a light passage region and a glass member (1) capable of transmitting light bonded to the upper surface of the flat frame having the opening without through an adhesive to cover the opening.

The invention provides a display device and a method for manufacturing thereof by increasing a material efficiently as well as simplifying steps. Also, the invention provides a technique for forming a pattern such as a wiring, that is used for forming a display device, to have a predetermined shape with an excellent controllability. The method for manufacturing a display device includes the steps of: forming a lyophobic region; selectively irradiating laser beam in the lyophobic region to form a lyophilic region; selectively discharging a composition, that contains a conductive material, in the lyophilic region to form a gate electrode layer; forming a gate insulating layer and a semiconductor layer over the gate electrode layer; discharging a composition containing a conductive material over the semiconductor layer to form a source electrode layer and a drain electrode layer; and forming a pixel electrode layer on the source or drain electrode layer.

A zip lock for a storage bag having a first surface and a second surface, includes a zip fastener and a lock fastener integrally provided on the first and second surfaces respectively. The zip fastener has two zip bodies spacedly and integrally extended from the first surface and a coupling groove extending towards the first surface at a position between two inner walls of the zip bodies. The lock fastener has two locking arms spacedly and integrally extended from the second surface and a sealing arm integrally extended from the second surface at a position between the two locking arms to form two sealing cavities, wherein the sealing arm is sealedly inserted into the coupling groove until the round end of the sealing arm is positioned at the round end of the coupling groove.

In a wiring substrate according to the present invention, a base wiring board is constructed by stacking a plurality of unit wiring boards each having wiring patterns which enable an electrical connection between upper and lower sides, in a state that the plurality of unit wiring boards are connected to each other via a connection terminal, and a silicon interposer is stacked on the base wiring board via a connection terminal, and a resin portion is filled in a gap between the plurality of unit wiring boards as well as a gap between the base wiring board and the silicon interposer, and a resin portion serves as a substrate which integrates the base wiring board and the silicon interposer.

A method for manufacturing a semiconductor device having projection electrodes on the surface of a semiconductor substrate. This method include an electrode forming step of forming the projection electrodes on the surface of the semiconductor substrate, a step of forming a protective resin layer on the whole surface of the semiconductor substrate provided with the projection electrodes, a back side grinding step of thinning the semiconductor substrate by polishing or grinding the back side of the semiconductor substrate, and a surface grinding step of exposing the projection electrodes by polishing or grinding the surface side of the semiconductor substrate.

A semiconductor chip includes a semiconductor substrate having a first principal surface, and having a device layer on the first principal surface in which a semiconductor device is formed, an electrode pad disposed on the first principal surface of the semiconductor substrate and electrically connected to the semiconductor device, a through via formed in a through hole penetrating through the semiconductor substrate and the electrode pad, and an Au bump deposited on the electrode pad and the through via such as to electrically connect between the electrode pad and the through via.

The method of manufacturing a recording head has a flow path wall forming step of forming flow path walls on a substrate having energy generating elements formed thereon, an imbedded material depositing step of depositing an imbedded material between the flow path walls and on a top of each flow path wall, a flattening step of polishing a top of the deposited imbedded material, until the top of the flow path wall is exposed, and a step of forming an orifice plate on the tops of the polished imbedded material and the exposed flow path wall. In the step of forming the flow path walls, patterning of a close contact property improvement layer is simultaneously performed to improve a close contact property between the flow path wall and the substrate.