The invention relates to the technical field of
laser, in particular to an on-
chip series edge-emitting
semiconductor laser array and a process method. The on-
chip series edge-emitting
semiconductor laser array sequentially comprises a semi-insulating substrate, a non-doped buffer layer, a P-type heavily doped layer, a P-type
tunnel junction layer, an N-type
tunnel junction layer, an N-type cladding, an N-type
waveguide layer, an active region, a P-type
waveguide layer, a P-type cladding and a P-type cover layer from bottom to top. Table surfaces on the two sides of each light-emitting unit are deeply etched to the P-type heavily doped layer, and a lateral current
diffusion suppression groove is formed between the bottoms of any two adjacent light-emitting units. An on-
chip series edge-emitting
semiconductor laser array structure is adopted, the parasitic effect is reduced through coplanar
electrode design, upper and lower electrodes can be prepared through a
single process to reduce the cost, lateral current
diffusion suppression grooves are formed between light-emitting units to reduce
crosstalk, the light-emitting units are connected in series to work under the same injection current, and the light-emitting efficiency is improved. The requirements of a
driving circuit can be effectively reduced, and light-emitting uniformity is improved.