977 results about "Write current" patented technology

A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The magnetic element may also include a barrier layer, a second pinned layer. Alternatively, second pinned and second spacer layers and a second free layer magnetostatically coupled to the free layer are included. At least one free layer has a high perpendicular anisotropy. The high perpendicular anisotropy has a perpendicular anisotropy energy that is at least twenty and less than one hundred percent of the out-of-plane demagnetization energy.

A method and system for providing a magnetic element capable of storing multiple bits is disclosed. The method and system include providing first pinned layer, a first nonmagnetic layer, a first free layer, a connecting layer, a second pinned layer, a second nonmagetic layer and a second free layer. The first pinned layer is ferromagnetic and has a first pinned layer magnetization pinned in a first direction. The first nonmagnetic layer resides between the first pinned layer and the first free layer. The first free layer being ferromagnetic and has a first free layer magnetization. The second pinned layer is ferromagnetic and has a second pinned layer magnetization pinned in a second direction. The connecting layer resides between the second pinned layer and the first free layer. The second nonmagnetic layer resides between the second pinned layer and the second free layer. The second free layer being ferromagnetic and having a second free layer magnetization. The magnetic element is configured to allow the first free layer magnetization and the second free layer magnetization to change direction due to spin transfer when a write current is passed through the magnetic element.

A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The method and system include providing a first pinned layer, a barrier layer, a free layer, a conductive nonmagnetic spacer layer, and a second pinned layer. Each pinned layer has a pinned layer easy axis. At least a portion of the pinned layer easy axis is in a perpendicular direction. The barrier layer resides between the first pinned layer and the free layer. The spacer layer is between the free layer and the second pinned layer. The free layer has a free layer easy axis, at least a portion of which is in the perpendicular direction. The magnetic element is also configured to allow the free layer to be switched due to spin transfer effect when a write current is passed through the magnetic element. Because of the perpendicular magnetization(s), the writing current for spin transfer may be significantly reduced.

A method and system for providing a magnetic memory. The magnetic memory includes magnetic storage cells in an array, bit lines, and source lines. Each magnetic storage cell includes at least one magnetic element. The magnetic element(s) are programmable by write currents driven through the magnetic element(s). Each magnetic element has free and pinned layer(s) and a dominant spacer. The magnetic memory is configured such that either the read current(s) flow from the free layer(s) to the dominant spacer if the maximum low resistance state read current divided by the minimum low resistance state write current is greater than the maximum high resistance state read current divided by the minimum high resistance state write current or the read current(s) flow from the dominant spacer to the free layer(s) if the maximum low resistance state read current divided by the minimum low resistance state write current is less than the maximum high resistance state read current divided by the minimum high resistance state write current.

A method and system for providing a magnetic memory is described. The method and system include providing magnetic memory cells, local and global word lines, bit lines, and source lines. Each magnetic memory cell includes a magnetic element and a selection device connected with the magnetic element. The magnetic element is programmed by first and second write currents driven through the magnetic element in first and second directions. The local word lines are connected with the selection device of and have a first resistivity. Each global word line corresponds to a portion of the local word lines and has a resistivity lower than the first resistivity. The bit lines are connected with the magnetic element. The source lines are connected with the selection device. Each source line corresponds to a more than one of the magnetic memory cells and carries the first and second write currents.

A method and system for providing and using a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element and a selection device coupled with the magnetic element. The magnetic element is programmed by write currents driven through the magnetic element in a first or second direction. In one aspect, the method and system include providing a voltage supply and a voltage pump coupled with the magnetic storage cells and the voltage supply. The voltage supply provides a supply voltage. The voltage pump provides to the selection device a bias voltage having a magnitude greater than the supply voltage. Another aspect includes providing a silicon on oxide transistor as the selection device. Another aspect includes providing to the body of the transistor a body bias voltage that is a first voltage when the transistor is off and a second voltage when the transistor is on.

A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes first pinned, spacer, free, spin barrier, and second pinned layers. The spacer layer is nonmagnetic and resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The free layer resides between the spacer and spin barrier layers. The spin barrier layer is between the free and second pinned layers. The spin barrier layer is configured to reduce an outer surface contribution to the free layer damping constant. In one aspect, the spin barrier layer has a high areal resistance and may substantially eliminate spin pumping induced damping. In another aspect, the magnetic element also includes a spin accumulation layer between the spin barrier and free layers. The spin accumulation layer has a high conductivity and may have a long spin diffusion length.

A method and system include providing a pinned layer, a free layer, and a spacer layer between the pinned and free layers. The spacer layer is nonmagnetic. The magnetic element is configured to allow the free layer to be switched due to spin transfer when a write current is passed through the magnetic element. In one aspect, the method and system include providing a spin engineered layer adjacent to the free layer. The spin engineered layer is configured to more strongly scatter majority electrons than minority electrons. In another aspect, at least one of the pinned, free, and spacer layers is a spin engineered layer having an internal spin engineered layer configured to more strongly scatter majority electrons than minority electrons. In this aspect, the magnetic element may include another pinned layer and a barrier layer between the free and pinned layers.

A method and system for providing a magnetic memory is described. The magnetic memory includes a plurality of magnetic storage cell and at least one bit line and a plurality of source lines corresponding to the plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element that is programmed to a high resistance state by a first write current driven through the magnetic element in a first direction and to a low resistance state by a second write current driven through the magnetic element in a second direction. The bit line(s) and the source lines are configured to drive the first write current through the magnetic element in the first direction, to drive the second write current through the magnetic element in the second direction, and to drive at least one read current through the magnetic element in a third direction that does not destabilize the low resistance state.

A write driver circuit including a plurality of programmable fuses for a phase change memory device in which a write operation is correctly performed even in the case where a current output shift in a write current generation circuit; or in the case where a phase change memory cell having a phase change property shift due to an external factor or due a process change. The write driver circuit includes a write current control unit for outputting a first or second level of voltage selected, by selecting one of a first or second programmable current path, based on whether a first or second selection pulse signal is applied; and a current driving unit for generating a write current controlled by the output voltage of the write current control unit. Each of the first and second programmable current paths includes fuses that can be programmed to adjust their resistance to adjust the respective selected output voltage to compensate for the current output shift in the write current generation circuit or for the phase change memory cell having the phase change property shift.

A method and system for providing a magnetic element are disclosed. The method and system include providing first and second pinned layers, a free layer, and first and second barrier layers between the first and second pinned layers, respectively, and the free layer. The first barrier layer is preferably crystalline MgO, which is insulating, and configured to allow tunneling through the first barrier layer. Furthermore, the first barrier layer has an interface with another layer, such as the free layer or the first pinned layer. The interface has a structure that provides a high spin polarization of at least fifty percent and preferably over eighty percent. The second barrier layer is insulating and configured to allow tunneling through the second barrier layer. The magnetic element is configured to allow the free layer to be switched due to spin transfer when a write current is passed through the magnetic element.

A method and system for providing a magnetic element is described. The magnetic element includes a first pinned layer, a first spacer layer, a free layer, a second spacer layer, and a second pinned layer. The first and second pinned layers have first and magnetizations oriented in first and second directions, respectively. The first and second spacer layers are nonferromagnetic. The first and second spacer layers are between the free layer and the first and second pinned layers, respectively. The magnetic element is configured either to allow the free layer to be switched to each of multiple states when both a unidirectional write current is passed through the magnetic element and the magnetic element is subjected to a magnetic field corresponding to the each states or to allow the free layer to be switched to each of the plurality of states utilizing a write current and an additional magnetic field that is applied from at least one of the first pinned layer and the second pinned layer substantially only if the write current is also applied.