216 results about "Current generation" patented technology

The invention relates to the technical field of electric energy quality treatment, in particular to a collaborative treatment system and method based on multi-class electric energy quality adjustment resources. The system comprises an electric energy quality disturbance generation device, an electric energy quality interference source device, a harmonic current generation device, a line impedance simulation device, a data acquisition device, an electric energy quality diagnosis module and a coordinated scheduling module. According to the invention, independent or coupled simulation of various disturbance types such as voltage sag, harmonic wave, imbalance and flicker is supported based on various types of power quality regulation resources, optimal scheduling and cooperative control of various types of regulation resources such as source, network and load are realized, modular design is realized, plug and play and test verification of various treatment devices are supported, and the power quality regulation system is suitable for large-scale popularization and application. Through line impedance simulation and multi-working-condition setting, an actual power grid operation environment is approached, and the system is especially suitable for a high-proportion new energy and power electronic equipment access scene.

The invention discloses a battery pack passive equalization chip and a battery pack, and belongs to the technical field of integrated circuits. The circuit is connected in parallel between the positive and negative ends of a single lead-acid battery of a battery pack, and comprises a configurable register, a reference voltage source, a battery voltage judgment module and an equalizing current generation module, the battery voltage judgment module judges whether the voltage at the two ends of the chip is higher than a set equalization starting threshold value and controls the equalization current generation module to be started; when the voltage is lower than a set equalization closing threshold value, no equalization current is generated; when the equalizing current generation module is started, equalizing current is generated to shunt charging current of the battery, and voltage at two ends is inhibited from continuously rising; and the configurable register controls the battery voltage judgment module to adjust the equalization starting threshold value and the equalization current. The problem of overcharging of the lead-acid battery pack caused by initial capacity deviation of a single lead-acid battery can be solved, and the overall service life of the lead-acid battery pack is remarkably prolonged; the integration level is high; the method has the advantages of high monitoring precision and low equalization error.

This disclosure provides a control circuit for automatically switching operating modes, including a current generation circuit, a first current difference circuit, a second current difference circuit, a valley control circuit, a PFM detection circuit, and an oscillator. The current generation circuit converts the control voltage into a first control current and generates a second control current of the same magnitude as the first control current through a first mirror. The first current difference circuit generates a fixed bias current. When the first control current is greater than the fixed bias current, the control circuit operates in a fixed-frequency PWM mode. The second current difference circuit generates a third control current of the same magnitude as the first control current through the first mirror. The valley control circuit adjusts the valley current when the lower transistor is turned on, and controls the frequency of the switching node to decrease by reducing the valley current. When the third control current is less than the fixed bias current, the overcurrent signal of the lower transistor is high, and the control circuit reduces the frequency by decreasing the valley current.

The application provides a voltage regulating circuit and a battery management system. The voltage regulating circuit comprises: a bias current generation module configured to generate a bias current related to a voltage variation range of a power supply end according to a voltage value of the power supply end; a plurality of current modulation modules, each of which has a first modulation branch and a second modulation branch coupled with each other, each second modulation branch has a preset modulation coefficient, and the first modulation branch and the second modulation branch are configured to modulate a difference between a first current input to the first modulation branch and a second current output to a next current modulation module from the second modulation branch according to the preset modulation coefficient when the bias current varies, so as to generate a modulation current on the second modulation branch, and the bias current is input to the first modulation branch of the first current modulation module; and a voltage generation module configured to adjust a reference current to generate an output voltage. The above technical solution can improve the stability of the output voltage.

To provide a current generation circuit capable of improving the accuracy of a current value.SOLUTION: The current generation circuit includes a first current mirror circuit that generates a second current obtained by subtracting a first current from an input current, a second current mirror circuit that generates a third current obtained by subtracting the second current from the input current, and an output terminal that outputs the third current.SELECTED DRAWING: Figure 2

The application discloses a method and system for quantitatively analyzing self-insulation resistance shunt effect of a self-powered detector, and the design steps are as follows: a circuit model of the self-powered detector is established according to a working principle of the detector; specific parameters of each element in the circuit are calculated according to geometric structure and physical parameters of the detector; a state space equation in a matrix form is established according to a current generation mechanism of the self-powered detector in a radiation field and the circuit model, and a system state transition matrix of the self-powered detector system is established by solving a matrix index; and influences of geometric dimensions and physical parameters of the detector on the insulation resistance and the shunt effect thereof are analyzed according to the system state transition matrix. The method can quantitatively calculate the shunt effect of the insulation layer resistance of the self-powered detector with different structures and parameters, and can accurately calculate a change of a capacitive current with time, thereby providing guidance for design and application of the detector.

The invention discloses a current protection test method, device and system, electronic equipment and a storage medium. The first feedback information corresponding to the tripping signal grabbed by the data acquisition device and the second feedback information corresponding to the notification signal of the current generation device are acquired to obtain the tripping time of the to-be-tested device, and then the current protection test is automatically completed based on the comparison result of the tripping time and the set time range. Therefore, the labor cost is reduced, and errors caused by manual testing are reduced. Meanwhile, the tripping time is judged according to the feedback information related to the to-be-tested equipment, automatic testing of current protection can be completed without multiple times of physical switching-on operation, and the accuracy and efficiency of current protection testing are improved.

The invention relates to a device for improving the through-flow arc control of a high-voltage large-capacity gas gap switch, and the device comprises a test cavity which is used for providing a controllable gas insulation environment and serves as a carrier of a high-voltage large-current discharge test; the trigger discharge loop is used for generating a high-voltage pulse to drive the trigger cavity to generate plasma jet and induce the main gap to be broken down and conducted at a preset moment; and the large current generation loop is used for storing energy and generating a high-energy fault current simulating an actual working condition after the main gap is conducted. A main gap can form a stable and controllable initial discharge channel under high-voltage and large-gap conditions, active constraint is carried out on an arc movement track in a high-energy fault current flowing stage, and long-term residence of an arc root in a local area of an electrode is avoided, so that the ablation degree of the electrode is remarkably reduced, the through-flow life is prolonged, and meanwhile, the service life of the electrode is prolonged. A transverse magnetic field generated by the spiral groove structure enables an electric arc to rotate along the surface of the electrode, the stability of an arc column is effectively improved, and the reliability under the condition of large current flow is improved.

The application discloses a current source inverter high-speed permanent magnet synchronous motor control method and system based on LADRC, and the system part comprises a position estimation module, a rotating speed regulator, a current sensor, a voltage sensor, a coordinate transformation matrix, a current regulator, a current generation module and a space vector pulse width modulation module; the control method part calculates an inverter current reference value through design of a second-order LADRC current regulator, realizes d-q axis decoupling in the regulator, improves the dynamic performance of the current source inverter, effectively reduces current harmonics, and improves the anti-interference ability and robustness of the system. The application can not only solve the system instability problem caused by high control order and serious coupling of the motor under high-speed working conditions, improve the robustness and dynamic performance of the system, but also solve the problems of high cost and low reliability of the traditional position sensor under high-speed operation, reduce the hardware cost of the system, and speed up the response speed. The application relates to motor control technology.

The embodiment of the invention provides a ripple compensation device which is suitable for the technical field of electrical control. The ripple compensation device comprises a current generation module and a ripple superposition module, the ripple superposition module comprises a plurality of voltage-controlled current sources, and at least one target voltage-controlled current source exists in the plurality of voltage-controlled current sources. The current generation module obtains output voltage and generates adjusting current according to the output voltage, so that the target voltage-controlled current source generates self transconductance according to the adjusting current, a first transconductance value in linear relation with the output voltage is obtained, and then the ripple superposition module generates ripple signals according to the adjusted target voltage-controlled current source and other voltage-controlled current sources. Therefore, the output voltage of the DC-DC converter is compensated. On the basis, the transimpedance of the target voltage-controlled current source is adjusted, so that the target voltage-controlled current source is linearly changed along with the output voltage, the ripple of the direct current-direct current converter is adaptively compensated, and the stability of a control loop in the direct current-direct current converter under different output voltages is improved.

Methods, systems, and devices for p-type and n-type doping of a backside source for memory channels within an apparatus are described. An apparatus may be formed with both an n-type doped region and a p-type doped region coupled with a backside source. The two doped regions may support current generation for both erase and program operations, providing for reliable and efficient memory access operations. The doped regions may be separated from one another by the plug that protects the memory cells and other regions of the apparatus from diffusion during a backside source formation process. That is, the conductive plug may be formed and may be doped with opposite charges on opposite ends of the conductive plug before a backside source is subsequently formed and coupled with the two doped regions. The opposite ends of the conductive plug may be doped with opposite charges.

The invention belongs to the technical field of integrated circuits, and particularly relates to a positive temperature coefficient current generating circuit with process compensation. The circuit comprises a symmetric positive temperature coefficient current generating circuit or a complementary positive temperature coefficient current generating circuit. The symmetrical positive temperature coefficient current generation circuit comprises two positive temperature coefficient sub-current generation circuits; wherein one sub-current generating circuit comprises a positive temperature coefficient current biasing circuit with NMOS (N-channel metal oxide semiconductor) process characteristics, a first operational amplifier circuit and a first current mirror circuit; the other sub-current generating circuit comprises a positive temperature coefficient current biasing circuit with PMOS (P-channel Metal Oxide Semiconductor) process characteristics, a second operational amplifier circuit and a second current mirror circuit; the complementary positive temperature coefficient current generating circuit comprises a positive temperature coefficient current biasing circuit with dual-process characteristics, a third operational amplifier circuit and a third current mirror circuit; according to the invention, the asymmetry of a temperature curve caused by the asymmetry of a process corner can be effectively compensated while the positive temperature coefficient current is generated, so that the device has a good application prospect.

The invention discloses a dual-frequency dual-channel synchronous current generation method and device, and belongs to the field of electrical equipment and electrical engineering, and the method comprises the following steps: converting hexadecimal information needing to be sent into binary information through a main control unit; the main control unit performs frequency shift keying modulation on the binary information aiming at the two communication frequency bands to obtain two paths of modulation signals; mixing the two paths of modulation signals, outputting one path of pulse width modulation signal with a dual-frequency characteristic, carrying out direct current isolation and high voltage isolation processing on the pulse width modulation signal, and outputting the pulse width modulation signal to a metal oxide semiconductor field effect transistor; and the metal oxide semiconductor field effect transistor carries out resistor switching to generate characteristic current. The method can effectively resist the single-frequency interference problem, reduce the active heating value, support long-time injection without over-temperature protection, and can effectively resist the power-frequency interference.

The utility model discloses a high-order temperature compensation band-gap reference circuit which comprises a biasing circuit, a compensation current generating circuit, a starting circuit and a band-gap reference core circuit. The biasing circuit, the compensation current generating circuit, the starting circuit and the band-gap reference core circuit are sequentially connected. The bias circuit is used for generating bias current with a positive temperature coefficient; the compensation current generation circuit is used for generating current with a high-order temperature coefficient; the starting circuit is used for controlling the starting of the band-gap reference core circuit according to the bias current generated by the bias circuit; and the band-gap reference core circuit is used for compensating reference voltage by the current with the high-order temperature coefficient to generate reference voltage with a low temperature coefficient. The output reference voltage VBG has the advantage of low temperature drift in a wide temperature range, and is suitable for a power supply management chip, a digital-to-analog conversion circuit and the like.

The invention discloses an optical scanning device and an image forming apparatus, the optical scanning device includes: a scanning unit in which a plurality of light-emitting element groups in which a plurality of light-emitting elements are arranged in a main scanning direction are arranged so as to face an object to be scanned, and a plurality of light-emitting element groups are arranged in the main scanning direction, scanning by causing each of the light-emitting element groups to emit light based on image information; a driving unit that drives the respective light emitting element groups of the scanning unit in each scanning period; and a discarded current generation unit that generates a discarded current that is supplied from the drive unit during a non-scanning period set between the scanning periods, the discarded current being other than a current supplied to each of the light emitting element groups, and that is capable of controlling the discarded current.

An apparatus comprises a bias current generation circuit configured to generate a bias current, a synapse circuit including a weight register storing a weight value and configured to perform a charge operation based on the input spike signal, the bias current, and the weight value, a membrane capacitor having a potential determined based on the charge operation of the synapse circuit, and a neuron circuit configured to generate an output spike signal based on a comparison between the potential of the membrane capacitor and a threshold potential. The bias current generation circuit comprises a self-correction circuit, and the self-correction circuit comprises a target input spike register storing a value related to a target number of input spikes and is configured to correct the bias current generated by the bias current generation circuit based on the value related to the target number of input spikes.

The invention provides a control circuit capable of automatically switching working modes. The control circuit comprises a current generation circuit, a first current difference circuit, a second current difference circuit, a valley value control circuit, a PFM detection circuit and an oscillator, the current generation circuit converts the control voltage into a first control current, and generates a second control current with the same magnitude as the first control current through the first mirror image; the first current difference circuit generates a fixed bias current, and when the first control current is greater than the fixed bias current, the control circuit works in a PWM mode with a fixed frequency; the second current difference circuit generates third control current with the same size as the first control current through the first mirror image; the valley value control circuit adjusts the valley value current when the lower tube is opened, the frequency of the switch node is controlled to be reduced by reducing the valley value current, and when the third control current is smaller than the fixed bias current, the lower tube overcurrent signal is in a high level, and the control circuit reduces the frequency by reducing the valley value current.

This invention discloses a differential circuit, comprising: an input pair, a first load, an adjustment circuit, a current generation circuit, and a mobility follower circuit. The adjustment circuit includes: a constant transconductance bias circuit, a current generation circuit, and a mobility follower circuit. The constant transconductance bias circuit generates a bias current; the current generation circuit generates a compensation current, including a reference circuit for generating one or more compensation currents or a compensation current generation circuit for generating one or more compensation currents based on the bias current; the mobility follower circuit generates an adjustment current based on the bias current and the compensation current, or generates an adjustment current based on the bias current and the compensation current. According to the differential circuit of this invention, by using the adjustment current as the bias current of the input pair and the calibration input current at the output of the differential circuit, zero-temperature-drift offset voltage can be achieved in the differential circuit, and low offset voltage can be achieved across the entire temperature range.

The invention discloses a low-temperature-drift hysteresis voltage comparator, relates to the technical field of stepping motors, and is used for solving the problem that in the prior art, the hysteresis voltage of a comparator is increased due to large temperature change of a stepping motor driving circuit, and then current control of a stepping motor is affected. Comprising a negative temperature excursion current generation module, a positive temperature excursion current generation module, a zero temperature excursion current generation module, a current operation module and a cross coupling comparison module. The cross-coupling comparison module is used for generating a hysteresis voltage based on a comparison result of the input voltage and the reference voltage; the current operation module performs weighted operation on the current generated by the negative temperature drift current generation module, the positive temperature drift current generation module and the zero temperature drift current generation module, and outputs compensation current; the compensation current is provided to the tail current source of the cross-coupling comparison module and is used for modulating the output impedance of the tail current source so as to compensate the temperature drift of the hysteresis voltage.

The embodiment of the invention discloses a driving circuit and a driving chip, and relates to the technical field of electronic circuits, the driving circuit comprises an operational amplifier module, a sampling and holding module, a current generation module, a first MOS tube and a second MOS tube; a first input end of the operational amplifier module is used for accessing reference voltage, a second input end and an output end of the operational amplifier module are respectively connected with a source electrode and a grid electrode of the first MOS tube through the sampling and holding module, and the current generation module is connected with the first MOS tube and is used for generating driving current; the second MOS tube is turned on and off based on the PWM signal and is used for controlling the output of the driving current; through continuous sampling and holding of the sampling and holding module in the switching period of the second MOS tube, the establishment speed of a feedback loop composed of the operational amplifier module, the current generation module and the first MOS tube can be greatly improved, and the establishment duration of the driving current is greatly shortened.

The application discloses a power-off protection circuit of a flash chip, and relates to the technical field of electronic circuits, comprising: a main power supply control module, which is used for providing a main power supply and a first bias current and controlling power transmission; a bias current generation module, which is used for copying the first bias current; a voltage sampling module, which is used for sampling the voltage of the main power supply; a voltage comparison module, which is used for power-off judgment and controlling a logic delay control module to delay output of a level signal; a signal self-locking module, which is used for self-locking control of power supply of a standby power supply control module; and a reset module, which is used for controlling the signal self-locking module to reset. The power-off protection circuit of the flash chip samples the voltage of power provided by the main power supply control module and judges power-off, so as to avoid repeated switching control of the power supply due to power voltage power-off fluctuation, and to adopt the logic delay control module to delay and keep the standby power supply control module working.

The invention relates to a high-voltage direct-current generation circuit of a plasma generator. The high-voltage direct-current generation circuit comprises a first rectifying unit, a filtering unit, a self-oscillation unit, a boosting unit and a second rectifying unit, and the self-excited oscillation unit is used for inverting the second direct current into the second alternating current. And the boosting unit is used for boosting the second alternating current to obtain a third alternating current. And the second rectifying unit is used for rectifying the third alternating current to obtain a third direct current. The self-oscillation unit comprises at least one pair of switch tubes and a positive feedback winding. The self-oscillation unit comprises at least one pair of switching tubes and a positive feedback winding, and the positive feedback winding provides induced positive feedback current for the control ends of the switching tubes under the condition that current in a primary winding of a transformer is increased, so that the switching tubes are gradually changed from a micro-conduction state to a conduction state. And the burnout phenomenon caused by sudden conduction of the switch tube can be avoided.

The invention discloses a current generation circuit and a rail-to-rail operational amplifier, and the circuit is characterized in that a current unit is connected with the output end of a first transconductance amplification unit, the current unit is used for providing a preset current, the input end of the first transconductance amplification unit receives a reference voltage, and the input end of a second transconductance amplification unit receives an input voltage; and the feedback unit enables the transconductance of the second transconductance amplification unit to synchronously change along with the transconductance of the first transconductance amplification unit. According to the current generation circuit and the rail-to-rail operational amplifier, the feedback unit enables the second transconductance amplification unit to have the same transconductance as the first transconductance amplification unit, and when the input current synchronously changing with the reference current is provided for the input end of the second transconductance amplification unit, the transconductance of the first transconductance amplification unit is increased; the output end of the second transconductance amplification unit can also output an output current which is equal to the preset current in proportion, and current compensation can be carried out on the rail-to-rail operational amplifier through the output current so as to eliminate the offset voltage.

The invention discloses a long-distance indirect flight time laser radar sensor integrated circuit, and the integrated circuit comprises a current generation module which responds to a triggering result of an analog silicon photomultiplier tube pixel array, and is used for outputting a differential current; the current processing module is used for converting the differential current into voltage; the signal processing module is used for carrying out AND on the voltage and a high-frequency clock to generate a plurality of voltage pulses; accumulatively counting the number of the voltage pulses in two windows with opposite phases through a counter to obtain an echo count value, finding an echo count peak value through a comparator and recording the period of the echo count peak value, performing data validity verification on the echo count peak value, if the data is judged to be valid, processing and calculating the echo count peak value, and if the data is judged to be valid, determining whether the echo count value is valid or not; obtaining target distance information; and if the data are judged to be invalid, laser is emitted again, and a new round of distance measurement is carried out. The range finding range can be expanded, and the high signal-to-noise ratio is realized.

This invention discloses a method for optimizing the output of a wind-solar-storage power generation system under the influence of uncertainties in coal-fired power generation scenarios. The method includes: establishing a power clearing model for the power system based on the uncertainties of coal-fired power generation scenarios; inputting the annual and current generation costs of coal-fired power plants into the model and using a solver to obtain cleared power cost parameters under each coal-fired power generation scenario; using a clustering algorithm to obtain the average value and probability distribution of the cleared power cost parameters under each coal-fired power generation scenario; establishing a stochastic optimization model for the wind-solar-storage power generation system; inputting the average value and probability distribution of the cleared power cost parameters into the model; and outputting the demand and supply of the wind-solar-storage power generation system after processing, thereby achieving output optimization. This invention considers the changes in power cleared power cost parameters under the uncertainties of coal-fired power generation scenarios and establishes an output optimization strategy for the wind-solar-storage power generation system through stochastic optimization, enabling the system to achieve optimal output under changing coal-fired power generation scenarios.

A technique for reducing the effects of charge injection when a charge pump in a fractional-N frequency synthesizer switches from an error cancellation phase of error current generation to a full-scale phase of error current generation uses a dummy digital-to-analog converter to steer excess current from the error cancellation phase to a voltage regulated node. As a result, the voltage swing of an inactive branch of a digital-to-analog converter of the charge pump is the same as the voltage swing of the active branch of the charge pump, i.e., the device overlap capacitance charge injection is in phase for the branches of a digital-to-analog converter in the charge pump.

The invention discloses a clock generation circuit and a clock generation method. The clock generation circuit includes: a current comparator for providing a difference current of a reference current and a feedback current, the current comparator including a feedback current generation unit for generating the feedback current; an integrator for integrating the differential current to generate a control voltage; the voltage-controlled oscillator is used for generating a clock signal according to the control voltage, the feedback current generation unit comprises a first capacitor and a second capacitor, the first capacitor and the second capacitor are respectively connected between the integrator and the first voltage, and the feedback current generation unit alternately charges the first capacitor and the second capacitor according to a feedback signal of the clock signal. A feedback current is provided. The current comparator and the integrator are used for replacing a traditional phase frequency detector and a charge pump framework, the structure is simple, the chip area and power consumption can be reduced, and the precision of clock signals can be improved.

The invention relates to a large-model end-cloud collaborative reasoning method and system giving consideration to efficiency and privacy. The method comprises the steps that input is obtained through an end side, and KV cache control parameters are configured; the end side executes embedding calculation to generate a feature tensor and uploads the feature tensor to the cloud; the cloud calls a KV cache according to authorization to execute decoding layer reasoning, and returns to a hidden state; in the current generation step, the end side executes speculative decoding to predict a subsequent token based on a hidden state, and calculates an end side local reasoning result corresponding to a low-dimensional feature according to a dimension splitting rule; the cloud side calculates a cloud side local reasoning result corresponding to the high-dimensional features, and the cloud side local reasoning result is encrypted and transmitted back after language self-adaptive cutting; and the end side fuses local reasoning results at the two ends to obtain complete distribution, samples and generates an incremental token, uploads the incremental token to the cloud for verification and updates the KV cache.

The invention discloses a netlist optimization method and device based on an adaptive fast hybrid search algorithm. The method comprises the following steps: reading an original netlist file and comprehensive flow parameters of a circuit to be optimized; creating a conversion dictionary of the comprehensive flow, and creating a hash table; taking the comprehensive flow as chromosome input, and generating chromosomes to form a population; calculating the fitness of chromosomes in the new population; according to the fitness, selecting offspring to clone chromosomes, and performing adaptive random cross pairing on cloned individuals to generate offspring and mutate; whether a simulated annealing algorithm is used for optimization is selected for each filial generation; recording the Pareto frontier of the current generation when the optimization of each generation is finished, and selecting the best individual from the current population and the newly generated offspring according to the fitness to form the population of the next generation; and drawing a final Pareto frontier map. According to the method, the dependence on storage resources is reduced, and the applicability and effectiveness of circuit netlist comprehensive flow optimization are improved.

Embodiments of the present disclosure disclose an RC oscillator, an electronic device and a chip. The RC oscillator comprises: a current generation circuit comprising a transistor and a resistor, configured to output a bias current according to a power supply voltage, an inter-electrode voltage of the transistor and a resistance value of the resistor; a charging and discharging control circuit comprising a capacitor and connected to the current generation circuit, configured to charge the capacitor by the power supply voltage or discharge the capacitor by the bias current; and a logic control circuit connected to the current generation circuit and the charging and discharging control circuit, configured to compare a capacitor voltage of the capacitor with a voltage threshold determined based on the inter-electrode voltage, and control the charging and discharging control circuit to switch to a first stage or a second stage. The present disclosure does not need to design a complex voltage reference and current reference circuit, greatly simplifies the overall circuit structure, and saves chip area and power consumption.