36 results about "Minority carrier injection" patented technology

A photovoltaic cell or other optoelectronic device having a wide-bandgap semiconductor used in the window layer. This wider bandgap is achieved by using a semiconductor composition that is not lattice-matched to the cell layer directly beneath it and/or to the growth substrate. The wider bandgap of the window layer increases the transmission of short wavelength light into the emitter and base layers of the photovoltaic cell. This in turn increases the current generation in the photovoltaic cell. Additionally, the wider bandgap of the lattice mismatched window layer inhibits minority carrier injection and recombination in the window layer.

Improved highly reliable power RFP structures and fabrication and operation processes. The structure includes plurality of localized dopant concentrated zones beneath the trenches of RFPs, either floating or extending and merging with the body layer of the MOSFET or connecting with the source layer through a region of vertical doped region. This local dopant zone decreases the minority carrier injection efficiency of the body diode of the device and alters the electric field distribution during the body diode reverse recovery.

An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with V_G=0 in a conventional H bridge circuit.

A gated quantum well device formed as an MOS capacitor is disclosed. The quantum well is an inversion region less than 20 nanometers wide under the MOS gate. The device may be fabricated in either polarity, and integrated into a CMOS IC, configured as a quantum dot device or a quantum wire device. The device may be operated as a precision charge pump, with a minority carrier injection region added to speed well filling.

The invention discloses a super junction Schottky semiconductor device. When the semiconductor device is accessed to a certain reverse bias voltage, charge compensation is formed by a second conductive semiconductor material and a first conductive semiconductor material, a super junction structure is formed, the reverse breakdown voltage of the device is enhanced, and characteristics of conduction or blocking of the device are improved. Meanwhile, when the semiconductor device is accessed to a certain forward bias voltage, a first type Schottky barrier junction (assuming that the first conductive semiconductor layer adopts an N type semiconductor material) is in the forward bias conduction state, and a second type Schottky barrier junction (assuming that the second conductive semiconductor layer adopts a P type semiconductor material) is in the reverse bias cut-off state, therefore when in the forward conduction state, the device is still a conductive device with a single carrier, and minority carrier injection does not exist in the conductive device with the single carrier. The device has good switching characteristics. The invention also provides a preparation method of the super junction Schottky semiconductor device.

The present invention provides a wide bandgap semiconductor device with surge current protection and a method of making the device. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.

The invention belongs to the field of silicon-substrate photoelectronic technology based on micro electronic technique and relates to a CMOS (Complementary Metal-Oxide-Semiconductor Transistor)-process compatible grid-control p-n junction forward-direction injection type silicon light-emitting device and a production method thereof. The device comprises a p silicon substrate and an n well; an emitting electrode p+ doped area and an N well electrical contact N + doped area are made in the n well; an ultrathin gate oxide layer is grown on the surface of the N well; a field oxide layer and a polysilicon gate are arranged on the ultrathin gate oxide layer; an anode and a cathode are respectively made on the emitting electrode p+ doped area and the N well electrical contact N+ doped area; and a gate electrode is made on the polysilicon gate. The invention belongs to p-n junction forward-direction minority carrier injection type light-emitting devices, has low working voltage and can share one power supply with CMOS technology.

The invention discloses a Schottky semiconductor device with grooves. The Schottky semiconductor device with the grooves comprises an MOS structure, a PN junction and a Schottky barrier junction. The electric field distribution of reverse bias voltage is changed through the MOS structure, and therefore the forward-direction conductive character of a component is improved. The bearing capacity of transient high voltage of the component is improved through the PN junction. When the semiconductor device is under the forward-direction small electric current density state, the PN junction is not opened, and therefore minority carrier injection of the component is reduced, and the reverse recovery character of the component is improved. The invention provides a preparation method of the Schottky semiconductor device with the grooves.

The invention provides a semiconductor device with a super-junction structure. The semiconductor device comprises a cellular area. The cellular area comprises a second-conductive-type first body area, first-conductive-type guide pillars and second-conductive-type guide pillars. A preset distance is kept between each second-conductive-type guide pillar and the first body area above the second-conductive-type guide pillars. The second-conductive-type guide pillars are partially or totally separated from the first body area above the second-conductive-type guide pillars. Capacitance between a source electrode and a drain electrode can be effectively reduced, and furthermore switching loss of the semiconductor device is reduced. The semiconductor device further has functions of restraining minority-carrier injection, restraining minority-carrier extraction in a reverse recovery period, improving a reverse recovery characteristic and reducing loss and voltage oscillation in a reverse recovery period. Through controlling the connecting area between the second-conductive-type guide pillars in the cellular area and the first body area above the second-conductive-type guide pillars, semiconductor device breakdown in the cellular area can be ensured, and furthermore durability of the semiconductor device can be improved.

In order to improve energization capacity, minority carrier injection efficiency is increased. In a semiconductor device, an IGBT includes a first drift layer, a collector region, a base region, an emitter region, an insulating film, a gate electrode, and a first high carrier lifetime region formed at a position closer to the collector region than the base region and having a longer carrier lifetime than the first drift layer. An FWD includes a second drift layer, an anode region, and a second high carrier lifetime region formed at a position closer to the anode region than a lower surface of the second drift layer and having a longer carrier lifetime than the second drift layer.

The invention discloses a light-emitting device, a display panel and a manufacturing method of the light-emitting device, and aims to solve the problems that materials which are high in mobility and matched in energy level are difficult to find at present, and injection of holes and electrons is unbalanced. The light-emitting device comprises a light-emitting area and a regulation and control area which are located between the first electrode layer and the second electrode layer. The light-emitting region includes: a light-emitting layer; for the light-emitting region, one of the first electrode layer and the second electrode layer, which has a small number of carriers injected into the light-emitting layer in unit time, is used as a minority carrier injection electrode layer, and the other one is used as a multi-carrier injection electrode layer; the regulation and control region comprises an insulating layer and a carrier transport layer which are arranged in a laminated manner; the carrier transport layer is in contact with the minority carrier injection electrode layer, the insulating layer is in contact with the multi-carrier injection electrode layer, and the side wall of the carrier transport layer is in contact with the side wall of the light-emitting layer.

The invention provides a method for avoiding minority carrier injection of a field effect transistor based on p-type narrow band gap organic small molecules and the field effect transistor. The methodcomprises the following step: loading p-type wide-band gap organic semiconductors between a source electrode and a p-type narrow-band gap organic small molecular layer and between a drain electrode and the p-type narrow-band gap organic small molecular layer. According to the embodiment of the invention, p-type wide-band gap organic semiconductors are loaded between the source electrode and the p-type narrow-band gap organic small molecular layer and between the drain electrode and the p-type narrow-band gap organic small molecular layer, so that injection of minority carriers (electrons) isavoided from the source.