370 results about "Charge compensation" patented technology

The invention relates to a semiconductor power device with charge compensation structure and monolithic integrated circuit, and method for fabricating it. In the case of this semiconductor power device, zones (6) in charge compensation cells (27) that are arranged vertically and doped complementarily to the semiconductor chip volume (5) are arranged in the entire chip volume, the complementarily doped zones (6) extending right into surface regions (11) of the semiconductor power elements (7) and not projecting into surface regions (12) of semiconductor surface elements (1).

In one embodiment, a semiconductor device is formed having charge compensation trenches in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connecting region electrically couples the channel region to one of the at least two opposite conductivity type semiconductor layers.

In one embodiment, a semiconductor device is formed having sub-surface charge compensation regions in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connecting region electrically couples the channel region to one of the at least two opposite conductivity type semiconductor layers.

In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.

The invention discloses a novel lepidolite flotation method including primary rough selection, secondary fine selection and secondary scavenging. During the flotation, sodium silicate is added as an inhibitor with the amount ranging from 1400g / t to 1900g / t; an anionic collector is sodium oleate or oxyparaffin soap 731 with the amount ranging from 480g / t to 700g / t; and a cationic collector is dodecylamine or coconut oil amine with the amount ranging from 130g / t to 160g / t. The adding sequence of collectors is the anionic collector first and the cationic collector second, or the anionic collector and the cationic collector are added together. By the method, the lepidolite is selected through the combination of the anionic and the cationic, good flotation effect can be realized, flotation efficiency is high, and meanwhile, the synergistic effect is generated between the anionic collector and the cationic collector, and results from joint action of three mechanisms of coadsorption, charge compensation and function complementation.

In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.

The invention provides a pixel unit circuit, a pixel circuit, a driving method and a display device. The pixel unit circuit includes a light emitting element, a storage capacitor module, a driving transistor, a light emitting control module, a charging compensation control module, and a voltage control module. A first end of the light emitting element is connected with a first voltage input end. The control end of the light emitting control module is connected with a light emitting control line, a first end is connected with a second voltage input end, and a second end is connected with a second pole of the driving transistor. The light emitting control module controls whether the second pole of the driving transistor is connected with the second voltage input end under the control of the light emitting control line. The charging compensation control module controls whether the gate of the driving transistor is connected with a data line under the control of a gate line. The voltage control module is connected with the first voltage input end, and is used for controlling the voltage value of a first voltage input to the first voltage input end. The brightness of the light emitting element can be adjusted, and switching between a high-brightness mode and a high-contrast mode can be realized.

A calibrating Analog-to-Digital Converter (ADC) has an X-side array with binary-weighted capacitors that connect to an X-side line and a Y-side array connected to a Y-side line. Each array has binary-weighted capacitors from a most-significant-bit (MSB) to a least-significant-bit (LSB), but the LSB capacitor is duplicated as a termination capacitor and a middle capacitor between upper and lower groups is also duplicated as a surrogate capacitor. During calibration, lower array capacitors are switched low while the upper capacitors are driven by a thermometer-code value on both X and Y arrays. The thermometer value is inverted to the X-array but remains uninverted on the Y array. The lower array bits are tested to final a calibration value that has X and Y side voltages balanced.

The embodiment of the invention discloses a pixel driving circuit, an array substrate and a display device, and relates to the technical field of display devices. The threshold voltage of a driving transistor is compensated, so that the ununiformity problem of threshold voltage is solved, and the display effect of the display device is improved. The pixel driving circuit according to the embodiment of the invention comprises a driving transistor and an organic light emitting diode, and the pixel driving circuit further comprises a charging compensation module and a light emitting control module, wherein the charging compensation module is used for receiving data voltage signals under the control of scanning voltage signals, charging the driving transistor and compensating the threshold voltage of the driving transistor; and the light emitting control module is used for receiving a reference voltage and a power supply voltage under the control of light emitting control signals and controlling the organic light emitting diode to emit light.

A charge compensator for a voltage regulator of a semiconductor device includes a process / voltage / temperature (PVT) detector for detecting characteristics of the semiconductor device varying dependent on a manufacturing process, a voltage in use and an operating temperature of the semiconductor device and for outputting state signals representing the detected characteristics; a plurality of pass transistors for providing charge to the load, connected between a power supply voltage and the output of the voltage regulator; and a decoder for selectively driving the plurality of pass transistors based on the state signals from the PVT detector. The charge compensator adjusts the amount of charge supplied to the voltage regulator in accordance with variations of the PVT characteristics, thereby suppressing voltage fluctuations in the output of the voltage regulator.

A high-voltage semiconductor device includes a semiconductor layer having a plurality of pillars of a first conductivity type defined by a plurality of trenches which extend from a top surface of the semiconductor layer toward a bottom surface thereof. A charge compensation layer of a second conductivity type is disposed over at least sidewalls of each trench to a predetermined thickness to form a groove in each trench. A charge compensation plug of the first conductivity type substantially fills each groove.

A calibrating Analog-to-Digital Converter (ADC) has an X-side array with binary-weighted capacitors that connect to an X-side line and a Y-side array connected to a Y-side line. Each array has binary-weighted capacitors from a most-significant-bit (MSB) to a least-significant-bit (LSB), but the LSB capacitor is duplicated as a termination capacitor and a middle capacitor between upper and lower groups is also duplicated as a surrogate capacitor. During calibration, lower array capacitors are switched low while the upper capacitors are driven by a thermometer-code value on both X and Y arrays. The thermometer value is inverted to the X-array but remains uninverted on the Y array. The lower array bits are tested to final a calibration value that has X and Y side voltages balanced.

The invention relates to a system and a method for estimating surplus capacity of a lithium ion battery. The system comprises a SOC (State-of-Charge) prediction module, an ampere-hour integration module, a full-charge and low-charge compensation module, an aging compensation module, a self discharge compensation module, an open-circuit voltage compensation module, a consistency compensation module, and a charging and discharging compensation module. The SOC prediction module regards a voltage U, a current I and a temperature T as input, a basic battery surplus capacity SOC1 is calculated according to the ampere-hour integration module and an initial SOC value. According to compensation values of the full charge compensation module, the aging compensation module, the self discharge compensation module, the open-circuit voltage compensation module, the consistency compensation module and the charging and discharging compensation module, the final battery surplus capacity is calculated. The invention provides a practical, effective and reliable method for estimating the usable surplus capacity for the lithium ion power battery. And by the aid of the method, effectiveness and service life of the battery are improved, and after-sale maintenance period of a power battery pack is lowered.

The invention provides a detecting method and a device of pixel charging compensation, its compensation method and a display device. The detecting method includes steps of classifying a display zone of the display device into at least two compensation zones, and detecting the first brightness of a target pixel in every compensation zone; calculating the compensation time of charging the pixel in the compensation zone where the target pixel locates according to the differential value of the first brightness and the preset brightness. Thus, after compensating the pixel charging time in the compensation zone by the detected compensation time, the charging time of every pixel is approximately the same, so that the charging difference of pixels on different positions caused by the improvement of resolution rate, pixel density and image refreshing rate and delay of the signal line is reduced, the charging uniformity and sufficient charging time of pixels at different positions are guaranteed; besides, the brightness of different positions on the display zone of the display device is uniform.

A flat panel display device including a linked pixel formed of a first pixel electrically connected to a pixel adjacent to the first pixel; a memory storing the location of a panel defect area, a panel defect compensation data for compensating for a brightness difference of the panel defect area, location data describing a location of the linked pixel, charge characteristic compensation data for compensating for a charge characteristic of the linked pixel; and a compensation circuit to modulate the data to be displayed at the panel defect area using at least one of a frame rate control method and a dithering method and to modulate a charge characteristic of a digital video data to be displayed at the linked pixel based on the location data and the panel defect and charge compensation data stored in the memory.

A pyroelectric material of a quaternary skutterudite structure and a method for preparing the material, the chemical formula of the material is that CoSb3+delta-x-yXxYy, wherein the X is Se or Te, the Y is Ge or Sn, the delta is Sb compensation, and the x and the y are respectively the doping quantity of the X and the Y. The material is characterized by simultaneously doping IVB group and VIB group elements into CoSb3, and the material utilizes the charge compensation between the IVB group and the VIB group elements to increase the whole doping concentration, and introduces more point defect scatterings to reduce the heat conductivity. Under a proper condition, a CoX1.5Y1.5 phase can be separated from a Co-Sb-X-Y basal body and 'nanometer points' can be formed, and the additional scattering action can be generated to the phonon transport. The invention adopts the method of combining the mechanical alloying and the spark discharging plasma sintering, and prepares Co-Sb-X-Y quaternary materials with high pyroelectricity, and the non-dimensional value ZT of the material can reach 1.1 at 550 DEG C.

The invention discloses a novel AlGaN / GaN high-electronic-mobility transistor with the passivation layer charge compensation function. According to the novel crystal structure, charges are injected into a surface passivation layer between the grid electrode and the drainage electrode of the transistor, so that a charge compensation layer is formed, the charges exist on the surface of the transistor, surface electric fields are re-distributed through the electric field modulation effect on the premise that the AlGaN / GaN heterojunction polarization effect is not affected, a new electric field peak is generated, in this way, high electric fields on the edge of the grid electrode and at the drainage end are lowered, the surface electric fields tend to be even, and compared with a traditional structure, the breakdown voltage and the reliability of devices are improved remarkably; in addition, due to the fact that the charge compensation layer has the charge compensation function, the carrier concentrations of channels are re-distributed, the on resistance of the devices is reduced, and the output current is increased.

The invention provides a successive approximation register (SAR) analog-to-digital converter (ADC) trimming method based on charge compensation and a trimming circuit. The trimming circuit comprises a register block, an attenuation capacitor and a trimming array, wherein the register block comprises groups of registers, the trimming array includes multiple binary-weight capacitor networks, the trimming array is coupled to a to-be-trimmed main capacitor array through the attenuation capacitor, and the registers control the switching direction of corresponding capacitor switches in the trimming array. According to the trimming method and the trimming circuit, the charge compensation is carried out on the mismatched capacitors, the purpose that the capacitors are matched is achieved, compensation vector quantities can be configured through the registers, and the trimming method and the trimming circuit are suitable for being used in large-scale production and tests and can be carried out on most process platforms.

The invention discloses a phase-locked loop resistant to a single particle transient state. The phase-locked loop comprises a phase frequency detector, a charge pump, a filter, a voltage-controlled oscillator and a frequency divider. A single particle suppression circuit is arranged between the charge pump and the filter and comprises a charge discharge branch, decay resistor, and a charge compensation branch. One end of the damping resistor is connected with an output end of the charge pump, and the other end of the damping resistor is connected with an input end of the voltage-controlled oscillator. When voltage of the output end of the charge pump is reduced and charging is needed, the filter charges the output end of the charge pump through the single particle suppression circuit. When the voltage of the output end of the charge pump rises and discharging is needed, the output end of the charge pump charges the filter through the single particle suppression circuit. Due to the fact that the single particle suppression circuit is arranged between the charge pump and the filter of the phase-locked loop, when receiving single particle bombardment, the output end of the charge pump discharges or be charged so as to reduce voltage disturbance caused on the input end of the voltage-controlled oscillator.

The invention discloses a PSOI lateral super-junction power semiconductor device. The PSOI lateral super-junction power semiconductor device comprises a semiconductor body, an insulation buried layer, a gate and an electrode, wherein the gate and the electrode are arranged on the semiconductor body, a super-junction structure is arranged above the insulation buried layer, consists of super-junction n regions and super-junction p regions in alternate distribution, and is connected with a p-type body region. An n-type compensation region arranged in a direction vertical to the super-junction structure is connected with the super-junction structure and the insulation buried layer, and extends into a substrate. By the invention, the substrate-assisted depletion effect existing in the lateral super-junction power device can be effectively inhibited so as to improve the voltage resistance of the device. Compared with the conventional charge-compensation lateral super-junction device, the PSOI lateral super-junction power semiconductor device can better keep the super-junction voltage resistance property without increasing the thickness of the top silicon because the n-type compensation region is vertical to the super-junction structure.

The invention belongs to the technical field of semiconductor image sensing, and relates to an ultra-wide dynamic range image sensor based on a pixel charge compensation technology. The ultra-wide dynamic range image sensor based on the pixel charge compensation technology is composed of a photoelectric conversion module 1, an upper read-out processing module 21 and a lower read-out processing module 22 for controlling and reading out data of the photoelectric conversion module 1, a column decoding module 3 and an offset signal module 4. A pixel element is integrated with an element for charge compensation near a main photodiode, so pixel output saturation is avoided by compensating charge to an integrating capacitor of the main photodiode under a highlight condition. An apparatus forms a linear response as to the light intensity under a weak light condition, and the linear response is automatically converted into the linear response to a light intensity logarithm under a strong light condition, so as to obtain an extremely wide dynamic range; the amplitude of the output voltage of a pixel circuit is large; a column amplifier circuit does not need to be integrated; an analogue-digital convertor can be directly input; the design flow of the device is simplified; the chip area is saved; and the photoreceptive dynamic range is extremely wide, and the theoretical value can reach up to 200dB.

The invention relates to Mn<4+>-activated oxyfluoride red phosphor and a preparation method thereof. The general chemical formula of the red phosphor is A2[MO2F4]:Mn<4+>, wherein A can be Na, K, Rb or Cs, and M is Mo or W. According to the red phosphor, charge compensation can be carried out by introducing ions such as Li<+>, K<+>, Na<+>, Rb<+>, Cs<+>, Ca<2+>, Mg<2+>, Zn<2+>, Ba<2+> and Sr<2+>, so that the luminescence property is further improved. The red phosphor provided by the invention has a good compensation effect when being applied to a white light-emitting diode. The red phosphor can be efficiently excited by blue light, is emitted in a narrow-band linear shape, is high in color purity and quantum yield and simple in preparation technology, and needs less hydrogen fluoride (HF) when being prepared.

The invention provides a full-color phosphor of a single substrate single mixed lanthanum aluminate base with adjustable colors as well as a manufacture method. The invention belongs to the technical fields of photoelectric materials and apparatuses. The chemical formula of the phosphor is La1-aAlO3:Eua,Li<+>b, wherein, accounted by molal quantity, a is equal to or more than 0.02 and equal to or less than 0.2; b is equal to or more than 0.00 and equal to or less than 0.4; under the excitation of lights with wavelengths of 250nm to 400nm, the phosphor can simultaneously have three emission areas which include the blue lights the emission wavelengths of which are 440nm, the green lights the emission wavelengths of which are 515nm and the red lights the emission wavelengths of which are 592 and 618nm for composing the white light. The manufacture process is as follows: the weighed materials are dissolved into alcohol for forming serum and manufactured into powder through ultrasonic surging and drying; then the mixed gas of N2 and H2 is used as the reduction atmosphere for obtaining the phosphor under high temperature ignition. The spectrum characteristics of the phosphor can be effectively adjusted through adjusting the preparation technical conditions which include the ignition time, the ignition temperature, the reduction atmosphere and the adding concentration of a charge compensation agent of Li<+>. The full-color phosphor can be used for the white light apparatuses of a white light LED, a fluorescent lamp, and the like.

In one embodiment, a method of forming a semiconductor device with trench charge compensation structures includes exposing the trench sidewalls to a reduced temperature hydrogen desorption process to enhance the formation of monocrystalline semiconductor layers.