The invention relates to a 
processing method and a hardware module for enhancing the resolution of a 
digital video file with an ordinary resolution and then outputting the 
digital video file onto a high-definition 
display device for 
real time display. The method comprises the following steps of sequentially storing each frame image of a 
digital video material with 
low resolution rate into a cache of a FPGA 
embedded system; utilizing a standard interpolation 
algorithm (bilinear interpolation and bicubic interpolation and the like) to reasonably estimate and insert an undefined pixel value between two adjacent pixel point on each frame image, amplifying each frame image, maintaining the smoothness and 
contrast ratio of the image, improving the 
resolution rate of each frame image, i.e. the 
resolution rate of the video; and finally, sequentially and continuously outputting each processed frame image to the 
display device. The method and the module can be widely applied to the fields such as 
family life, 
medical imaging, 
security monitoring, intelligent car control and outdoor video advertisement and has the characteristics of high output 
resolution rate, strong real-time property, small size, simplicity and convenience in operation, low cost, high reliability and the like.