The invention relates to the technical field of semiconductors, and particularly discloses an
MOSFET device with low grid charge and a preparation method of the
MOSFET device. A
LOCOS isolation layer; a P-type
electric field regulation and
control layer is shallowly buried under the channel; a transverse
doping gradient channel; a
gate dielectric layer; a main gate; a shield grid structure; the source side
doping concentration of the asymmetric LDD region is 1 * 10 < 18 > cm <-3 >, the width is 0.1 mu m, and the depth is 50nm; the
doping concentration of the drain side is 5 * 10 < 17 > cm <-3 >, the width is 0.15 mu m, and the depth is 50nm; a drain region is provided with a two-stage stepped groove; a source-drain heavily doped region; and the
metal electrode comprises a source
electrode, a main grid
electrode, a shielding grid and a drain electrode. Through the synergistic effect of the shallow-buried P-type
electric field regulation and
control layer under the channel, the shield gate, the drain region two-stage stepped groove and the composite
gate dielectric, the gate-drain
coupling capacitance and the
gate capacitance are reduced in principle, the
Miller effect is inhibited, the ultra-thin gate and the NiSi
silicide are combined to reduce the gate driving loss, meanwhile, sub-threshold electric leakage is inhibited, static and dynamic
power consumption is doubly reduced, and the reliability of the device is improved. And the sensor endurance is prolonged.