Super-junction LDMOS (laterally double-diffused metal-oxide semiconductor) field effect transistor with double-electric-field modulation

Abstract

The invention proposes an SJ-LDMOS (super-junction LDMOS (laterally double-diffused metal-oxide semiconductor) field effect transistor with double-electric-field modulation) with double-electric-field modulation. In the SJ-LDMOS, a partitioning part in a form of an epitaxial layer projection structure is formed between a buffering layer of SJ drift region and a trench, thereby enabling the edge of the buffering layer to modulate an SJ drift region electric field close to the trench. The length of a P column in the SJ drift region is less than the length of an N column, i.e., the P column being separated from a drain region, thereby preventing the connection of the P column with the drain region from generating a peak electric field, and enabling the edge of the buffering layer to modulate the SJ drift region electric field close to the drain region. Therefore, a part of buffering layer below the SJ drift region and the P column structure at the upper part of the SJ drift region are employed for the modulation of two electric fields at two parts of the drift region of a device, thereby enabling the surface electric field of the device to tend to be uniform, and greatly enlarging a breakdown voltage of the device under the condition of guaranteeing low on resistance of the device.

Description

technical field [0001] The invention relates to the field of semiconductor devices, in particular to a lateral superjunction double-diffused metal oxide semiconductor field effect transistor. Background technique [0002] Lateral double-diffused MOS (Lateral Double-diffused MOS, LDMOS) as a representative of high withstand voltage, low on-resistance lateral power devices are widely used in high voltage integrated circuits (high voltage integrated circuit, HVIC) and smart power integrated circuits (smart power integrated circuit, SPIC). Super Junction SJ (Super Junction) technology can enable a very low on-resistance R under a certain breakdown voltage BV (Breakdown Voltage) ON , is applied to LDMOS to form SJ-LDMOS structure and breaks the limit relationship of traditional power MOS devices. However, many problems have been encountered in the process of realizing SJ-LDMOS, including the substrate-assisted depletion effect SAD (Substrate Assisted Depletion). The auxiliary ...

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Problems solved by technology

However, many problems have been encountered in the process of realizing SJ-LDMOS, including the substrate-assisted depletion effect SAD (Substrate Assisted Depletion). Adjacent P-pillars and P-type substrates are assisted in depletion, resulting in incomplete compensation of Super Junction charges, resulting in a significant decrease in BV

The traditional Super Junction with a buffer layer structure can effectively eliminate the substrate-assisted depletion effect, but the breakdown voltage of the device is still not ideal

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