17results about How to "Reduce layout area" patented technology

The application discloses a low-power bandgap reference current source circuit and a control method, and the circuit comprises a current mode bandgap circuit, an error amplifier input stage circuit, a threshold modulation circuit and a current mirror circuit; the current mode bandgap circuit is internally provided with an error amplifier OPAMP and a proportional resistance network; the error amplifier input stage circuit is a PMOS pair tube input stage circuit; the threshold modulation circuit is a source-liner forward bias threshold modulation circuit, which is used for forward biasing the threshold voltage of all PMOS tubes in the low-power bandgap reference current source circuit and enabling the NMOS tube connected with the error amplifier OPAMP output stage to work in a saturation region; and the current mirror circuit is a series diode compensation method current mirror circuit structure. The application is compatible with a standard CMOS process, realizes sub-1V low voltage, micro-nano ampere level low power consumption, high-precision low-noise small area effect, solves various technical pain points of a traditional scheme, and has excellent application prospects in a wearable device power management system.

This application provides a readout module, pixel unit and manufacturing method, pixel array and image sensor, including at least two readout circuits. Each readout circuit includes at least two first readout sub-modules, a floating diffusion node, and a second readout sub-module. The first readout sub-module is connected between the charge output terminal of the photosensitive module and the floating diffusion node, and the second readout sub-module is connected to the floating diffusion node. Each first readout sub-module can read an electrical signal of one phase, so the readout circuit can read at least two electrical signals of different phases. Correspondingly, the readout module can output at least four electrical signals of different phases, thereby ensuring that at least four electrical signals of different phases are read synchronously within a single frame. Furthermore, each readout circuit reuses one floating diffusion node and one second readout sub-module, which helps to reduce the layout area, improve the overall chip resolution, and reduce fixed-mode noise of the pixels.

The invention discloses a transmitter circuit with ringing suppression, which is suitable for being applied to a controller area network. The transmitter circuit comprises a controller area network bus driving circuit, a first operational transduction amplifier, a second operational transduction amplifier and a controller area network bus driving circuit, wherein the controller area network bus driving circuit is used for receiving a transmission data signal and generating a controller area network high-level signal and a controller area network low-level signal; the first operational transduction amplifier is used for receiving the controller area network high-level signal; and a second operational transduction amplifier for receiving the controller area network low level signal. A common-mode voltage signal in a dominant state and a control signal are adopted, and when the control signal is at a high voltage level, the first operation transduction amplifier and the second operation transduction amplifier can actively adjust high and low level signals of a controller area network to be consistent with the common-mode voltage, so that the ringing problem on a bus is inhibited and eliminated.

The application discloses an LED backlight drive chip, which comprises an LED pin, a high-voltage MOS switch tube M1, a low-voltage drive current MOS switch tube M2, an operational amplifier, a drive resistor and a pre-charge module; the pre-charge module comprises a pre-charge MOS switch tube M3, a pre-charge power supply and a pre-charge control unit. The LED backlight drive chip utilizes the body diode characteristics of the high-voltage MOS tube, sets the control MOS tube in the pre-charge circuit as a low-voltage device, thereby reducing the layout area of the semiconductor integrated circuit. And the fast response characteristics of the low-voltage MOS device are utilized to improve the pre-charge efficiency.

The invention provides a multiplexing system of a single-ended to differential signal driver and a detector reading chip, and belongs to the technical field of active electrical nonlinear devices. The system comprises a multi-channel capacitance trans-impedance amplifier, a corresponding ping-pong type switched capacitor sampling hold circuit, a multiplexer, a single-ended to differential signal driver and an ADC (Analog to Digital Converter). A capacitance trans-impedance amplifier of a selected channel receives an X-ray signal responded by a photoelectric sensor, voltage passes through a corresponding switched capacitor sampling holding circuit, and signal charges are stored on a group of holding capacitors; the ADC is connected to the input end of the single-ended to differential signal driver through the multiplexer and performs ADC quantization output; the single-ended to differential signal driver is of a switched capacitor type circuit structure. According to the invention, a unit gain voltage buffer required for driving CTIA output voltage during multi-channel switching is saved, extra noise introduced by Buffer is removed, and power consumption and layout area are reduced.

The embodiment of the application provides a multiplex card holder and a mobile terminal, the multiplex card holder is used for being installed in a card slot of the mobile terminal, and the multiplex card holder comprises a card holder body, an antenna, a feeding point and a feeding point, at least one SIM card insertion cavity is arranged on the card holder body, the antenna is at least formed on one side end surface of the card holder body along a thickness direction, the antenna is arranged along an outer periphery of the SIM card insertion cavity, the feeding point and the feeding point are arranged on an outer side wall of the card holder body, the feeding point is electrically connected with a radiation end of the antenna, and the feeding point is electrically connected with a grounding point of the antenna, wherein the feeding point and the feeding point are configured to be electrically connected with corresponding contact points of the mobile terminal, by arranging the antenna on the card holder body, the antenna setting position limit can be reduced, the antenna performance is improved, and the anti-interference capability is enhanced.

The utility model discloses a kind of radio frequency transceiving architecture and navigation equipment, it is related to radio frequency communication technical field, including array antenna module, radio frequency front-end Sip chip, transceiver chip and anti-interference baseband;Array antenna module is used to receive satellite navigation signal;Radio frequency front-end Sip chip integration finite amplifier, low-noise amplifier and acoustic surface filter, for processing satellite navigation signal to obtain pre-processing radio frequency signal;Transceiver chip integration has down-conversion module and up-conversion module;Down-conversion module converts pre-processing radio frequency signal into intermediate frequency signal;Anti-interference baseband is output to up-conversion module after intermediate frequency signal is handled by anti-interference algorithm;Up-conversion module converts intermediate frequency signal into radio frequency navigation signal and is output to navigation receiver.This scheme can solve the technical problems of numerous component models, high equipment cost, not conducive to miniaturization and light weight, high power consumption of existing navigation anti-interference equipment transceiving architecture.

The invention provides a multichannel capacitance acquisition system for time-sharing excitation output, which belongs to the technical field of airborne controllers and comprises a main processor, a capacitance excitation generation conditioning circuit, a gear matching circuit, a time-sharing excitation output circuit, an excitation signal acquisition circuit, a feedback signal acquisition circuit and an AD acquisition circuit. The main processor is connected with a capacitor excitation generation, gear matching and time-sharing excitation output circuit, the time-sharing excitation output circuit is connected with one end of a capacitor to be tested, an excitation signal is transmitted to the input end of an excitation signal acquisition circuit, and the other end of the capacitor to be tested is connected with a feedback signal acquisition circuit; the output ends of the excitation signal acquisition circuit and the feedback signal acquisition circuit are connected with the main processor through the AD acquisition circuit; the capacitance excitation generation conditioning circuit generates a sine excitation signal, the gear matching circuit performs gear excitation according to the capacitance value of the capacitor, and the time-sharing excitation output circuit outputs the excitation signal to each acquisition channel capacitor in a time-sharing manner. The capacitance acquisition efficiency and accuracy are improved, and interference between channels is reduced.

The application provides a MOS device testing system and a testing method. In the testing system, a multi-gate testing structure comprises a first injection well and a plurality of main gates above the first injection well, a first source-drain contact hole is formed above the substrate on both sides of each main gate, an auxiliary testing structure comprises a second injection well and a plurality of auxiliary gates above the second injection well, a second source-drain contact hole is formed above the substrate on both sides of each auxiliary gate, the auxiliary gates correspond to the main gates one by one, and the number of the source-drain contact holes formed on both sides of the corresponding auxiliary gate and main gate is different. The testing system can extract the relationship between the parasitic capacitance from the gate to the source-drain contact hole and the number of the source-drain contact hole, and the structure of the testing system is simple, which is beneficial to saving the layout area. The testing method tests the parasitic capacitance from the gate to the source-drain contact hole of the MOS device by using the above testing system.

This utility model belongs to the field of wafer insertion machine technology, specifically relating to a four-head wafer insertion machine layout structure, including: a conveyor production line, a three-axis transport device, a full basket conveyor line, and a return basket production line. Each conveyor production line is used to transport silicon wafers along the y-axis direction. Each conveyor production line has a lifting and loading device at its end, with a basket for loading silicon wafers mounted on it. The full basket conveyor line transports baskets loaded with silicon wafers along the y-axis direction, and the return basket production line transports empty baskets along the y-axis direction. The three-axis transport device moves baskets between the return basket production line, the full basket conveyor line, and the lifting and loading device. This utility model, through a reasonable equipment layout and automated operation process, effectively solves the technical problems of silicon wafer or equipment damage and low production efficiency caused by improper layout in existing technologies, achieving improved production efficiency and reduced breakage rate.

This invention discloses a high-gain transimpedance amplifier based on low-resistance feedback, belonging to the field of transimpedance amplifier technology for photoelectric sensors. It includes: a first resistor voltage divider bias circuit, a second resistor voltage divider bias circuit, a photodiode, a first feedback resistor, a second feedback resistor, and an operational amplifier. The operational amplifier is connected to the first resistor voltage divider bias circuit, the second resistor voltage divider bias circuit is connected to both the first and second feedback resistors, and the operational amplifier is connected to the photodiode. The first feedback resistor is connected to the operational amplifier, and the second feedback resistor is also connected to the operational amplifier. This invention provides the same voltage as the non-inverting input of the operational amplifier through the first feedback resistor. A voltage difference exists between the two input terminals of the operational amplifier, and the current is output through the transconductance effect of the operational amplifier. This enables the high-gain transimpedance amplifier to achieve high gain, reduces the total resistance of the feedback resistors, shrinks the overall layout area of ​​the transimpedance amplifier, and improves the circuit integration.

The present invention provides a gate transfer circuit and a display device. The gate transfer circuit includes multiple stages of gate transfer units. Each stage of the gate transfer unit includes a pre-charge module, a first output module, a second output module, an output pull-down module, a node pull-down module, and a stabilization module. The pre-charge module charges a first node according to a previous-stage transfer signal and a previous-stage gate signal. The first output module outputs a gate signal of the current stage according to the potential of the first node and a first clock signal of the current stage. The second output module outputs a transfer signal of the current stage according to the potential of the first node and a first clock signal of the current stage. The output pull-down module pulls down a first output terminal according to a subsequent-stage gate signal and a first low-level signal. The pull-down module pulls down the first node according to a subsequent-stage gate signal and a second clock signal of the current stage. The stabilization module is used to maintain a low level. The present invention can reduce the falling-edge time of the gate signal and improve the image quality of the product.

The invention discloses an anti-interference straight-through switching circuit of a satellite transceiver. The anti-interference straight-through switching circuit comprises a first comparator, a second comparator, a B3 straight-through circuit, a B3 anti-interference circuit, an S straight-through circuit and an S anti-interference circuit, an external mode control signal is input into the input end of the first comparator and the input end of the second comparator, and the output end of the first comparator is connected with the input end of the first B3 change-over switch and the input end of the second S change-over switch. The output end of the second comparator is connected with the input ends of the second B3 change-over switch and the first S change-over switch; the first comparator and the second comparator output opposite output signals; the structure of the B3 frequency point signal processing circuit and the S frequency point signal processing circuit on the circuit board is a central symmetry structure. According to the invention, switching of the direct-through circuit and the anti-interference circuit of the B3 frequency point and the S frequency point can be controlled through the two comparator circuits, the number of components required by a control part is greatly reduced, and the size, the weight and the structural complexity of equipment are effectively reduced.

The invention provides a processing method, an intelligent terminal and a storage medium. The intelligent terminal comprises a channel control chip, a filtering unit, an antenna switch, a first antenna and a second antenna. The antenna switch and the filtering unit are packaged into the same module. And the channel control chip is coupled with the module so as to control the antenna switch to select one of the first antenna and the second antenna to be matched with the filtering unit to execute communication. Through the technical scheme of the invention, the layout area of the radio frequency front end on the intelligent terminal can be greatly reduced, and the loss of a transmitting link and a receiving link can be effectively reduced, so that the loss of the whole intelligent terminal is reduced.

The utility model discloses a bipolar attenuator adopting a specifically packaged PIN diode, relates to the technical field of attenuators, and solves the technical problem that a traditional attenuator is difficult to consider both the size and the performance at the same time. The circuit comprises a positive-phase attenuation circuit and a negative-phase attenuation circuit which are vertically symmetrical, the input ends of the positive-phase attenuation circuit and the negative-phase attenuation circuit are electrically connected with a radio-frequency signal input end through a balun, and the output ends of the positive-phase attenuation circuit and the negative-phase attenuation circuit are electrically connected with a radio-frequency signal output end. The positive-phase attenuation circuit is electrically connected with a positive-phase control voltage, the negative-phase attenuation circuit is electrically connected with a negative-phase control voltage, and only one of the positive-phase attenuation circuit and the negative-phase attenuation circuit is conducted during use; according to the utility model, the performance requirement is met, the miniaturization requirement is also met, the application scene is diversified, and the circuit can be effectively protected.

The present application relates to a kind of thermal management system and its control method, specifically, a kind of AMT clutch thermal management system and the control method of the thermal management system.The system includes temperature sensor, signal interface, gearbox controller, heat exchange module, electric water pump and engine cooling system;Temperature sensor is installed on clutch pressure disc, and the output end of temperature sensor is electrically connected with the input end of gearbox controller by signal interface installed on clutch actuator;Heat exchange module is installed on the inner side wall of clutch shell, and the output end of engine cooling system is communicated with the input end of heat exchange module, and the input end is communicated with the output end of heat exchange module;Electric water pump is installed on the output end of engine cooling system, and its control end is electrically connected with the control end of gearbox controller.The present application can quickly heat or cool clutch pressure disc, keep clutch transmission torque characteristic at a stable value, and ensure the running state of vehicle.

The utility model relates to the technical field of circuit board especially is involved in a kind of double-spliced PCB layout structure based on aluminium substrate, it includes: aluminium substrate, insulation treatment is carried out on aluminium substrate and is covered with copper, to form copper-clad layer, first area and second area are provided on copper-clad layer, first area is used to place high-power device and forms electrical connection;PCB board, PCB board is set to the second area of copper-clad layer and is used to place small power component, PCB board is electrically connected with the first area and the second area of copper-clad layer respectively by the mode of soldering tin, forms electrical conduction.This application passes through the adoption of double-spliced layout, small power component can avoid direct contact with aluminium substrate, to reduce the overall thermal conductivity, so that the temperature of element on PCB board is significantly lower than direct placement on aluminium substrate, to increase the life of element.