64 results about "Phase margin" patented technology

The invention discloses a VSG control method for oscillation instability, and relates to the technical field of wind power control, and the method comprises the steps: determining the sequence impedance of a VSG grid-connected system according to a VSG inverter structure and a control circuit model; generating and analyzing a Bode diagram according to the sequence impedance of the VSG grid-connected system and the equivalent impedance of the power grids with different intensities to obtain a phase margin set; when at least one phase margin which is corresponding to the power grid intensity meeting the first preset condition and is a negative value exists, voltage and current tracking errors are calculated; calculating a current inner loop control rate according to a sliding mode surface function corresponding to the integral sliding mode surface, the voltage and current tracking errors and an exponential reaching law; when it is judged that the sliding mode surface function meets a second preset condition, an actual current measurement value is obtained; when the actual current measurement value does not conform to a third preset condition, the VSG grid-connected system sequence impedance is deduced again until no negative phase margin exists in the phase margin set; the steady-state error can be effectively eliminated, and the control performance is improved.

The invention discloses a first-order linear active disturbance rejection controller parameter setting method based on a phase margin method, and the method comprises the following steps: S1, obtaining simplified first-order inertia delay object parameters through an open-loop step response curve on site, and the simplified first-order inertia delay object parameters comprise the steady-state gain K, the inertia time constant T and the delay time tau of a controlled object; and S2, discussing and setting parameters of the controller according to conditions according to the ratio theta of the delay time tau of the controlled object to the inertia constant T. According to the first-order linear active-disturbance-rejection controller parameter setting method based on the phase angle margin method, the phase angle margin of the first-order linear active-disturbance-rejection controller is subjected to theoretical analysis, and the phase angle margin of the first-order linear active-disturbance-rejection controller and a closed-loop stable system of a controlled object is directly configured; and therefore, the problem of overshoot in parameter setting of the linear active disturbance rejection controller can be solved.

The invention discloses a new energy grid-connected system small signal stable working condition interval and stability margin determination method. The method comprises the steps that S1, a multivariable equivalent binary open-loop transfer function of a new energy grid-connected system about different operation working condition variables is acquired; s2, calculating a phase characteristic and an amplitude characteristic of the multivariable open-loop transfer function; s3, the phase characteristic is set to be phi k, and the amplitude characteristic is set to be 0dB; drawing a multi-phase contour map comprising a plurality of phase contour lines and amplitude contour lines; wherein phi k is a phase value related to the critical stability of the new energy grid-connected system; and S4, calculating the phase margin of the new energy grid-connected system at the intersection point of the phase contour line and the amplitude contour line, and determining the stable working condition interval of the new energy grid-connected system according to the operation working condition variable corresponding to the intersection point of the phase contour line and the amplitude contour line. According to the method, the stable operation interval of the grid-connected system in the whole operation working condition range can be obtained, and the distribution rule of the stability margin of the grid-connected system under different working conditions can be evaluated.

The invention discloses a servo system control method based on frequency domain self-tuning and linear active disturbance rejection, and relates to the technical field of servo control and motor control. Comprising the following steps: based on a mathematical model of a permanent magnet synchronous motor, establishing a double-inertia model suitable for a large-inertia servo system, and constructing an equivalent mathematical expression of an electrical and mechanical transmission system; in a three-stage cascade control architecture composed of a current loop, a speed loop and a position loop, the current loop is used for current adjustment, the speed loop is used for dynamic response adjustment, and the position loop is used for displacement target tracking. Based on a frequency domain performance index and a rule method, PI controller parameters of a speed loop and a position loop are set respectively, and the frequency domain index comprises an open-loop cut-off frequency and a phase margin; and establishing a frequency domain equivalent mapping relation between the PI controller and the LADRC controller. The method has the advantages that the method does not depend on accurate modeling and manual interference, automatic parameter setting can be achieved, non-overshoot dynamic response is achieved, and the remarkable disturbance suppression capacity is shown.

The invention discloses a self-stabilization zero operational amplifier circuit free from input imbalance and common mode influence, relates to the technical field of integrated circuits, and is applied to a high-precision operational amplifier. The operational amplifier is a three-stage operational amplifier and mainly comprises a single auxiliary input end zeroing amplifier, a main amplifier and an output stage. After a zero setting auxiliary input end of a traditional zero setting amplifier is changed into single-end input from differential input and a zero setting input stage is subjected to multi-stage design, an offset voltage of 3.8 microvolts, a low-frequency gain of 189dB and a gain bandwidth product of 8.6 MHz are realized under power consumption of 400 microamperes, the phase margin of the operational amplifier is 78 degrees under unit gain, and the stability requirement is met. Compared with a traditional structure, the low-residual-offset operational amplifier has the advantages that lower residual offset and larger operational amplifier bandwidth are achieved, and the application range is wider.

The invention discloses a single-loop droop control method and system for a wind generating set, and the method comprises the following steps: constructing a doubly-fed fan-power converter-power grid three-module coupling model, and completing the dynamic adaptation of the characteristics of a doubly-fed fan of a single-loop droop control architecture without inner-loop current control; based on the input signal-model collaborative integration body and the adaptive architecture, MIMO-GBC is adopted to analyze a phase margin and a resonance peak value of an open-loop transfer function matrix eigenvalue of a dynamic small signal model, and double risks are identified in a full slip rate interval; aiming at the resonance risk, a current induction type virtual impedance strategy is adopted; aiming at insufficient phase margin, adopting a transient phase calibration strategy; and according to the real-time slip ratio of the DFIG and the stator power change, inter-partition linkage optimization is carried out on the virtual resistance and the phase calibration angle so as to minimize a dual-power step response fluctuation square mean value, a parameter setting period and a rotor side converter control period are synchronously matched, and all-working-condition stable control is realized.

The invention belongs to the technical field of stability compensation circuits, and particularly relates to a stability compensation circuit structure of a high-speed operational amplifier, which is characterized by comprising a function module, a first control module, a second control module, a third control module, a fourth control module and a fourth control module, and the function module comprises an input stage, a differential common-base gain stage, a common-base level converter module and an output stage, and the stability compensation assembly comprises a dual-frequency load unit which is matched with the functional module and comprises a low-frequency load branch and a high-frequency load branch which are connected in parallel. Through the synergistic effect of the double-frequency load unit and the pole regulation and control capacitor, gain segmentation regulation and control of low-frequency high gain and high-frequency fast attenuation are achieved, the open-loop gain of the operational amplifier breaks through the limitation of 30dB of an existing HBT single-stage operational amplifier, and meanwhile the problem that high-frequency phase shift changes too fast is effectively restrained; through simulation verification, the phase margin can reach 67 degrees, the stability requirement of 45-60 degrees and above of an analog circuit is met, and the core contradiction that the high-gain bandwidth and the phase margin of an HBT device are difficult to balance is thoroughly overcome.

The utility model discloses an automatic phase margin compensation circuit. The system comprises a loop phase automatic compensation module arranged in a closed-loop system and a loop stability detection module connected between the output end of the closed-loop system and the loop phase automatic compensation module. The loop stability detection module can detect the frequency of the output signal of the loop and can start to automatically search a compensation position and compensate the phase margin of the loop when the frequency of the output signal is far higher than a set frequency threshold value. The system has the advantages that when the loop stability detection module judges that the loop is unstable, the loop phase automatic compensation module can provide phase compensation for the loop, so that the phase margin of the loop is enough, the loop is stable, and the stability of the loop is effectively improved through the addition of the loop stability detection module and the phase automatic compensation module.

This invention relates to a method for measuring the stability margin of a constant-temperature hot-wire anemometer based on in-situ open-loop frequency characteristics, belonging to the field of fluid measurement and automatic control technology. The method disclosed in this invention includes the following steps: S1. Connecting an ultra-low frequency low-pass filter to the closed-loop circuit to form an in-situ open-loop system with a DC closed loop and an AC open loop; S2. Injecting a sweep frequency excitation signal E at the bias circuit. stimu And measure the output response E of the amplifier circuit. a By comparing the amplitude ratio and phase difference of the two, the open-loop frequency response G of the system under actual operating conditions of the hot wire is obtained. open (jω); S3. According to G open (jω) Obtain the phase margin of the system and determine its stability. This invention proposes a new method for measuring the stability margin of a constant-temperature hot-wire anemometer, transforming the complex system stability problem into a measurable and analyzable open-loop frequency characteristic stability margin problem, providing a direct and reliable engineering basis for the circuit design of constant-temperature hot-wire anemometers.

The invention provides a robust design method and system for a fractional order PI controller of an inertia and delay fractional order object. The method comprises the following steps: describing a controlled object by adopting an inertia and delay fractional order transfer function; the feedback controller adopts a fractional order PI controller; a crossing frequency and a phase margin are given, and a proportional gain, an integral gain and a controller order of the fractional order PI controller are solely solved based on three constraint equations of the given crossing frequency, the given phase margin and zero slope of an open-loop phase of a closed-loop system at the crossing frequency; if a null set is solved, the values of the crossing frequency and the phase margin need to be given again, and solving is carried out; and traversing the range of the traversing frequency and the phase margin to obtain a feasible region of the fractional order PI controller. According to the method, the parameters and the feasible region of the fractional order PI controller can be directly calculated, it is guaranteed that the fractional order PI controller has high robustness, and the method has practical application value.

The application discloses a stability evaluation method suitable for a multiple-input multiple-output system and belongs to the technical field of stability control, which obtains the amplitude margin and the phase margin of the multiple-input multiple-output system by calculating the gain solution of the system at different frequencies when the system is critically stable. The application comprises the following steps: calculating the maximum range of the amplitude margin corresponding frequency according to the spectral radius of the transfer function of the multiple-input multiple-output system; calculating whether the amplitude gain solution exists at different frequencies within the frequency range, and if the amplitude gain solution exists, calculating the corresponding amplitude margin; drawing all the amplitude gains and solving the intersection points with the gain curve to obtain the amplitude margin; calculating the maximum range of the phase margin corresponding frequency according to the spectral radius of the transfer function of the multiple-input multiple-output system; calculating whether the phase gain solution exists at different frequencies within the frequency range, and if the phase gain solution exists, calculating the corresponding phase margin; and drawing all the phase gains and solving the intersection points with the phase gain curve to obtain the phase margin.

The invention relates to a low-power-consumption transient enhanced on-chip capacitor LDO circuit, which introduces a cyclic folding cascode operational amplifier technology, a feed-forward zero compensation technology, a self-adaptive dynamic bias technology and a transient enhancement technology, increases small signal gain at low frequency through a main body three-stage operational amplifier structure, and improves LDO precision, load regulation rate and linear regulation rate. The circuit performance is improved when the power consumption of the LDO is less than 10uA; two feed-forward paths are introduced, so that the transient response capability of the LDO is improved; meanwhile, a left half plane zero point is injected, the phase margin is increased, and LDO stability is guaranteed together with a Miller capacitor; a main LDO loop is matched with a transient enhancement circuit and a self-adaptive dynamic bias technology that copy current of a power tube is fed back to a first-stage operational amplifier is applied, so that output overshoot / undershoot voltage and response time during heavy / light load switching are reduced to a great extent on the premise that the stability of the whole circuit is not affected.

The application provides a parameter optimization method for improving the near power frequency stability of a new energy flexible direct transmission system, and the method comprises the following steps: dividing the new energy flexible direct transmission system into a source side subsystem and a load side subsystem, and respectively establishing positive and negative sequence impedance models of the source side subsystem and the load side subsystem; evaluating the stability margin of the system in the near power frequency band based on the above models; if the stability margin of the system in the near power frequency band is low, extracting dominant parameters affecting the near power frequency stability of the new energy flexible direct transmission system based on the phase margin sensitivity; determining the optimization interval of the dominant parameters based on the equivalent impedance criterion and the upper and lower limits of the parameter values; establishing the input and disturbance response transfer functions of the source side subsystem and the load side subsystem, evaluating the influence of the change of the dominant parameters on the power frequency control performance, and finally determining the optimal parameter values. The parameter optimization method can improve the near power frequency stability of the new energy flexible direct transmission system while minimizing the influence on the power frequency control performance of the system.

The application discloses a new energy flexible direct current transmission system wide-frequency oscillation adaptive suppression method and device, and the method comprises the following steps: adjusting a band-pass filter according to a detected oscillation frequency, so as to screen an oscillation component based on the adjusted band-pass filter; inputting the oscillation frequency and an operating condition into a pre-trained mapping relationship model to obtain mapping data of a phase margin and a damping coefficient, wherein the damping coefficient is within a preset adjustment range; selecting a target damping coefficient from the preset adjustment range according to the mapping data and a preset target phase margin, wherein the target damping coefficient makes the mapped phase margin reach the preset target phase margin; and suppressing the wide-frequency oscillation of the system according to the oscillation component and the target damping coefficient. The application can realize online adaptive suppression of the wide-frequency oscillation of the new energy flexible direct current transmission system, is suitable for different operating conditions, and can significantly improve the stability of the power system.

The application discloses an inverter stability optimization control method based on PLL link parameter adjustment. Firstly, the inverter, grid impedance network and the like are introduced into a phase-locked loop in the form of coupled interference of port characteristics, and a synchronous dynamic mathematical expression of the phase-locked loop and the coupled interference is established; secondly, according to the coupling relationship of the PLL in the system, a dynamic control equation of the inverter is determined. Then, based on the PLL dominant loop, the system stability is determined through the phase margin of the equation at the crossing frequency; finally, by adding a transfer function H(s) in series in the PLL to change the loop characteristics of the PLL, parameter design is carried out for the control optimization method of the PLL in different control modes; the application can clearly reveal the dynamic coupling between different frequencies in the phase sequence, can more intuitively study the admittance characteristics of the grid-connected inverter based on the PLL structure, and further proposes an optimization control method of the phase-locked loop to improve the stability of the PLL synchronization control under the condition of a weak grid.

The disclosed second-order residual gradient and frequency division confidence magnetic suspension bearing time delay dynamic compensation method realizes agile online identification of time-varying time delay through a nonlinear variable forgetting factor least square method driven by a residual second-order gradient, constructs a confidence function based on evaluation of high-frequency energy of frequency division of an identified residual, dynamically schedules weights of model-driven compensation and disturbance-driven compensation according to the confidence function, and realizes adaptive adjustment of compensation strength; in a reliable identification stage, the Pade approximation explicit hedge phase lag caused by time delay is used to significantly restore system phase margin; in an uncertain or time delay mutation stage, a residual feedforward mechanism of active disturbance rejection is introduced to instantaneously inhibit total disturbance of the system, effectively preventing unstable risks caused by over-compensation. The collaborative mechanism fully gives play to the complementary advantages of model-driven compensation and disturbance-driven compensation, so that the magnetic suspension bearing has higher dynamic performance and system safety under a variable time delay environment.

The invention discloses a subsynchronous oscillation stability region division method for a steam turbine generator grid-connected system, and belongs to the technical field of power system stability analysis. The invention aims to solve the problem that the existing method cannot realize the stability region division of the steam turbine generator under different operation conditions. Comprising the steps of obtaining a state equation of the steam turbine generator and processing to obtain generalized sequence impedance; decoupling is carried out to obtain positive sequence port impedance; constructing a two-dimensional parameterized model of the grid-side impedance based on the power grid short-circuit ratio and the series compensation degree; performing frequency domain comparison on the positive sequence port impedance and the network side impedance, analyzing the intersection frequency and the phase margin of the positive sequence port impedance and the network side impedance based on amplitude-frequency and phase-frequency characteristics, and dividing the subsynchronous oscillation state of the grid-connected system into a stable state, a critical stable state and an unstable state by combining an impedance stability criterion; and determining a stable state region, a critical stable state region and an unstable state region by combining the two-dimensional parameter plane. The method is used for evaluating the stability boundary of the system under different operation conditions.

The invention relates to a precise motion control-oriented loop attack modeling and stability compensation method, which comprises the following steps of: acquiring operation parameters of a precise motion control loop in real time, establishing a loop attack model comprising a delay injection attack and a noise superposition attack, and constructing a closed-loop control model comprising a feed-forward channel; performing frequency domain analysis according to the closed-loop control model, calculating a phase margin of a control loop, and triggering an instability alarm when the phase margin is lower than a preset margin threshold value; in response to the instability alarm, modeling a dynamic behavior of an attacked control loop into a state equation containing a feed-forward channel; and designing a feedforward compensation item by using a stability theory, dynamically adjusting a compensation parameter, and recovering a phase margin of a control loop to a stable interval, so as to achieve the purposes of attack real-time detection and dynamic stability compensation of the precise motion control system in an industrial Internet of Things environment.

The present invention discloses a microwave modulation method and device for a CPT atomic clock based on discrete sine wave frequency modulation, including: determining the frequency of the frequency discrimination signal; determining the charge pump current value according to the frequency of the frequency discrimination signal; determining the center frequency by setting the numerator frequency division coefficient and the denominator frequency division coefficient according to the charge pump current value and combining the frequency of the frequency discrimination signal; determining the VCO frequency band and the tuning range according to the center frequency; determining the target bandwidth and the phase margin according to the VCO frequency band and the tuning range, designing a third-order passive loop filter to filter the VCO output signal to obtain a filtered carrier signal; determining the modulation frequency, determining the maximum frequency deviation, determining the frequency deviation value and adjusting the microwave power gain according to the carrier signal, so as to generate a frequency modulation signal. This method can reduce the spectral broadening of the modulated microwave signal and improve the short-term frequency stability of the CPT atomic clock.

This invention discloses an operational amplifier based on a cyclic folded cascode architecture, relating to the field of analog circuit technology, to address the problems of low energy efficiency in existing folded cascode amplifiers and limited energy efficiency improvement in cyclic folded cascode structures. It includes a differential input transistor, a current mirror, an adaptive bias circuit, and an output stage. The adaptive bias circuit is connected to the differential input transistor, and the current mirror is connected to both the differential input transistor and the output stage. The adaptive bias circuit includes a flip-flop voltage follower. The current mirror is used for current recycling and zero-point compensation, and the output stage is used to output amplified signals. The adaptive bias circuit includes a flip-flop voltage follower to improve the dynamic performance of the amplifier. Zero-point compensation can improve the phase margin of the circuit, further improving the gain-bandwidth product. Compared to traditional operational amplifiers, the operational amplifier of this invention can achieve higher bandwidth and higher energy efficiency with lower power consumption.

The invention discloses a virtual synchronous generator power compensation control method, system and device and a medium, and relates to the technical field of flexible interconnection systems.The method comprises the steps that the initial open-loop cut-off frequency of a traditional VSG control system is obtained, and a damping correction ring is arranged in an active frequency ring; obtaining an updated open-loop cut-off frequency based on the expected phase margin, determining a lag coefficient of a damping correction loop, and calculating a time constant of the damping correction loop; based on the lag coefficient and the time constant, calculating equivalent virtual damping and equivalent virtual inertia provided by the damping correction ring for the system and judging whether the equivalent virtual damping and the equivalent virtual inertia both meet corresponding preset index requirements or not, and if not, adjusting the lag coefficient until the corresponding preset index requirements are met; and operating the system containing the damping correction ring to control the network construction converter. The method solves the problems that a traditional VSG control strategy is limited in effect and not large in adjustment range under the high resistance-inductance ratio working condition, and the provided virtual damping and virtual inertia are not high in suppression capacity for frequency and active power oscillation of the system.

The invention discloses a ring amplifier based on double-zero compensation, and the ring amplifier comprises a main amplifier which is used for receiving an input differential voltage signal, amplifying the differential voltage signal, and outputting an amplified signal; and the first zero inverter module and the second zero inverter module are connected with the main amplifier and are used for generating a first zero point and a second zero point and carrying out zero point compensation on the main amplifier based on the first zero point and the second zero point. According to the embodiment of the invention, zero compensation can be carried out on the main amplifier through the first zero inverter module and the second zero inverter module, so that the phase margin of the amplifier can be improved, the stability of the amplifier is improved, and the amplifier can be widely applied to the technical field of circuits.

The invention provides a PID (Proportion Integration Differentiation) controller robust design method and system of an inertia and delay fractional order object. The method comprises the following steps: describing a controlled object by adopting an inertia and delay fractional order transfer function; a proportional-integral-differential controller is adopted to describe the controller; a crossing frequency and a phase margin are given, and a proportional gain, an integral gain and a differential gain of a proportional-integral-differential controller are uniquely solved based on three constraint equations of the given crossing frequency, the given phase margin and the condition that the slope of an open-loop phase of a closed-loop system at the crossing frequency is zero (also known as phase flatness); if a null set is solved, the values of the crossing frequency and the phase margin need to be given again, and solving is carried out; according to the method, the proportional-integral-differential controller parameters can be directly solved on the basis of three given constraint equations such as the crossing frequency, the phase margin and the phase flatness, it is guaranteed that the proportional-integral-differential controller has high robustness, and the method has practical application value.

The application discloses a kind of island microgrid-oriented multi-source collaborative harmonic adaptive suppression method, it is related to island microgrid harmonic suppression technical field, comprising the following steps: extracting the fundamental component of island microgrid local inverter output voltage signal, obtain the real-time fundamental angular frequency perceived;Based on real-time fundamental angular frequency, separate harmonic component is realized by dynamic reconstruction signal delay chain, and the physical phase alignment of compensation vector and grid distortion source is carried out through feedforward correction logic, to prevent system shock induced by insufficient phase margin;Through the consistency protocol of information layer, and coupling aperiodic event trigger mechanism, after dynamic on-demand allocation of channel resources, closed-loop regulation is carried out to local harmonic compensation current.The application significantly reduces the throughput pressure of distributed channel and the invalid task load of processor, greatly improves the engineering reliability and system expansibility of distributed governance architecture in resource-poor environment.

The invention belongs to the technical field of analog integrated circuits, and particularly relates to a high-speed interstage gain amplifier based on source driving. The circuit comprises an input stage driven by a push-pull source electrode, a variable impedance module and a push-pull output stage. According to the push-pull type source electrode driving input stage, the four independent buffers are used for driving the source electrodes of the input transistors respectively, the transconductance of the input stage is improved to be four times that of a traditional scheme, and higher bandwidth and speed are achieved. Meanwhile, the input stage avoids the problem that the slew rate is limited by the current of the input stage in the traditional scheme, so that a higher slew rate can be realized. The impedance of the variable impedance module is relatively low in a static state, so that a relatively far secondary pole is realized, and the phase margin of the amplifier is ensured. When the input swing is large, the module realizes high impedance, and the grid voltage swing of the output stage is improved, so that the output current is expanded, and the overall speed of the amplifier is effectively improved.

The invention provides an operational amplifier with a compensation circuit, a chip and electronic equipment, and the amplifier comprises a differential pair module which is connected with two input signals and is used for carrying out the differential processing of the two input signals, and generating a differential signal; the folded cascode circuit comprises two stages of operational amplifiers; the bias current mirror circuit is respectively connected with the two stages of operational amplifiers and is used for providing bias current; the folded cascode circuit is used for performing two-stage amplification on the differential signal to obtain an output signal; wherein the RC network is connected between the positive output end and the negative output end of the auxiliary operational amplifier, and the phase margin of the folded cascode circuit is compensated by adding a pair of zero poles. The RC network is added to the output end of the auxiliary operational amplifier, and a pair of zero poles is added, so that the phase margin of the system becomes better, and the small signal establishment speed is also increased; meanwhile, the newly added RC network design method does not need to optimize the performance by increasing the size of the auxiliary operational amplifier, so that the size of the auxiliary operational amplifier is reduced, and the area and the power consumption are also reduced.

The invention relates to a buffer stability compensation circuit, the buffer adopts a two-stage operational amplifier structure, the buffer stability compensation circuit comprises a Miller compensation network connected between a first-stage output node and a second-stage output node of the two-stage operational amplifier structure; one end of the isolation resistor is connected to the second-stage output node, and the other end of the isolation resistor serves as the output end of the buffer and is used for being connected with an external capacitive load; wherein the isolation resistor and the external capacitive load jointly form an RC compensation network, and the RC compensation network is used for adjusting the zero pole position of the buffer so as to improve the phase margin. According to the invention, a large capacitive load at an output end in an actual CP test is utilized, an isolation resistor is added to form a new RC compensation network with the large capacitive load, and a left half plane zero point is effectively generated, so that the phase margin of a system is remarkably improved, and the stability of driving the large capacitive load is enhanced.

The invention discloses an online monitoring method for power loop gain of a grid-connected converter controlled by a virtual synchronous machine, which comprises the following steps of: firstly monitoring response signals on two sides of a disturbance signal, then filtering the response signals on the two sides, and processing by an integral regulator, so that the frequency of the disturbance signal can be updated and the process is continuously repeated; and the bandwidth and the phase margin of the power loop are obtained. Compared with a frequency sweeping mode, the method has the advantages that the performance of the power loop of the grid-connected converter controlled by the VSG can be monitored only with small computing power, and therefore control parameters in the VSG can be flexibly adjusted according to dynamic performance requirements.

The invention discloses a boost circuit system bandwidth optimization method, which comprises the following steps: acquiring an input signal, and outputting an output signal after system signal processing; in the system signal processing process, the duty ratios of the system are detected, and the gain of a compensation loop is modulated under different duty ratios, so that the bandwidth of the system is adjusted; the step of modulating the compensation loop gain comprises the substeps that when it is detected that the duty ratio is gradually increased, the compensation loop gain is increased, so that the system ride-through frequency is improved, the system phase margin is reduced, and the system response speed is increased; and when it is detected that the duty ratio is gradually reduced, the compensation loop gain is reduced, so that the system ride-through frequency is reduced, the system phase margin is increased, and the system stability is improved. The invention further discloses the boost circuit system, and the bandwidth optimization method of the boost circuit system is adopted. The dynamic performance can be optimized while the stability of the system is ensured, and the bandwidth of the system is improved.