576 results about "Linear regulator" patented technology

The invention provides a three-loop on-chip integrated low-dropout linear voltage regulator, which comprises a three-port source follower type voltage follower, which comprises a first anti-phase end, a normal phase end, a second anti-phase end and a first output end; the error amplifier is used for comparing a reference voltage with an output voltage so as to provide a first control signal for the first anti-phase end; the self-feedback bias module is used for receiving an internal voltage signal of the three-port source follower type voltage follower so as to provide a second control signal for the second anti-phase end; the grid electrode of the power tube is connected with the output end, the source electrode is connected with the power supply voltage, and the drain electrode serves as a second output end and is used for receiving the adjusting signal output by the first output end; the output driving current of the power tube is adjusted based on the adjusting signal; and the bias module is used for providing bias voltage for the three-port source follower type voltage follower and the error amplifier. The transient response performance of the voltage stabilizer can be improved under the condition of no off-chip large capacitance.

Circuits and methods for providing a “bootstrap” power supply for level-shifter / driver (LS / D) circuits in a FET-based power converter. In a first embodiment, linear regulators and a bootstrap capacitor provide a bootstrap power supply for level-shifter / driver circuits in each tier of a multi-level FET-based power converter. In a second embodiment, floating charge circuits and bootstrap capacitors provide an improved bootstrap power supply for level-shifter and driver circuits in each tier of a multi-level FET-based power converter. More particularly, a floating charge circuit configured to be coupled to an associated bootstrap capacitor includes a first sub-circuit configured to pre-charge the associated bootstrap capacitor when coupled and a second sub-circuit configured to transfer charge between the bootstrap capacitor and a bootstrap capacitor coupled to an adjacent floating charge circuit.

The present invention provides a common-mode transient suppression protection circuit for a digital isolator, including a modulation circuit, a demodulation circuit and an isolation capacitor connected between the modulation circuit and the demodulation circuit. The modulation circuit includes a modulation circuit front-end and a drive circuit, which are connected in sequence, and a clamping module is arranged in the drive circuit. The protection circuit further includes a linear voltage regulator structure connected with the drive circuit, and a power supply clamp is arranged in the linear voltage regulator structure. By providing the linear voltage regulator structure having the power supply clamp and the drive circuit having the clamping module in the protection circuit, low-voltage devices in the drive circuit can be protected from being damaged by high-voltage signals generated by common-mode transient interference.

The invention discloses an overcurrent protection control circuit of a low-dropout linear regulator and the low-dropout linear regulator, and relates to the field of voltage regulators. A first sampling module is connected with a drain electrode, a grid electrode and a source electrode of a power control tube in the low-dropout linear regulator and a first current comparator; the first current comparator is further connected with the grid electrode of the first protection switch and the input voltage end of the low dropout linear regulator, the source electrode of the first protection switch is connected with the grid electrode of the power control tube, the drain electrode of the first protection switch is grounded, and the source electrode of the power control tube is connected with the voltage output end of the low dropout linear regulator; the second sampling module is respectively connected with the drain electrode of the power control tube, the grid electrode of the power control tube and the clamping module, the clamping module is connected with the grid electrode of the second protection switch through the second current comparator and is also connected with the source electrode of the power control tube, the drain electrode of the second protection switch is grounded, and the source electrode of the second protection switch is connected with the grid electrode of the power control tube. The reliability of current limiting can be improved.

The invention relates to the technical field of chip detection, and discloses a high-reliability power supply chip circuit fault detection system, which comprises a built-in self-test architecture integrated in a low dropout regulator chip, and the built-in self-test architecture is provided with a first test mode and a second test mode which are switched based on a mode switching control circuit. The detection module is used for detecting key performance parameters of an error amplifier sub-circuit in a low dropout linear regulator chip, the detection module is used for measuring the direct current loop gain, the offset voltage, the common mode rejection ratio and the power supply ripple rejection ratio of the amplifier in the first test mode, and the detection module is used for measuring the unity gain bandwidth of the amplifier in the second test mode. According to the invention, through the design of a built-in self-test architecture and two test modes, abnormal states such as differential circuit imbalance and feedback loop fault can be identified in a bare chip stage, chips with poor performance are rejected in advance, and the LDO chip is ensured to reach a ppb-magnitude high reliability standard.

The invention belongs to the technical field of analog integrated circuit design and memory read-write, and provides a multi-valued RRAM read-write circuit with a write-and-read function. The multi-valued RRAM read-write circuit is a multi-port device capable of performing read-write simultaneously, in write operation, a low dropout regulator is utilized to provide voltage for the RRAM circuit and the standard resistance circuit, mirror current is generated, the resistance value of the RRAM is set to be the total resistance of the standard resistance circuit, an operational amplifier is connected into the circuit through a CMOS switch, and feedback is formed to stabilize the voltage at the two ends of the RRAM; and in the read operation, the CMOS switch is used for disconnecting the operational amplifier, and the voltage at the two ends of the RRAM device is directly read. Compared with an existing multi-valued read-write circuit, the multi-valued RRAM read-write circuit has the advantages that write-and-read multi-valued RRAM read-write is realized, and meanwhile, the read-write circuit is not separated, so that the write-in speed is increased, and the area of the read-write circuit is saved.

The utility model provides a low dropout linear regulator, which comprises a flip voltage follower, the flip voltage follower comprises a cascode current mirror, a power tube and a voltage control circuit, the voltage control circuit comprises an error amplifier, the error amplifier forms a voltage follower and is connected to the power tube through the cascode current mirror, and the power tube is connected to the flip voltage follower through the cascode current mirror. The output voltage of the low-dropout linear voltage regulator is stabilized at the reference voltage, the flip voltage follower is adopted, an off-chip capacitor does not need to be arranged, and compared with a traditional low-dropout linear voltage regulator based on a resistor voltage division feedback structure, the low-dropout linear voltage regulator is higher in circuit stability and faster in transient response, so that the low-dropout linear voltage regulator has wider application scenes.

The invention discloses a low dropout linear regulator with a wide dropout range, which is characterized in that an error amplifier is supplied with power by output voltage of the low dropout linear regulator, and a common-gate buffer is supplied with power by input voltage of the low dropout linear regulator, so that a direct interference path of the input voltage to the output only exists in a common-gate buffer stage and an output stage; and the power supply rejection ratio is improved. The common-gate buffer solves the problem of margin loss caused by a traditional source follower circuit, a positive feedback loop arranged in the common-gate buffer is used for improving the slew rate of a driving signal VPGATE and providing a certain gain, and therefore the problem of margin under low dropout is solved, and the reliability of the driving circuit is improved. And the compensation circuit can adjust the compensation amount of the low-dropout linear regulator when the input voltage is higher than a preset threshold value, so that the stability of the low-dropout linear regulator under different working conditions is improved.

A low-dropout regulator having an output voltage switching circuit is provided. In the low-dropout regulator, a low-dropout linear regulator circuit outputs a regulating signal according to a voltage difference between a second terminal of a transistor and a regulating threshold voltage signal or a reference voltage. In the low-dropout regulator, a switch error amplifier circuit outputs a pull-up control signal according to a voltage difference between the second terminal of the transistor and a voltage pull-up switching signal. When a voltage selector circuit of the low-dropout regulator selects the regulating signal, the transistor operates to regulate an output voltage of the low-dropout regulator according to the regulating signal. When the voltage selector circuit selects the pull-up control signal, a switch component is turned on by the pull-up control signal such that the output voltage of the low-dropout regulator is directly pulled up by an input voltage.

The utility model provides a transient enhancement circuit applied to a low dropout regulator, and relates to the technical field of analog integrated circuits. The overvoltage detection circuit drives the charging and discharging circuit to charge the grid electrode of the power output tube to lower the output voltage when the output voltage of the low dropout linear regulator exceeds the first voltage threshold value, and meanwhile, the undervoltage detection circuit drives the charging and discharging circuit to charge the grid electrode of the power output tube to lower the output voltage when the output voltage is smaller than the second voltage threshold value. When the output voltage of the low dropout linear regulator changes instantly and rapidly along with a load or changes in a rapid jitter phenomenon of the input voltage, the charging and discharging circuit is driven to discharge the grid electrode of the power output tube so as to increase the output voltage. The low-dropout linear regulator can quickly and adaptively cooperate with a negative feedback loop included in the low-dropout linear regulator to realize a timely output voltage transient response adjustment effect, so that the corresponding output voltage can be effectively limited to a set threshold range and quickly recovered to a stable state.

The invention is suitable for the technical field of electronic circuits, and provides a wide-load-capacitance low-dropout linear regulator circuit, a power supply device and electronic equipment. The wide load capacitance low dropout linear regulator circuit comprises a bias module, a first operational amplifier module, a second operational amplifier module, a third operational amplifier module, a first compensation module and a second compensation module, and the first operational amplifier module is electrically connected with the bias module, the second operational amplifier module and the first compensation module. The third operational amplifier module is electrically connected with the second operational amplifier module, the second compensation module and the first operational amplifier module. A first zero point generated by the first compensation module is used for compensating the second pole, and a second zero point generated by the second compensation module is used for compensating the third pole. Therefore, according to the design architecture of the wide-load-capacitance low-dropout linear voltage regulator circuit provided by the embodiment of the invention, the two zero points effectively compensate the corresponding poles, the phase margin of the circuit is remarkably improved under the wide-range load capacitance, and the stability of the circuit is enhanced.

The invention relates to the field of integrated circuit design, and particularly discloses a high power supply rejection ratio and low swing driving frequency-locked loop circuit and a control method thereof, a low dropout regulator is adopted to provide independent power supply lower than a main power supply voltage for a voltage-controlled oscillator, and double optimization effects are achieved. The clean power supply provided by the low dropout linear regulator effectively isolates the interference of the main power supply noise to the voltage-controlled oscillator, so that the power supply noise suppression capability of the circuit is remarkably enhanced, and the jitter of an output clock signal is greatly reduced; and on the other hand, the working voltage of the voltage-controlled oscillator is allowed and dynamically regulated and controlled to be optimized in a low range meeting the performance according to the real-time load of the voltage-controlled oscillator, so that on-demand power supply is realized, the dynamic power consumption of the voltage-controlled oscillator is reduced to the maximum extent while the output quality is not reduced, and the energy efficiency of the whole circuit under different load conditions is improved.

The invention discloses a high-performance high-low dropout linear regulator PSRR layout method, and belongs to the technical field of voltage regulator layout design optimization. Comprising the following steps: S1, acquiring an LDO layout, and performing circuit analysis and layout analysis; and S2, redesigning the power supply network according to circuit analysis and layout analysis results. Through circuit analysis and layout analysis, deep analysis and post-simulation analysis of an existing LDO layout and continuous loop iteration optimization of the layout, the design of the high-performance low-dropout linear voltage regulator is finally achieved, the PSRR of the LDO can be effectively improved, and the stability and reliability of the voltage regulator under various working conditions are ensured.

The ultralow frequency sensor comprises a vibration detection unit, a power supply voltage stabilization unit and a signal conditioning unit, the power supply voltage stabilization unit is provided with a low dropout linear voltage regulator U20, a voltage converter U19 and a negative voltage regulator U21, and the low dropout linear voltage regulator U20 stabilizes an external power supply as a positive power supply VCC; the voltage converter U19 is used for converting positive voltage of an external power supply into negative voltage and outputting stable negative power supply VEE through the negative voltage stabilizer; the positive power supply VCC and the negative power supply VEE supply power to the signal conditioning unit; the signal conditioning unit comprises a high common mode rejection differential amplifier, a differential-to-single-ended amplifier, a band-pass filter and a differential output driver, a differential signal output by the vibration detection unit sequentially passes through the high common mode rejection differential amplifier, the differential-to-single-ended amplifier, the band-pass filter and the differential output driver, and then a differential voltage signal is output; the method has the advantages of high stability and reliability and the like.

The embodiment of the invention provides a multi-output isolated power supply, which comprises a power transformer comprising a single primary side coil and a single secondary side coil; a switch driving circuit coupled to the primary coil to output a driving voltage to the primary coil based on the input voltage; a rectification circuit coupled to the secondary coil and configured to rectify a voltage across the secondary coil to output a first DC voltage at a first rectified voltage output end and a second DC voltage at a second rectified voltage output end; and an output unit coupled to the first rectified voltage output terminal and the second rectified voltage output terminal, the output unit comprising one or more low dropout linear regulator circuits, where an output terminal of a predetermined low dropout linear regulator circuit is coupled to the secondary circuit ground, the output unit is configured to output at least one positive voltage and at least one negative voltage with a voltage at an output terminal of a predetermined low dropout linear regulator circuit as a reference.

A multi-input low-dropout (LDO) linear voltage stabilizing circuit and a control method therefor. The multi-input LDO linear voltage stabilizing circuit comprises a LDO unit, comprising a first LDO linear regulator (LDO1) and a second LDO linear regulator (LDO2) connected to a same output node, wherein the first LDO linear regulator (LDO1) comprises a first operational amplifier (AMP1) and a first power device (201), the input voltage of the first LDO linear regulator (LDO1) is a first input voltage (VIN), the second LDO linear regulator (LDO2) comprises a second operational amplifier (AMP2) and a second power device (202), and the input voltage of the second LDO linear regulator (LDO2) is a second input voltage (BIAS); and a reference voltage selection unit (10), used for selecting, when the first LDO linear regulator (LDO1) is switched to the second LDO linear regulator (LDO2), the reference voltage of the first operational amplifier (AMP1) as a second reference voltage (VREFb), and the reference voltage of the second operational amplifier (AMP2) as a first reference voltage (VREFa), wherein the first reference voltage (VREFa) is higher than the second reference voltage (VREFb). By optimizing the structure and the working time sequence of a multi-input LDO circuit, stable switching among different LDOs can be achieved, the power supply fluctuation amplitude of an internal analog circuit is greatly reduced, the output voltage of the LDOs during different switching does not trigger UVLO by mistake, and the normal working state and good performance of the circuit are guaranteed.

The invention discloses a three-feedback loop quick-response low-dropout linear regulator which comprises a first part circuit, a second part circuit, a third part circuit and a fourth part circuit, wherein the first part circuit provides reference voltage VREF; the second part circuit is used for receiving the reference voltage VREF and the feedback voltage VFB, comparing and judging the reference voltage VREF and the feedback voltage VFB, realizing voltage error comparison and feedback regulation control, and outputting voltage VERR and bias current IPB1; the third part circuit is used for receiving the voltage VERR, determining the positions of dominant poles of the second loop and the third loop and improving the phase margin of the loops; the fourth part circuit is used for receiving the bias current IPB1 and outputting bias voltages VB1 and VB2; the fifth part circuit isolates the second part circuit and the sixth part circuit; the sixth part circuit is used for outputting a small-fluctuation stable voltage VOUT and a feedback voltage VFB; the voltage VOUT is used as the output voltage of the low dropout linear regulator; the device has the advantages of high integration level, fast transient response, high stability and simple structure.

The invention provides a transimpedance type flip voltage following driving linear voltage regulator, which comprises a control module and a transimpedance type flip voltage follower, namely a TIFVF module, and is characterized in that the control module comprises an error amplifier and a voltage-current converter which are connected in series; the output voltage Vout passes through a selectable divider resistor and then is fed back to an error amplifier to be compared with the reference voltage Vref to obtain an error signal, the error signal is amplified and conditioned by a compensation network to obtain a control voltage signal Vctrl, and the control voltage signal Vctrl passes through a voltage-current conversion circuit to obtain a current control signal Ictrl required by the TIFVF; the whole forms a negative feedback loop, and two links of error amplifier-voltage and current conversion provide enough loop gain.

The invention discloses a low dropout linear regulator with low power consumption and high performance. The low dropout linear regulator comprises a reference source circuit, a buffer circuit, a control circuit, a load circuit and an output control loop, the reference source circuit is connected to the buffer circuit, the buffer circuit outputs target voltage to the control circuit and feeds back the target voltage to the input end of the buffer circuit, and the control circuit generates control voltage to the output control loop and then outputs the control voltage to the load circuit; an output feedback stage sub-circuit in the output control loop is respectively connected with the control circuit and the output circuit and feeds back an output voltage to an amplification stage sub-circuit, and after the output voltage is amplified and gained by the amplification stage sub-circuit and a current buffer stage sub-circuit, the output voltage is close to a target voltage and is stably output. According to the technical scheme, the buffer circuit and the output circuit are completely separated through the output control loop, large stray capacitance at the input end of the buffer circuit and high output impedance at the output end of the buffer circuit are prevented from being introduced into the loop, and therefore the output bandwidth is increased, and the dynamic response is enhanced.

The invention belongs to the field of power management in analog integrated circuits, and particularly relates to a digital auxiliary analog low dropout regulator without an off-chip capacitor. Comprising a control module, a band-gap reference circuit, a transient enhancement circuit, a transient enhancement power tube group, an analog loop and a digital loop, in a load steady state, an analog LDO is adopted as a main control scheme, a high-gain amplifier can obtain accurate output voltage, and limit cyclic oscillation does not occur. A digital LDO is called as a main control scheme only when a load transient occurs, so that the speed is increased, the quiescent current is reduced, and the switching noise is suppressed. On-chip integration, high-precision output voltage, wide load current range, fast transient response speed, high-efficiency power tube area utilization rate and low output ripple can be realized. The circuit is suitable for SoC modular power management and digital IP load.

The utility model provides a navigation computer circuit core board which comprises a core board, a micro control unit MCU and a field programmable gate array FPGA, the micro control unit MCU and the field programmable gate array FPGA are embedded in the core board, the core board is connected with a bottom board through a board connector, and the MCU is connected with a FLASH memory through an SDIO and performs read-write operation on the FLASH memory; the crystal oscillator is connected with the MCU and the FPGA and provides a frequency source; the linear voltage regulator LDO converts an external power supply into an internal power supply to supply power to each component; the number of the programming interfaces is two, and the programming interfaces are used for programming MCU and FPGA software; the MCU accesses the FPGA through an EXMC parallel bus; and the data acquisition interface and the external communication interface are arranged on pins of the inter-board connector. According to the utility model, the most complicated core part of the navigation computer circuit can be solidified, and the navigation computer circuit has the advantages of high performance, low cost, low power consumption, small size, abundant interfaces, simplicity and convenience in development and the like.

The present disclosure proposes a switching power supply, comprising a power supply capacitor, for generating a power supply voltage to supply a control chip of the switching power supply with power, its first end being connected to the power supply terminal of the control chip of the switching power supply, its second end being grounded, and the first end generates a power supply voltage; a linear regulator circuit connected between the first end of the power supply capacitor and a common connection end of the main power transistor and the auxiliary power transistor; wherein, the voltage at the connection end between the main power transistor and the auxiliary power transistor charges the power supply capacitor through the linear voltage regulator The present disclosure can save power consumption, improve the working efficiency of switching power supply, and optimize the EMI of switching power supplies.

An example apparatus includes a first transistor having a control terminal and first and second terminals. The apparatus includes a second transistor having a control terminal and first and second terminals, the second terminal of the second transistor coupled to the second terminal of the first transistor. The apparatus includes a first amplifier having a first input, a reference input, and an output, the first input of the first amplifier coupled to the first terminal of the first transistor, the output of the first amplifier coupled to the control terminal of the first transistor. The apparatus includes a second amplifier having first and second inputs and an output, the first input of the second amplifier coupled to the first terminal of the first transistor, the second input of the second amplifier coupled to the first terminal of the second transistor, and the output of the second amplifier coupled to the control terminal of the second transistor. The apparatus includes a control circuit coupled to the control terminal and the second terminal of the second transistor and coupled to the first transistor, the control circuit capable of adjusting a voltage at the control terminal of the second transistor responsive to a current through the first transistor.

The invention discloses a low output voltage detection circuit based on a low dropout linear regulator, relates to the technical field of power supply detection, and realizes accurate detection of an output voltage rising stage through cooperation of a first amplification delay circuit, a second amplification circuit and a first comparison circuit; through cooperation of a third amplification circuit, a fourth amplification time-delay circuit and a second comparison circuit, reliable monitoring of an output voltage drop stage is completed. Wherein the amplification circuit can flexibly adjust the amplification factor to adapt to wide-range output voltage detection; the time delay circuit can accurately regulate and control the signal overturning time sequence, and the system control requirement is met; the comparison circuit and the AND gate circuit construct a rigorous logic control system, and the accuracy of signal output is guaranteed. Through creative combination of the circuit modules, an efficient low-output voltage detection scheme is formed, the technical problem that the voltage establishment state cannot be reflected in a low-voltage scene is thoroughly solved, and accurate detection of the low-output voltage of the LDO is achieved.

The invention discloses a clock-free wake-up circuit of a low-power-consumption MCU (Microprogrammed Control Unit). The clock-free wake-up circuit comprises an external signal wake-up module, a linear voltage regulator, a power management unit, a clock generation control module and a CPU (Central Processing Unit), the external signal wake-up module receives an external wake-up signal of the MCU, and generates a clock enable signal and a power enable signal based on the external wake-up signal; the clock generation control module generates an internal wake-up signal after receiving the clock enable signal and sends the internal wake-up signal to the power management unit; and the power supply management unit is used for performing reset power supply on the clock generation control module and the CPU and awakening the CPU, the linear voltage regulator and the clock generation control module after receiving an internal awakening signal. According to the invention, the PMU is started by using the external wake-up signal to complete wake-up, so that the PMU is prevented from using a low-speed clock which runs all the time, and the power consumption of the PMU and the MCU is reduced; and the wake-up mark is cleared by using the clearing signal, so that the adverse effect of a plurality of wake-up marks is avoided.

The present invention relates to the technical field of battery management systems, and in particular to a battery management system for an unmanned aerial vehicle, wherein the battery management system comprises: an intelligent battery management module, a power switch module and an isolated power supply module; wherein the intelligent battery management module is electrically connected to the power switch module and the isolated power supply module respectively; wherein the intelligent battery management module comprises a buck converter, a low voltage difference linear regulator, a voltage measurement unit, a temperature measurement unit, a current measurement unit, a power management unit, a logic control unit, a MOSFET drive unit, a communication interface unit and a load detection unit; the present invention adopts an extremely simplified and highly integrated solution with a highly integrated, high-performance and high-precision intelligent battery management SOC as the core, thereby reducing the number of components, reducing the complexity of the solution and improving the reliability of the solution.

The invention discloses a low dropout linear regulator and a control method, a mode control circuit in the low dropout linear regulator compares a power supply voltage with a reference voltage threshold value, and outputs a target level signal of a corresponding level state according to a comparison result; the feedback circuit triggers a corresponding gating state according to the target level signal; wherein in different gating states, the resistance values of the resistors connected between the error amplification module and the grounding end of the feedback circuit are different, and the feedback voltages, output to the error amplification module based on the power supply voltage, of the feedback circuit are different; and a power output circuit of the low dropout regulator outputs corresponding power supply voltage according to the error signal output by the error amplification module. The low-dropout linear regulator can output different power supply voltages according to different power supply voltages, the actual requirement for inputting different power supply voltages to different modules of an analog circuit and a digital circuit is met, and internal power supply of a large-scale integrated circuit can be achieved.

The invention discloses a low dropout regulator circuit, a power supply and electronic equipment, and belongs to the technical field of electronic equipment. The LDO circuit comprises a voltage sampling circuit, an output power tube, an error amplifier and a current sampling circuit. Under the condition that the LDO circuit jumps downwards, the current sampling circuit can collect increased sampling current, so that the error amplifier generates increased error amplification voltage, the output voltage of the output power tube is rapidly reduced, the overshoot voltage of the LDO circuit is reduced, and the state recovery duration of the output voltage of the LDO circuit is shortened. Under the condition that the LDO circuit jumps upwards, the current sampling circuit collects reduced sampling current, so that the error amplifier generates reduced error amplification voltage, the output voltage of the output power tube is rapidly increased, the undershoot voltage of the LDO circuit is reduced, the state recovery duration of the output voltage of the LDO circuit is shortened, and the load transient response capacity is improved.

The utility model discloses a switching-in circuit compatible with multiple voltage levels, and effectively solves the problem that a protection device circuit is not suitable for different voltage levels. Comprising an input circuit which comprises an anode input port and a cathode input port; the resistance voltage division circuit comprises a positive voltage division resistor and a negative voltage division resistor; the level adjusting circuit comprises a linear voltage regulator, the linear voltage regulator comprises a voltage stabilizing input port, a voltage stabilizing output port and an adjusting port, the adjusting port is connected with a first adjusting resistor and a second adjusting resistor, one end of the first adjusting resistor is connected with the negative electrode input port, and the other end of the first adjusting resistor is connected with the negative electrode output port. One end of the second adjusting resistor is connected in parallel with the voltage stabilization output port; according to the utility model, the structure is ingenious, the use is convenient, through the arrangement of the jumper wire and the linear voltage regulator, not only can adjustment be carried out according to different voltage class inputs, the damage of high voltage to components be prevented, but also the versatility of the equipment circuit is improved.

A buffer circuit, a linear regulator, a display panel, and a head-mounted display device. The buffer circuit (20) comprises an error amplification module (11), a voltage clamping module (12), and an output module (13); an input end of the voltage clamping module (12) is connected to an output end of the error amplification module (11), an output end of the voltage clamping module (12) is connected to a first input end (O1) of the output module (13), and the voltage clamping module (12) is configured to clamp, when a load current changes, the voltage of the output end of the error amplification module (11) and then transmit the clamped voltage to the first input end (O1) of the output module (13); and a second input end (O2) of the output module (13) is connected to an input end of the buffer circuit (20).