168 results about "Linear regulator" patented technology

The invention belongs to the technical field of analog integrated circuit design and memory read-write, and provides a multi-valued RRAM read-write circuit with a write-and-read function. The multi-valued RRAM read-write circuit is a multi-port device capable of performing read-write simultaneously, in write operation, a low dropout regulator is utilized to provide voltage for the RRAM circuit and the standard resistance circuit, mirror current is generated, the resistance value of the RRAM is set to be the total resistance of the standard resistance circuit, an operational amplifier is connected into the circuit through a CMOS switch, and feedback is formed to stabilize the voltage at the two ends of the RRAM; and in the read operation, the CMOS switch is used for disconnecting the operational amplifier, and the voltage at the two ends of the RRAM device is directly read. Compared with an existing multi-valued read-write circuit, the multi-valued RRAM read-write circuit has the advantages that write-and-read multi-valued RRAM read-write is realized, and meanwhile, the read-write circuit is not separated, so that the write-in speed is increased, and the area of the read-write circuit is saved.

The ultralow frequency sensor comprises a vibration detection unit, a power supply voltage stabilization unit and a signal conditioning unit, the power supply voltage stabilization unit is provided with a low dropout linear voltage regulator U20, a voltage converter U19 and a negative voltage regulator U21, and the low dropout linear voltage regulator U20 stabilizes an external power supply as a positive power supply VCC; the voltage converter U19 is used for converting positive voltage of an external power supply into negative voltage and outputting stable negative power supply VEE through the negative voltage stabilizer; the positive power supply VCC and the negative power supply VEE supply power to the signal conditioning unit; the signal conditioning unit comprises a high common mode rejection differential amplifier, a differential-to-single-ended amplifier, a band-pass filter and a differential output driver, a differential signal output by the vibration detection unit sequentially passes through the high common mode rejection differential amplifier, the differential-to-single-ended amplifier, the band-pass filter and the differential output driver, and then a differential voltage signal is output; the method has the advantages of high stability and reliability and the like.

The present disclosure proposes a switching power supply, comprising a power supply capacitor, for generating a power supply voltage to supply a control chip of the switching power supply with power, its first end being connected to the power supply terminal of the control chip of the switching power supply, its second end being grounded, and the first end generates a power supply voltage; a linear regulator circuit connected between the first end of the power supply capacitor and a common connection end of the main power transistor and the auxiliary power transistor; wherein, the voltage at the connection end between the main power transistor and the auxiliary power transistor charges the power supply capacitor through the linear voltage regulator The present disclosure can save power consumption, improve the working efficiency of switching power supply, and optimize the EMI of switching power supplies.

An example apparatus includes a first transistor having a control terminal and first and second terminals. The apparatus includes a second transistor having a control terminal and first and second terminals, the second terminal of the second transistor coupled to the second terminal of the first transistor. The apparatus includes a first amplifier having a first input, a reference input, and an output, the first input of the first amplifier coupled to the first terminal of the first transistor, the output of the first amplifier coupled to the control terminal of the first transistor. The apparatus includes a second amplifier having first and second inputs and an output, the first input of the second amplifier coupled to the first terminal of the first transistor, the second input of the second amplifier coupled to the first terminal of the second transistor, and the output of the second amplifier coupled to the control terminal of the second transistor. The apparatus includes a control circuit coupled to the control terminal and the second terminal of the second transistor and coupled to the first transistor, the control circuit capable of adjusting a voltage at the control terminal of the second transistor responsive to a current through the first transistor.

The invention discloses a low output voltage detection circuit based on a low dropout linear regulator, relates to the technical field of power supply detection, and realizes accurate detection of an output voltage rising stage through cooperation of a first amplification delay circuit, a second amplification circuit and a first comparison circuit; through cooperation of a third amplification circuit, a fourth amplification time-delay circuit and a second comparison circuit, reliable monitoring of an output voltage drop stage is completed. Wherein the amplification circuit can flexibly adjust the amplification factor to adapt to wide-range output voltage detection; the time delay circuit can accurately regulate and control the signal overturning time sequence, and the system control requirement is met; the comparison circuit and the AND gate circuit construct a rigorous logic control system, and the accuracy of signal output is guaranteed. Through creative combination of the circuit modules, an efficient low-output voltage detection scheme is formed, the technical problem that the voltage establishment state cannot be reflected in a low-voltage scene is thoroughly solved, and accurate detection of the low-output voltage of the LDO is achieved.

The embodiment of the invention provides a multi-power-domain power management method, a power management system and electronic equipment, and relates to the technical field of power consumption management. The method is applied to a power supply normally open domain of the power supply management system, the power supply management system further comprises a main low dropout linear regulator, a plurality of power supply domains, a power supply switch array and an analog domain, the main low dropout linear regulator and the analog domain are connected with an external power supply, and the main low dropout linear regulator is connected with the power supply domains through the power supply switch array. The analog domain comprises a high-speed clock; the method comprises the following steps: in response to a standby mode entering instruction, sending a first control signal to an analog domain to turn off a high-speed clock; sending a group of second control signals to the power switch array to cut off power supply to at least one target power domain; and sending a third control signal to the main low-dropout linear voltage regulator to regulate the main low-dropout linear voltage regulator to enter a low-power-consumption working mode Therefore, the time for entering the low-power-consumption mode can be reduced.

A linear regulator includes: a first output stage circuit for generating a first output voltage according to a first control voltage; and a calibration circuit, enabled during a first calibration period after startup of the linear regulator. During the first calibration period, the calibration circuit is configured to operably generate the first control voltage based on an output-related signal and a reference voltage, and the output-related signal is related to the first output voltage. The first output stage circuit and the calibration circuit form a first control loop which enters an open-loop state after the end of the first calibration period. The first output stage circuit includes a second control loop, configured to operably regulate the first output voltage in a closed-loop manner based on the first control voltage and a variation of the first output voltage during an operational period following the first calibration period.

The utility model discloses a pulse modulation circuit of an ultra-wideband super-continuum fiber laser, belongs to the technical field of ultra-wideband super-continuum fiber lasers, and solves the problem that the phase noise floor of a clock circuit is directly lifted due to the fact that power supply ripple coupling and LDO filter network efficiency is insufficient, for example, the output capacitance ESR is too high or a pi-type filter is missing. Comprising an input filtering module, a low dropout linear regulator module, a pi-type filter module, a clock power supply distribution module and a grounding system module. According to the utility model, high-frequency ripple filtering, voltage ripple depth suppression and residual noise absorption are carried out on power supply output through a three-stage sequential filtering framework, and finally, super-stable power supply with a phase noise base lower than-152dBc / Hz and 1kHz offset is provided for the clock circuit, so that the time sequence precision of super-continuum spectrum laser pulses is ensured.

A programmable battery pack including a switch arrangement module having at least one rechargeable battery with and at least one single pole single throw (SPST) switch, a system power supply having at least one linear regulator and at least one single pole single throw (SPST) switch, at least one controller module having a micro-controller executing a pre-programmed firmware, and an external power supply.

Embodiments of the present application provide a high-power low-dropout linear regulator system, which can be applied to the field of electronic circuit and power filter technology. The linear regulator system comprises a feedback compensation module and a driving sampling module, wherein the driving sampling module comprises a driving unit, a power adjustment transistor and a voltage dividing and sampling network; the voltage dividing and sampling network is configured to divide the initial output voltage to generate a feedback voltage signal; the feedback compensation module is configured to perform error amplification processing on the feedback voltage signal and a reference voltage signal from a reference voltage source to output a driving signal; the driving unit is configured to perform impedance conversion on the driving signal to output a buffer driving signal; and the power adjustment transistor is configured to linearly convert a direct current input voltage provided by a direct current power supply into an output voltage after voltage stabilization according to the buffer driving signal.

This invention belongs to the field of analog integrated circuit design, and particularly relates to a low-dropout linear regulator with fast dynamic response and high stability. It includes: an error amplifier, a Class AB buffer stage circuit, an output power transistor, a positive feedback resistor compensation circuit, an undervoltage detection circuit, and a startup circuit. The Class AB buffer stage circuit is used to improve the transient characteristics of the low-dropout linear regulator, and the positive feedback resistor compensation circuit is used to improve the phase margin of the low-dropout linear regulator. This invention achieves fast dynamic response, essentially eliminates overshoot and undershoot phenomena, and significantly shortens the recovery time. It also maintains high stability while ensuring loop gain and includes undervoltage detection functionality to ensure smooth system startup.

The utility model provides a low dropout linear regulator which comprises a multi-output band-gap reference source, a filtering selection circuit and an adjusting output circuit, the multi-output band-gap reference source is used for outputting multiple paths of first reference voltage, and the filtering selection circuit can trigger on-off according to a received selection control signal. And the adjusting output circuit compares the second reference voltage with the output voltage and adjusts the output voltage, so that the output voltage is controlled to be the second reference voltage constantly, and constant-voltage output is realized. According to the low dropout linear regulator, the multi-output band-gap reference source, the filtering selection circuit and the adjusting output circuit are arranged, so that multi-gear adjustable, stable and low-noise direct-current voltage can be output, a high power supply rejection ratio is achieved, and the power supply requirements of different circuit modules or application scenes are met.

The invention provides an adaptive switching method and device for an energy obtaining mode based on a radio frequency energy supply tag, relates to the technical field of circuit control, and is applied to an energy obtaining circuit. The energy obtaining circuit comprises a rectifier, an energy storage capacitor, a charge pump, a switched capacitor type step-down circuit, a low dropout linear regulator, a dummy load, a full charge judgment circuit, a clock generator, a timer and a switch control circuit. The method comprises the steps of obtaining direct-current voltage output by a rectifier; a dummy load is connected to the direct-current voltage, and a timer is started for timing; in the timing process, whether the direct current voltage reaches a preset threshold value or not is detected through a full-power judgment circuit, and a detection result is obtained; and based on the detection result and the timing ending signal, the control switch selects an energy storage mode or a direct connection mode to supply power to the radio frequency energy supply tag. In the mode, the energy storage mode and the direct connection mode are adaptively switched according to the magnitude of the radio frequency energy, high sensitivity and quick response are both considered, and the adaptability and the checking efficiency of the tag in a variable environment are remarkably improved.

The invention is suitable for the technical field of communication, and particularly relates to a power amplification circuit and a radio frequency chip. The power amplification circuit comprises a power supply, a control circuit, a biasing circuit, a reference circuit, a linear voltage stabilizing circuit, a first MOS tube, a voltage division circuit and an overvoltage protection circuit. The grid electrode of the first MOS tube is used for being connected with control voltage, the source electrode of the first MOS tube is used for being connected with a power supply, and the drain electrode of the first MOS tube is connected with the input end of the control circuit and the output end of the linear voltage stabilizing circuit; the first MOS tube is used for carrying out voltage division on a power supply; the input end of the voltage division circuit is connected with the power supply, the output end of the voltage division circuit is connected with the drain electrode of the first MOS tube, and the voltage division circuit is used for carrying out voltage division on the power supply. Compared with the prior art, the breakdown voltage of the power amplification circuit can be remarkably improved, the area is smaller, and miniaturization development is facilitated.

A linear voltage regulator with isolated supply current is disclosed. The voltage regulator is configured and controlled such that its output current closely matches its input current (any quiescent current consumed by the regulator is negligible relative to the amount of current passed by the regulator). In some embodiments, the voltage regulator is implemented as an analog component. In other embodiments, the voltage regulator includes or cooperates with digital elements such as an analog-to-digital converter, a digital processing core, or a digital-to-analog converter.

The disclosure provides a low dropout linear regulator circuit and a memory, the circuit comprising: a first transistor, a second transistor and a feedback control circuit; the gate dielectric layer thickness of the first transistor is less than a preset threshold; the first end of the first transistor and the second end of the second transistor are connected to receive a power supply voltage; the second end of the first transistor and the first end of the second transistor are connected to output a target voltage; the control end of the second transistor receives a power-on control signal, and the second transistor is used to output the target voltage during the power-on process; the feedback control circuit is connected with the control end of the first transistor, the feedback control circuit is used to receive the power-on control signal, control the first transistor to be disconnected during the power-on process, and control the first transistor to output the target voltage after the power-on is completed; wherein the power-on control signal is in an enabled state during the power-on process, and is in a disabled state during the remaining period. The disclosure can reduce the circuit area, avoid overvoltage and simplify the timing.

This disclosure provides an enable control circuit for a low-dropout linear regulator, comprising a voltage conversion circuit and a hysteresis comparator circuit. The voltage conversion circuit generates an internal enable signal based on an external enable signal and a power supply voltage. When the voltage value of the external enable signal is lower than the power supply voltage, the voltage value of the internal enable signal follows the change of the external enable signal. When the voltage value of the external enable signal is equal to or higher than the power supply voltage, the voltage value of the internal enable signal is equal to the power supply voltage, such that the quiescent current of the hysteresis comparator circuit is zero. The hysteresis comparator circuit is powered by the power supply voltage. The hysteresis comparator circuit generates an enable control signal based on the internal enable signal. When the voltage value of the internal enable signal rises to a first threshold, the enable control signal flips to a first level. When the voltage value of the internal enable signal falls to a second threshold, the enable control signal flips to a second level. The power supply voltage is higher than the first threshold. The first threshold is higher than the second threshold.

This invention relates to a high-voltage, capacitor-free, low-noise linear regulator. It comprises a high-voltage switching voltage follower, a self-zeroing error amplifier, and voltage divider resistors. The high-voltage switching voltage follower significantly enhances the system's transient response to load changes and improves power supply rejection in the mid-frequency range. The self-zeroing error amplifier, together with the high-voltage switching voltage follower, forms a global slow loop. The self-zeroing error amplifier employs a ping-pong self-zeroing method, effectively reducing low-frequency flicker noise and offset while ensuring continuous operation in the time domain. This invention introduces a settling phase between the self-zeroing and amplification phases of the ping-pong module, significantly reducing output glitches caused by amplifier settling time. This invention operates stably without an external output capacitor, supports a wide input and output voltage range, and possesses excellent characteristics such as low noise, high power supply rejection, and fast response, making it suitable for various demanding high-voltage power supply applications.

This utility model discloses a power supply circuit for a rail transit lighting system, wherein the anode of the anti-reverse diode D2 is connected to the DC power input terminal V. in The cathode is connected in series with fuse F1, then splits into two paths. The first path connects to the input pin VIN of the high-voltage linear regulator U1, and the second path is grounded through rectifier diode D1 and then connected in parallel with input filter capacitor C2. The input pin VIN of U1 is connected to the positive terminal of C2, the output pin OUT of U1 is grounded through the output filter capacitor C1, and the adjustment pin ADJ of U1 is grounded through resistor R6. The base of transistor Q2 is grounded through resistor R6, and the base is also connected to the output pin OUT of U1 through resistor R2. The collector is connected to the input pin VIN of U1, and the emitter of Q2 is directly connected to the power output terminal V. out Simultaneously, the adjustment pin ADJ of U1 is connected via resistor R4. Through the above method, the power supply circuit for the rail transit lighting system of this utility model adopts the TL783CKCSE3 high-voltage linear regulator, which supports wide voltage input and high voltage differential drop, effectively coping with fluctuations in the rail transit power grid and ensuring stable operation of the lighting system.

A power control device enables efficient power delivery in a battery-operated system while reducing quiescent current during low-power conditions. The device includes a control logic circuit configured to detect a power state of the system and generate control signals. An ideal diode circuit selectively couples power from either a first power input or a second power input to a system power output based on the control signals. A linear regulator circuit provides a first regulated power signal with a low quiescent current for maintaining minimal system functionality during standby or reduced-load operation. A switched-mode power supply circuit selectively provides a second regulated power signal with a higher quiescent current to support higher load conditions when activated. By transitioning between these power circuits depending on system state, the device improves energy efficiency, extends battery life, and supports compact battery-powered systems requiring both low-power standby and full-performance modes.

This invention discloses a low-voltage linear regulator with overshoot suppression function, comprising a PMOS transistor M 4a PMOS transistor M 4b The circuit includes a soft-start circuit, NMOS transistor M1, PMOS transistor M2, resistors R1, R2, R3, and R4, operational amplifier A1, overshoot suppression circuit, and load capacitor C. L The invention adds a soft-start loop to optimize the internal circuit structure, ensuring that the voltage is stably established before connecting to the main feedback loop during startup, thereby avoiding loop competition. The invention also adds a fast charge discharge path at the load end and adds an operational amplifier OUT2 node. When an overshoot is detected, the discharge path from the output end to GND is opened through digital logic to quickly release excess charge. The path is automatically closed after the output voltage returns to the rated value.

The application relates to the field of analog integrated circuit design, and discloses a high-power-supply-suppression-ratio low-voltage-difference linear voltage stabilizer circuit with a dynamic bias current, which comprises a power tube, a two-stage operational amplifier, a voltage feedback loop, a current feedback loop, a Vds matching loop and an RC filter circuit, characterized in that the input stage and the second stage of the operational amplifier are separated from the power supply of the power tube, the input stage works in a small-ripple AVDD voltage domain, the LDO circuit has a higher PSRR in a low-frequency band, the second stage and the power tube work in a large-ripple Vin voltage domain, the Vds matching loop and the RC filter circuit are used to ensure the mirror precision of the power tube current, and the PSRR of the LDO circuit in a medium-high-frequency band is improved.

This invention relates to the field of wireless communication technology, and provides a positive charge pump reset circuit and an RF switch chip. The circuit includes a low-dropout linear regulator, a positive charge pump, and a first capacitor. The input terminal of the low-dropout linear regulator is connected to a power supply, and its output terminal outputs a power supply voltage to the input terminal of the positive charge pump. The output terminal of the positive charge pump is used to boost the power supply voltage to a preset value to output a positive voltage. The first terminal of the first capacitor is connected to the output terminal of the positive charge pump, and its second terminal is grounded. The positive charge pump reset circuit also includes a reset circuit, whose input terminal is connected to either the input terminal or the output terminal of the positive charge pump. The reset circuit is used to reset the positive charge pump voltage when the received output voltage is greater than the preset value. The positive charge pump reset circuit of this invention has a fast charge reset speed and high reliability.

This disclosure provides a low-dropout linear regulator (LDO), comprising: an error amplifier, a buffer, a power transistor, a voltage divider negative feedback unit, and a temperature detection unit. The error amplifier includes at least a first output load and a second output load, wherein the equivalent output impedance of the second output load is greater than the equivalent output impedance of the first output load. The temperature detection unit is used to detect the current operating ambient temperature. When the current operating ambient temperature is greater than or equal to a first temperature threshold, the temperature detection unit drives the error amplifier to use the second output load as the current output load. This disclosure performs real-time detection of the operating ambient temperature through the temperature detection unit. When the detected ambient temperature exceeds the temperature threshold, an enable signal is generated to drive the error amplifier to switch its output load, changing its current output load to an output load with a higher equivalent impedance. This improves the gain of the error amplifier, thereby increasing the loop gain and ultimately improving the accuracy of the LDO output voltage.

This utility model discloses a power management circuit for micro-energy harvesting, relating to the field of energy storage system technology. The micro-energy harvesting circuit includes a micro-energy input port and an energy storage capacitor, while the linear voltage regulator circuit includes a linear regulator. The micro-energy input port is connected to the energy harvesting circuit and the energy storage capacitor, which is then connected to the linear regulator. The energy storage capacitor and the linear regulator are respectively connected to a switch management circuit, with the enable terminal of the switch management circuit connected to the enable terminal of the linear regulator. The linear regulator is also connected to the power management circuit, and the output terminal of the power management circuit is connected to the input terminal of the load. This utility model's technical solution enables more efficient storage of harvested micro-energy, improves the effective utilization rate of the energy stored in the energy storage capacitor, and enhances the efficiency of micro-energy harvesting.

The embodiment of the application discloses a power conversion circuit and electronic equipment, the power conversion circuit includes first buck circuit, second buck circuit, first low dropout linear regulator, switch logic module and switch; the switch logic module is used for generating corresponding switch signal according to the pulse width modulation frequency that first buck circuit and second buck circuit output respectively; the switch is used for switching to the first gear according to the switch signal generated by the switch logic module, to connect the voltage input end of the second buck circuit to the voltage output end of the first buck circuit, or the switch is used for switching to the second gear according to the switch signal generated by the switch logic module, to connect the voltage input end of the second buck circuit to the voltage output end of the first low dropout linear regulator. The power conversion circuit and electronic equipment disclosed by the embodiment of the application can realize power noise reduction without increasing additional power loss of the circuit.

The embodiment of the invention provides a low-dropout linear regulator circuit, an anti-overshoot circuit and a chip. The low-dropout linear regulator circuit comprises an error amplifier, a power tube, a first resistor, a second resistor, a load capacitor, a load resistor and an anti-overshoot unit, the inverting input end of the error amplifier is used for receiving reference voltage, the non-inverting input end of the error amplifier is connected with the second end of the first resistor and the first end of the second resistor, the second end of the second resistor is grounded, the output end of the error amplifier is connected with the grid electrode of the power tube, and the source electrode of the power tube is connected with a power supply. The drain electrode of the power tube is respectively connected with the first end of the first resistor, the first end of the load capacitor and the first end of the load resistor, the second end of the load capacitor is grounded, and the second end of the load resistor is grounded; and the anti-overshoot unit is electrically connected with the power tube and is used for performing overshoot protection on the low-dropout linear voltage stabilization unit. According to the embodiment of the invention, the output voltage overshoot can be prevented when the load current suddenly changes.