Low-dropout (LDO) linear regulator of integrated slew rate enhancing circuit

A technology of low-dropout linear and linear voltage regulators, which is applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc. It can solve the problems of unresponsive load transient switching, limited voltage slew rate, etc., and achieves increased common mode Input voltage range, increase voltage slew rate, and save chip area

Inactive Publication Date: 2012-01-25
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although this kind of voltage regulator improves the problem of limited slew rate of power regulator tube voltage to a cer...

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  • Low-dropout (LDO) linear regulator of integrated slew rate enhancing circuit
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  • Low-dropout (LDO) linear regulator of integrated slew rate enhancing circuit

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Embodiment Construction

[0020] The present invention will be further elaborated below in conjunction with the accompanying drawings and specific embodiments.

[0021] The present invention provides a low-dropout linear voltage regulator with an integrated slew rate enhancement circuit, and its detailed technical scheme is as follows: figure 2 As shown, including the power adjustment tube M0, the first amplifier G mH , the second amplifier G mL , a buffer drive circuit, a current subtractor, a compensation capacitor C2 and a slew rate enhancement circuit, wherein the non-inverting input terminal of the buffer drive circuit is connected to the reference voltage source V REF , the inverting input and the output of the buffer drive circuit V Buffer Connected; the output V of the non-inverting input terminal of the first amplifier and the linear regulator OUT , the inverting input terminal is connected to the buffer drive circuit output terminal V Buffer ; The non-inverting input terminal of the seco...

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Abstract

The invention discloses a low-dropout (LDO) linear regulator of an integrated slew rate enhancing circuit. The LDO linear regulator comprises a power regulating tube, a first amplifier, a second amplifier, a buffering drive circuit and a compensation capacitor, and is characterized by further comprising a slew rate enhancing circuit, wherein the input end of the slew rate enhancing circuit is connected with the output of the linear regulator; and the output end of the slew rate enhancing circuit is connected with the grid of the power regulating tube. Due to the adoption of a slew rate enhancing technology in the linear regulator, transient regulation of grid driving of the power regulating tube is realized according to the situation of output end VOUT under the condition of ensuring low quiescent current, and the voltage slew rate of the grid of the power regulating tube and the bandwidth of the LDO are increased remarkably; and meanwhile, an adaptive biasing technology is adopted, so that the common-mode input voltage range of the amplifier is enlarged, transient response of an LDO circuit is enhanced greatly, and the output accuracy of the LDO is increased simultaneously.

Description

technical field [0001] The invention belongs to the technical field of power supply management, and in particular relates to the design of a low dropout linear regulator (LDO, Low Dropout Regulator). Background technique [0002] Portable devices such as mobile phones and personal digital assistants often require different levels of power to power different modules within them. LDOs can convert the decaying battery voltage into a stable and accurate voltage with low noise to meet the needs of noise-sensitive analog and RF modules in portable equipment. Since the integrated CMOS LDO occupies a small chip area, it is usually used to supply power to the sub-modules in the SOC system to solve the problem of crosstalk, and it can also reduce the area of ​​the circuit board and the number of external PIN pins. [0003] In portable applications, improving the power efficiency of the power supply is critical to extending battery life. Therefore, low quiescent current and low dropo...

Claims

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Application Information

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IPC IPC(8): G05F1/56
Inventor 明鑫徐祥柱邱实周泽坤张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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