300 results about "Transconductance" patented technology

The invention provides a low-noise amplification circuit, a radio frequency front-end module and an electronic terminal.The low-noise amplification circuit comprises an input matching adjustment circuit, a common-source amplification circuit, a first inductor, an inter-stage feedback circuit, a common-gate amplification circuit, an input and output feedback circuit, an output matching adjustment circuit and an output attenuation circuit; the common-source amplification circuit comprises at least two first signal amplification units; each first signal amplification unit comprises a first field effect transistor; the common-gate amplification circuit comprises at least two second signal amplification units; and each second signal amplification unit comprises a second field effect transistor. According to the low-noise amplification circuit, transconductance nonlinearity of devices under different bias signals can be mutually counteracted, so that the linearity fluctuation of the low-noise amplification circuit at different temperatures is optimized, and the linearity of the low-noise amplification circuit is kept basically not to change along with the temperature change.

The invention relates to the technical field of kits, in particular to a MoS2 back gate field effect transistor based on a wet transfer process and a preparation method of the MoS2 back gate field effect transistor. The MoS2 back gate field effect transistor is formed by sequentially arranging a silicon-based substrate, a SiO2 insulating layer, a MoS2 conducting channel layer and an Ag source drain electrode from bottom to top; a high-quality single-layer MoS2 thin film is prepared through a chemical vapor deposition (CVD) method, PMMA is adopted as a supporting layer, clean Van der Waals contact of the MoS2 thin film and a SiO2 / Si substrate is achieved through a wet transfer process of NaOH solution etching, deionized water cleaning and acetone stripping of the supporting layer, and finally a source electrode and a drain electrode are prepared by combining photoetching and thermal evaporation processes. According to the method, the problems of pollutant residues and traps of an interface between MoS2 and the substrate in the traditional process are effectively solved, the carrier mobility, transconductance and on-state current of the device are remarkably improved, the sub-threshold swing is reduced, and the method is suitable for manufacturing a two-dimensional material integrated circuit device with low power consumption and high performance.

An integrated circuit device includes: one or more switches of a Buck converter; and a control circuit for the Buck converter including: a comparator configured to generate a comparator output signal by comparing a feedback voltage of the Buck converter with a compensation ramp voltage; a pulse generator configured to generate, in response to a rising edge in the comparator output signal, a pulse signal for controlling the Buck converter; a transconductance amplifier configured to generate, at an output terminal of the transconductance amplifier, a current proportional to a difference between a reference voltage and the feedback voltage; a capacitor coupled between the output terminal of the transconductance amplifier and a reference voltage node; and a ramp signal generator configured to generate the compensation ramp voltage by adding a voltage at the output terminal of the transconductance amplifier and a ramp voltage generated by the ramp signal generator.

The invention provides an error amplifier for peak current mode control and a converter system. The error amplifier comprises a transconductance amplifier, a voltage clamping module, a voltage-current converter, a slope compensation module, a current clamping module and a mirror image tube, the negative end of the transconductance amplifier is used for loading feedback voltage, and the positive end is used for loading reference voltage; the output end of the transconductance amplifier, the output end of the voltage clamping module and the input end of the voltage-current converter are electrically connected; the voltage-current converter generates error current; the slope compensation module is used for performing slope compensation on the error current to generate a compensated current; the output end of the slope compensation module, the output end of the current clamping module and the positive end of the high-side comparator are electrically connected with a second reference node; and the mirror image tube is used for loading the comparison voltage to the positive end of the high-side comparator. The error amplifier provided by the invention can realize more stable mode switching and more accurate current limiting control.

The invention discloses a single-power-supply ultra-wideband temperature compensation low-noise amplifier circuit, and belongs to the technical field of radio frequency microwaves. The circuit is mainly composed of a pre-stage low-noise amplifier module, an inter-stage temperature compensation equalization module and a post-stage driving amplifier module. The temperature compensation equalizer module generates differential voltage related to temperature through a three-stage gallium arsenide diode temperature sensing unit, outputs a control signal through an enhanced FET differential amplification circuit, drives a voltage-controlled attenuation equalizer to dynamically adjust the attenuation amount of a radio frequency signal, and achieves gain stability in a frequency band. Through the collaborative design of a blocking capacitor and a divider resistor, the grid bias of an FET switch is strictly limited in a transconductance linear adjustment interval, and the interval covers 80% of the effective range of the threshold voltage of a gallium arsenide FET tube. The circuit is powered by a single power supply + 5V, stable work of each module is ensured through active bias and a power supply filter network, and the circuit is suitable for extreme temperature environments such as high-frequency communication and radar.

A switched-mode power supply includes: a Buck converter; and a control circuit for the Buck converter, which includes: a switching unit configured to generate a switching control signal based on a feedback voltage of the Buck converter and a compensation ramp voltage; a transconductance amplifier, where a first input terminal and a second input terminal of the transconductance amplifier are configured to receive a reference voltage and the feedback voltage, respectively; a switch coupled between an output terminal of the transconductance amplifier and a first node, where the switching unit is coupled between the first node and the Buck converter; a compensation control circuit coupled to a control terminal of the switch and configured to open or close the switch based on a first signal representative of a current flowing through an inductor of the Buck converter; and a ramp signal generator configured to generate the compensation ramp voltage.

An exemplary setup includes: a transconductance circuit arrangement with one input and one output; a first capacitor with one terminal; an amplifier with one input and one output, wherein the input of the amplifier is coupled to the output of the transconductance circuit arrangement and the terminal of the first capacitor; a resistor with a first terminal and a second terminal; and a second capacitor with a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the output of the amplifier and the first terminal of the resistor, and wherein the second terminal of the second capacitor is coupled to the input of the transconductance circuit arrangement and the second terminal of the resistor.

The invention discloses a low-mismatch ultra-wideband active balun, which belongs to the technical field of analog integrated circuits and comprises a first-stage amplifier and a second-stage amplifier which are sequentially arranged. The first-stage amplifier adopts a differential structure, and finally conversion from a single-end signal to a constant-amplitude and anti-phase differential signal is achieved. The second-stage amplifier isolates the influence of a rear-stage load on a front stage, and the symmetry of differential signals is ensured. In the second-stage amplifier, a seventh NMOS transistor and a tenth NMOS transistor form positive feedback; by introducing the cross coupling capacitor, the gate-source voltage difference between the eighth NMOS transistor and the ninth NMOS transistor is increased, voltage recovery is formed, compared with a traditional active balun, the second-stage amplifier reduces phase and amplitude mismatch of an output signal through positive feedback, meanwhile, the bandwidth is expanded, and therefore the bandwidth is increased. And the grid source signal amplitude is increased by utilizing source electrode voltage recovery, the equivalent transconductance is enhanced, and the phase and amplitude of the output signal are further stabilized.

The application discloses a kind of LDO without slice outside capacitance, belongs to linear power supply technical field, including transconductance constant circuit Gmc, constant transconductance error amplifier AE1, first output circuit, error amplifier AE2, second output circuit, band gap reference circuit BGR, power tube Pn1 and power tube Pn2;The transconductance constant circuit Gmc is used to generate bias voltage signal;The constant transconductance error amplifier AE1 is used to generate first output signal;The error amplifier AE2 is used to generate second output signal;Band gap reference circuit BGR generates multiple independent stable outputs, provides stable reference voltage for constant transconductance error amplifier AE1 and error amplifier AE2, and then generates bias voltage through transconductance constant circuit Gmc, and constant transconductance error amplifier AE1 drives power tube Pn1 through first output circuit to output signal for analog load, and error amplifier AE2 drives power tube PN2 through second output circuit to output signal for digital load.

The described technology provides a device including a phase locked loop (PLL) circuit, the PLL circuit including a voltage controlled oscillator (VCO) and a phase detector, and a voltage supply and transconductance cell (Gm) configured to drain a current Iout from the VCO based on a sensed voltage (Vsup_sense) input into the Gm, wherein the Gm cell is configured to generate an open_loop signal based on the Iout drain from the VCO.

The embodiment of the present disclosure provides a variable gain amplifier with high temperature stability, which is applied to the technical field of electronic circuit. The amplifier comprises a constant transconductance bias circuit, a first variable gain amplifier and a second variable gain amplifier; wherein the output end of the constant transconductance bias circuit is connected with the input common source transistor of the first variable gain amplifier and the second variable gain amplifier, and is used for providing a constant transconductance bias signal which is compensated according to temperature change; the input end of the first variable gain amplifier is used for receiving an externally input differential signal, and the output end is connected with the input end of the second variable gain amplifier, and is used for transmitting the differential signal after coarse adjustment attenuation to the second variable gain amplifier; and the output end of the second variable gain amplifier is used for outputting an attenuation differential signal with temperature stability. In this way, by restraining the influence of temperature change on the transconductance characteristic of the input common source transistor of the variable gain amplifier, the stable attenuation characteristic of the variable gain amplifier in a wide temperature range is ensured.

The present disclosure relates to a capacitance multiplier for decoupling capacitors. An integrated circuit can include one or more circuits coupled to a capacitance multiplier circuit. The capacitance multiplier circuit can include a capacitor, fixed and tunable resistors, and a transconductance circuit. The tunable resistor can be adjusted to control the total capacitance of the capacitance multiplier circuit. The transconductance circuit can include a transistor having a drain terminal coupled to a first electrical component and a source terminal coupled to a second electrical component. The first electrical component can be a diode-connected transistor, a direct shorted wire, a resistor, an inductor, or a current source. The second electrical component can be a current source, a direct shorted wire, a resistor, an inductor, or another diode-connected device. Configured in this way, the capacitance multiplier circuit can provide a large adjustable capacitance without voltage drop and without consuming a large amount of power.

The invention provides a mobility separation method and device for a core-shell structure junctionless transistor, and the method comprises the steps: obtaining a first relation curve of drain current-gate voltage and a second relation curve of gate channel capacitance-gate voltage, determining first gate voltage when a core layer in the core-shell structure junctionless transistor is in a flat band based on the second relation curve, and separating the mobility of the core-shell structure junctionless transistor from the first gate voltage. In the first relation curve, determining the drain current corresponding to the grid voltage as the first grid voltage as the first current in the core layer, and according to the first relation curve and the first current, determining the second current in the shell layer of the junction-free transistor with the core-shell structure. And according to the second current, the transconductance of the second current to the gate voltage, the gate voltage and the first gate voltage, determining the first mobility of the shell layer in the core-shell structure junctionless transistor. In short, the current in the single channel is separated from the total current, and then the mobility corresponding to the channel is determined based on the current in the single channel, so that accurate characterization of the mobility of each channel is realized.

The invention discloses a high-linearity AlGaN / GaN device based on a ferroelectric medium, a conductor layer and an AlGaN layer are arranged on a GaN layer, a barrier layer is formed, a ferroelectric film is arranged between a grid electrode and the barrier layer, and the high-linearity AlGaN / GaN device based on the ferroelectric medium is obtained. In the prior art, the linearity of a device is improved to a certain extent, but the complexity of the device is increased due to higher design requirements on a process and an epitaxial material. According to the invention, a layer of ferroelectric medium is introduced under the gate, and polarization regulation and control of the AlGaN / GaN HEMT are realized by utilizing the characteristic that the polarization intensity of the ferroelectric medium can be modulated by an external electric field and an extremely high dielectric constant, so that relatively flat transconductance is obtained. According to the high-linearity AlGaN / GaN HEMT device, the ferroelectric material is introduced and the parameters of the ferroelectric material are optimized, so that the electrical characteristics of the AlGaN / GaN HEMT device are successfully regulated and controlled, the peak transconductance is broadened, and the high-linearity AlGaN / GaN HEMT device based on the ferroelectric gate medium is realized. Therefore, an important theoretical and experimental basis is provided for further improving the performance of the device and expanding the application field.

The invention provides a current multiplexing type output amplifier. The current multiplexing type output amplifier comprises a current multiplexing type input stage, a first self-biased diode pair, a second self-biased diode pair, a first AB type output stage and a second AB type output stage, wherein the first self-biased diode pair and the second self-biased diode pair are connected with the current multiplexing type input stage; the first AB type output stage is connected with the first self-biased diode pair; according to the invention, two self-biased diode pairs are adopted to replace a floating voltage source in the prior art. When a large pulse signal is input, one diode in each of the two diode pairs is in a cut-off state, transient change current I only flows into or out of the output end from a certain branch, and compared with a traditional amplifier, the slew rate is multiplied under the same bias current condition. In addition, the input stage adopts a current multiplexing type architecture combining a PMOS (P-channel Metal Oxide Semiconductor) and an NMOS (N-channel Metal Oxide Semiconductor), under the same bias current, the equivalent input transconductance is the sum of the transconductance of the PMOS and the transconductance of the NMOS, and the unity gain bandwidth is also multiplied.

The invention provides a variable gain CTLE structure and a transceiver, and the structure comprises a load module which is provided with a first access point and a second access point; the transconductance module is composed of a plurality of transconductance units, and each transconductance unit comprises a first branch and a second branch which are symmetrically arranged; one end of the first branch is connected with the first access point, and the other end is connected with the first current source; one end of the second branch is connected with the second access point, and the other end is connected with the second current source; the first branch circuit and the second branch circuit are provided with MOS tubes. A first adjustable resistor and a first adjustable capacitor which are arranged in parallel are also connected between the first branch and the second branch; each transconductance unit is controlled through a current mirror switch, and the gain of each MOS tube is controlled through the current mirror switch. According to the scheme, the wide-range gain adjustment of the CTLE can be realized on the premise of maintaining the CTLE function, and the PGA function is included, so that the analog front-end stage number can be reduced, and the system power consumption and noise can be improved.

Techniques and apparatus for oscillating signal generation using a multi-mode voltage-controlled oscillator (VCO) circuit with transformer-based coupling. An example VCO circuit generally includes a first pair of transistors associated with a first active negative transconductance circuit; a second pair of transistors associated with a second active negative transconductance circuit; a transformer comprising a primary winding and a secondary winding, the primary winding being coupled to the second pair of transistors; a first set of switches coupled between gates of the first pair of transistors and the secondary winding of the transformer; and a second set of switches coupled between the gates of the first pair of transistors and a first voltage node.

The invention discloses a silicon carbide device state detection circuit based on threshold voltage change, relates to the technical field of power electronics, and aims at online threshold voltage extraction and state evaluation of a SiC power device. The circuit takes a half-bridge structure as a carrier, an integral voltage is formed at a lower tube integral node through transconductance operational amplifier integration of a lower tube gate-source voltage, and voltage jump of a half-bridge midpoint node is converted into a comparator overturning signal of a drain-source event detection node through a high-voltage diode and a current-limiting resistor; and an integral time window is limited and a reset switch MOS tube is triggered to discharge and reset the integral capacitor, so that an integral voltage peak value and event time delay are obtained. The control unit only collects two variables of the event time delay and the integral voltage peak value, gating is carried out according to the calibrated consistency relation, output abnormity types are subdivided, effective measurement screening, false triggering and integral / reset abnormity diagnosis and threshold voltage drift statistics are achieved, and the stability and engineering availability of online detection are improved.

The present application belongs to the technical field of radio frequency microwave integrated circuit design, and specifically relates to a wideband full duplex receiver sharing an interference cancellation circuit. The full duplex receiver of the present application is composed of a receiver module and an interference cancellation circuit. The receiver comprises a transconductance, a mixer, a transimpedance amplifier and a frequency conversion loop. The interference cancellation circuit comprises an input matching network, an input down-mixer, a quadrature selection phase shifter and a baseband variable gain low-pass filter. The interference cancellation circuit transfers the adjustment of the delay and gain in the radio frequency domain to the baseband, so that the overall area and power consumption are small, and the delay amount of 3.86-8.33 ns can be realized in a wide radio frequency band of 0.5-3.5 GHz. Meanwhile, the interference cancellation circuit is synthesized by the mixer in the frequency conversion loop of the receiver to form a double-path cancellation mode, which avoids the interference cancellation circuit being directly connected to the front end of the receiver module, and the noise figure deterioration of the receiver module is very small, only 0.9-1.2 dB.

A semiconductor device includes a low voltage-to-high voltage level shifter. The level shifter is structured to receive a low voltage signal and output a high voltage signal. The level shifter includes a buffer structured to receive the low voltage input signal. The buffer includes a pullup transconductor, a pulldown transconductor, and a cutoff transconductor, coupled in series. The pullup transconductor has a negative transconductance and is structured to be controlled by the low voltage input signal. The pulldown transconductor has a positive transconductance and is structured to be controlled by the low voltage input signal The cutoff transconductor has a positive transconductance and is structured to be controlled by a delayed high voltage cutoff signal that inversely corresponds to the low voltage input signal.

Embodiments herein disclose an inductor-capacitor voltage controlled oscillator (LC-VCO) circuit. The LC-VCO circuit includes: an LC tank circuit including a center tap inductor connected in parallel with a capacitor bank without a varactor, where the LC tank circuit resonates to generate an oscillation voltage; and a control circuit connected to a varistor capacitance circuit, where the varistor capacitance circuit includes a varistor based on a voltage controlled transistor in series with at least one capacitor, the varistor capacitance circuit is connected in parallel with the LC tank circuit and connected to a negative transconductance circuit. The control circuit includes an error amplifier and a conversion circuit, and is configured to generate an output control voltage based on an input phase-locked loop (PLL) control voltage that controls a capacitance value of the varistor capacitance circuit through the variable resistor.

The invention belongs to the technical field of integrated circuit design, and particularly discloses a low-delay sampler structure and method for high-speed data processing, and in a pseudo reset stage, an unlocking network module and a pre-latching network module are connected in parallel to form an equivalent low-impedance network unit; the transconductance module is used for inputting a sampling signal and a reference level signal and driving the equivalent low-impedance network unit; the pre-latch network module is used for enabling an output node of the pre-latch network module to start charging and discharging according to a sampling signal and a reference level signal and pre-sampling the sampling signal; meanwhile, in the latching stage, the transconductance module is used for driving the pre-latching network module to preliminarily amplify the sampling signal, and the strong latching network module is used for stably latching the sampling signal under the driving of the pre-latching network module. According to the invention, the sampling delay of the signal is obviously shortened, and meanwhile, the requirement of high-speed data processing on the time sequence progress is met.

The invention belongs to the technical field of semiconductor hybrid integrated circuits, and discloses a broadband high-voltage transconductance derivative amplifier which comprises a component carrier, a two-stage amplifier is arranged on the component carrier, and a shell is arranged on the outer side of the component carrier. The two-stage amplifier comprises a first-stage common-emitter amplifying circuit topological structure and a second-stage push-pull output topological structure, the first-stage common-emitter amplifying circuit topological structure comprises a transistor for amplifying an input signal, and the transistor is connected with a bias circuit; the second-stage push-pull output topological structure receives an electrode signal amplified by the transistor, then carries out power amplification and outputs the signal to an output end, and a feedback circuit is connected between the first-stage common-emitter amplification circuit topological structure and the second-stage push-pull output topological structure, so that the amplifier has the characteristics of wide bandwidth and high voltage output; meanwhile, the working stability and reliability are guaranteed, and the requirements of the aerospace field for the performance and structure of the amplifier are met.

To provide an amplifier in which intermodulation distortion is reduced.SOLUTION: The auto-zero amplifier circuit 2122 includes a transconductance amplifier 211221 and sampling capacitors CM1 and CM2. A modulation chopper circuit 31,32 modulates an input signal and inputs the modulated signal to a mutual conductance amplifier 211,221. The auto-zero switch circuit 41 includes auto-zero switches S31 and S32, and the auto-zero switch circuit 42 includes auto-zero switches S33 and S34. One end of the dummy switch Sd1 is connected between the input-terminal INM and the connection point of the auto-zero switches S31 and S32. One end of the dummy switch Sd2 is connected between the input-terminal INP and the connection point of the auto-zero switches S33 and S34. A capacitor C4 is connected between the other ends of the dummy switches Sd1, Sd2 and a ground line.SELECTED DRAWING: Figure 1

The application discloses a transconductance variable field effect transistor array suitable for a dendritic network hardware and application, and belongs to the technical field of semiconductor integrated circuits.The application realizes three-element multiplication of a storage variable and two input variables based on a single transconductance variable field effect transistor, and realizes mapping of a dendritic network core algorithm based on a complementary device array.Compared with a traditional neural network hardware which realizes nonlinear transformation by using a neuron activation circuit, the application realizes nonlinear transformation by using intrinsic nonlinearity of a device, effectively reduces design complexity, optimizes area and power consumption of a system peripheral circuit, and has important significance for design of a high-performance artificial intelligence computing system.

The invention provides a reference current generation circuit and a nonvolatile memory. The reference current generation circuit is applied to the nonvolatile memory and comprises a correction current source, a voltage clamping circuit, a tracking current generation circuit and a current mirror circuit, the tracking current generation circuit and the current mirror circuit are electrically connected with the voltage clamping circuit, and the correction current source is electrically connected with the current mirror circuit; the voltage clamping circuit is used for accessing a reference voltage and clamping the reference voltage based on a negative feedback loop; the tracking current generation circuit is used for accessing a read operation voltage of a storage unit in the nonvolatile memory and generating a tracking current matched with the read operation transconductance of the storage unit based on the read operation voltage and a reference voltage; the current mirror circuit is used for generating and outputting the reference current corrected by the correction current source based on the tracking current. According to the invention, it is ensured that enough current margin is still available when the word line voltage changes, the reading operation accuracy and the reading speed are ensured, and the risk of reading voltage stress is avoided.

The invention discloses a multi-loop control circuit and a control method thereof. The multi-loop control circuit comprises an amplification stage circuit and a current selection circuit. Wherein the amplification stage circuit is provided with a first transduction amplifier capable of outputting a first transduction amplification current and a second transduction amplifier capable of outputting a second transduction amplification current. The current selection circuit receives the first transduction amplification current and the second transduction amplification current and outputs an error output current. The current selection circuit selects the maximum one from the first transduction amplification current and the second transduction amplification current and outputs the maximum one as an error output current, and the error output current generates an error amplification signal.

An apparatus includes a power converter having a first voltage terminal and a second voltage terminal and including a voltage divider coupled between the second voltage terminal and a voltage supply terminal. The voltage divider has an output. A transconductance amplifier has a first input, a second input, and an output. The first input is coupled to the output of the voltage divider. The second input is coupled to a reference voltage circuit. A first capacitor is coupled between the output of the transconductance amplifier and the voltage supply terminal. A buffer has an input coupled to the output of the transconductance amplifier and has an output. A second capacitor is coupled between the output of the buffer and the second voltage terminal.

The utility model provides an integrating circuit for an ACDC driving power supply, the ACDC driving power supply, a chip and electronic equipment. The integrating circuit comprises a variable impedance sub-circuit and a first capacitor; a first end of the variable impedance sub-circuit is coupled with an output end of a transconductance amplifier of the ACDC driving power supply, a common connection point of a second end of the variable impedance sub-circuit and a first end of the first capacitor is used for outputting an integral signal of the ACDC driving power supply, the integral signal participates in a control loop of the ACDC driving power supply, and a second end of the first capacitor is connected with a reference ground; and the variable impedance sub-circuit is used for adjusting the bandwidth of the control loop according to the received control signal. According to the utility model, not only can high PF low loop bandwidth be well realized, but also the advantages of simple structure, few components and low cost are realized.

The present disclosure relates to apparatuses and methods for limiting current. An apparatus for limiting current includes a differential amplifier configured to equalize a voltage across a power transistor and a sense transistor and a regulation circuit of an output current of the apparatus for limiting the current. The regulation circuit includes a transconductance amplifier configured to limit the output current when an output potential of the differential amplifier is higher than or equal to a reference potential proportional to a reference current, the value of the reference current being equal to I LIMIT / (N.M), where I LIMIT corresponds to a current limit value, N corresponds to a width-to-length ratio between the power transistor and the sense transistor, and M corresponds to a width-to-length ratio between transistors of a current mirror coupled to the sense transistor.