87 results about "Operational transconductance amplifier" patented technology

Circuits and methods for multi-phase clock generators and phase interpolators are provided. The multi-phase clock generators include a delay line and multi-phase injection locked oscillator. At each stage of the multi-phase injection locked oscillator, injection currents are provided from a corresponding stage of the delay line. Outputs of the multi-phase injection locked oscillator and provided to mixers which produce inputs to an operational transconductance amplifier which provides feedback to the delay line and the multi-phase injection locked oscillator. The phase interpolator uses a technique of flipping certain input clock signals to reduce the number of components required while still being able to interpolate phase over 360 degrees and to reduce noise.

The invention provides a multi-mode adaptive switching power supply, and relates to the technical field of electronic switches. The operational transconductance amplifier extracts a ripple voltage amplitude in the load voltage, compares the ripple voltage amplitude with a fixed reference voltage, and converts the ripple voltage amplitude into a proportional analog compensation current. The analog-to-digital converter quantizes the signal into a digital increment, and after the digital increment is superposed with a digital target signal output by the controller through the digital accumulator, a digital control code containing a real-time ripple compensation amount is generated. And the digital-to-analog converter is used for driving the switch tube to adjust the conduction time by comparing the dynamic comparator with the load voltage in real time according to the dynamic adjustment reference voltage. Real-time quantitative analysis and dynamic compensation of the ripple amplitude are realized, and accumulation of low-frequency ripple components is avoided. Meanwhile, the superposition logic of the digital accumulator enables the compensation amount to be continuously adjusted along with ripples, solves the problem of lagging of related threshold comparison, can quickly respond to load changes especially in a high-frequency switching scene, and improves the response precision and stability of a power supply to a transient load.

An amplifier circuit comprises a first unit circuit and a second unit circuit. The first unit circuit may include a first current mirror circuit that includes a first active inductor including a P-channel transistor, and a first input circuit configured to generate a first differential current and a second differential current based on a pair of differential input signals. The second unit circuit may include a second current mirror circuit that includes a second active inductor including a P-channel transistor, and a second input circuit configured to generate a third differential current and a fourth differential current based on the pair of differential input signals.

Described herein is an operational transconductance amplifier (OTA) with a constant current source that provides a constant current to a node. The OTA includes two input pairs of transistors: the first sources variable currents based on feedback and input voltages, while the second sinks variable currents also based on feedback and input voltages. A folded cascode arrangement includes two branches, with one branch including a Monticelli cell. A class-AB output stage is present, with its inputs connected across the Monticelli cell. Additionally, a bias stage mirrors and scales the constant current to generate control voltages. Within the folded cascode branches, compensation transistors are controlled by these control voltages, ensuring that various sourced and sunk variable currents are of equal magnitude, making the OTA input voltage independent.

A tunable grounded positive and negative active inductor simulator and impedance multiplier circuit and a method for implementing the tunable grounded positive and negative active inductor simulator and impedance multiplier circuit are described. The circuit includes one second generation voltage-mode conveyor circuit (VCII+), a voltage source configured to generate an output current, a first impedance, a second impedance and an operational transconductance amplifier OTA. The first impedance is connected between the voltage source and the positive VCII+ input terminal, Y. The second impedance is connected between the second output terminal and a ground terminal. The OTA is configured to have a transconductance gain. The circuit is configured to be tuned by a selection of values for the first and second impedances.

A sensor amplifier circuit includes a differential amplifier circuit and a compensation circuit. The differential amplifier circuit is configured to amplify a difference voltage between a pair of output signals from a sensor circuit and generate an output voltage. The compensation circuit is configured to generate a compensation signal based on the output voltage to compensate for a non-linear distortion of the output voltage. The differential amplifier circuit includes a current feedback instrumentation amplifier (CFIA). The compensation circuit includes one or more operational transconductance amplifiers (OTAs) configured to output one or more electric currents based on the output voltage and outputs a sum of the one or more electric currents from the one or more operational transconductance amplifiers as the compensation signal. The compensation signal from the compensation circuit is input to a current feedback loop in the current feedback instrumentation amplifier.

A charge-sensitive amplifier configured to receive an input charge signal from a radiation sensor includes a high-open-loop- voltage gain amplification stage including at least one of an operational amplifier and / or operational transconductance amplifier, a capacitive network electrically coupled between an input and an output of the high-open-loop- voltage gain amplification stage, and an active feedback circuit network electrically coupled between the input and the output of the high-open-loop-voltage gain amplification stage. The capacitive network provides integration of the input charge signal and conversion of the input charge signal to a voltage available at an output of the charge-sensitive amplifier.

A system includes an analog-to-digital converter (ADC), a current source, and a controller. The ADC includes a comparator having a first input and a second input, and the current source includes an operational transconductance amplifier. The controller is configured to configure the operational transconductance amplifier with a first set of conductances; and use the current source to set a DC voltage at the first input. The controller is further configured to reconfigure the amplifier with a second set of conductances; and enable the comparator and use the current source to create a voltage ramp at the second input.

The present application proposes a current mirror type gain bootstrap operational transconductance amplifier, comprising: an input circuit receiving a differential input and providing an input transconductance; the current mirror circuit is used for amplifying the gain of the amplifier according to the mirror image proportion; the cascode gain bootstrap circuit is used for improving the output resistance of the current source mirror circuit, so that the gain of the amplifier is further expanded; and the tail current source is connected with the input circuit to provide stable reference current. The amplifier gain can be effectively improved, and the amplifier can be applied to various operational amplifier scenes.

Systems, devices, and methods are described to provide an improved current mirror operational transconductance amplifier (OTA). Improved OTAs may include an input circuit arranged to receive a differential voltage input, a load circuit arranged to measure a positive branch current and negative branch current from the input circuit, a bias circuit arranged to determine a bias voltage based on the negative branch current, a folded current branch circuit arranged to generate an adaptive bias current and a pass transistor configured to adjust an amount of the adaptive bias current based on the bias voltage, and a push-pull output circuit configured to sink current based on the adjusted adaptive bias current. The folded current branch circuit may generate the adaptive bias current based on the measured negative branch current. The output circuit may source current based on the measured positive branch current. Advantageously, most transistors may be of minimum size.

In a control circuit for a switching stage of an electronic converter, a phase detector generates a drive signal in response to a phase difference between first and second clock signals. The first and second clock signals are generated by first and second current-controlled oscillators, respectively. An operational transconductance amplifier generates first and second control currents in response to a difference between a reference and a feedback of the electronic converter, with the first and second currents applied to control the first and second current-controlled oscillators. In response to a switching clock having a first state, a switching circuit applies first and second bias currents to the control inputs of the first and second current-controlled oscillators, respectively. Conversely, in response to the switching clock having a second state, the switching circuit applies the second and first bias currents to the control inputs of the first and second current-controlled oscillators, respectively.

According to an embodiment, a biasing circuit includes a high impedance bias stage coupled to sensor pads connected to a resistive sensor for detecting fly height in a hard disk drive. The circuit employs dual operational transconductance amplifiers with different bandwidths working in conjunction with switching circuitry to establish and maintain bias conditions. A first operational transconductance amplifier with a higher bandwidth provides fast initial settling, while a second operational transconductance amplifier with a lower bandwidth optimizes continuous operation. The architecture supports multiple operating modes, including differential voltage, differential current, and common mode configurations, through various arrangements of transistors, compensation capacitors, and feedback paths.

The invention discloses an analog front-end chip for ultrasonic imaging digital beam forming. The circuit comprises a low noise amplifier (LNA) and an analog-to-digital converter (ADC). The noise amplifier LNA comprises a programmable gain amplifier PGA and an output stage amplifier; the main structure of the PGA is a pseudo-differential capacitance feedback amplifier, and the function of time gain compensation TGC is achieved by changing the proportion of input capacitance and output capacitance. The output-stage amplifier is a two-stage amplifier, and the first-stage operational transconductance amplifier OTA is of an Inver-Based structure; the OTA at the second stage adopts a class-AB structure; the OTA of the first stage and the OTA of the second stage use independent common-mode feedback; a closed-loop structure of the output-stage amplifier is realized by adopting a split capacitor structure; according to the invention, digital-to-analog conversion of a single channel is realized by adopting the SAR ADC, and the analog front end for ultrasound with a high dynamic range and a high signal-to-noise ratio is realized with relatively small power consumption and area.

The invention relates to current equalization circuitry for folded branches of rail-to-rail input OTA with class AB output stages. Described herein is an operational transconductance amplifier (OTA) having a constant current source that provides a constant current to a node. The OTA includes two input pairs of transistors: a first pair provides a variable current based on a feedback voltage and an input voltage, and a second pair also absorbs the variable current based on the feedback voltage and the input voltage. The folded cascode arrangement includes two branches, one of which includes a Monicelli cell. A class AB output stage exists, and the input of the class AB output stage is connected to the two ends of the Monicheri unit. Further, the bias stage mirrors and scales the constant current to generate the control voltage. Within the folded cascode branches, the compensation transistors are controlled by these control voltages to ensure that the magnitudes of various variable currents provided and absorbed are equal, making the OTA independent of the input voltage.

The present disclosure relates to error amplifier circuits for DC-DC converters, DC-DC converters and controllers. An error amplifier circuit for a DC-DC power converter controller for providing an amplified error signal to a switching control circuit is disclosed, the circuit comprising an error amplifier first stage. The first stage comprises: a first input for receiving a voltage proportional to an output voltage of the converter; an output node; a first operational transconductance amplifier in a first path between the input and the output node and having a first input connected to the input, a second input connectable to a reference signal and an output connected to the output node; and a second parallel path comprising a series combination of an amplifier, a second OTA and a capacitor. The second OTA has an output connected to the capacitor, a first input connected to an output of the amplifier and a second input connected to the output. Associated control circuits, controllers and converters are also disclosed.

A circuit optimization method and system for a digital domain correction of a temperature sensor is provided. The method includes: subjecting negative temperature coefficient voltages Vbep and Vben to a switch timing control, thereby generating a corresponding negative temperature coefficient voltage Vbep and positive temperature coefficient voltage Dvbe as inputs into an operational transconductance amplifier (OTA) that serves as a core circuit of a Sigam-Delt analog-to-digital converter (ADC); and generating, by a switch sampling circuit, Vintx by integrating; inputting the Vintx into a comparator (CMP) to acquire a final ADC output; and sending a feedback through a digital domain to an analog domain control switch logic. The circuit optimization method intelligently finds the optimal temperature factor of different processes through the digital domain correction, thereby acquiring the desired ratio value more accurately. Meanwhile, the circuit optimization method reduces the trim circuit to be implemented in the analog domain.

A preamplifier includes an operational transconductance amplifier, a first-type metal-oxide-semiconductor (MOS) transistor have a gate electrically coupled to the OTA output; a first second-type MOS transistor; a second second-type MOS transistor electrically connected in parallel with the first second-type MOS transistor; a first load resistor electrically connected in series with a drain of the first second-type MOS transistor that has a first output voltage; a second load resistor electrically connected in series with a drain of the second second-type MOS transistor that has a second output voltage; a tail node electrically connected to a source of the first second-type MOS transistor, a source of the second second-type MOS transistor, and a drain of a third second-type MOS transistor; a common-mode feedback circuit electrically coupled to the first and second output voltages and to a first OTA input; and a reference voltage electrically coupled to a second OTA input.

The invention provides a tunneling magnetoresistive sensing circuit. The tunneling magnetoresistive sensing circuit comprises a band-gap reference circuit for providing reference voltage; two input ends of the operational transconductance amplifier are respectively connected with a reference voltage and a source electrode of the MOS tube, and an output end of the operational transconductance amplifier is connected with a grid electrode of the MOS tube so as to perform negative feedback on a bias current output by the source electrode of the MOS tube; the drain electrode of the MOS tube is connected with power supply voltage, and the source electrode of the MOS tube is connected with the tunneling magnetoresistive sensor so as to provide bias current for the tunneling magnetoresistive sensor; the reference voltage is changed to change a temperature coefficient of the bias current. Bias current with a certain temperature coefficient is provided through the band-gap reference circuit, the operational transconductance amplifier and the MOS tube, and the sensitivity temperature coefficient of the tunneling magnetoresistive sensor is compensated, so that the tunneling magnetoresistive sensor is not easy to generate measurement deviation due to temperature influence; therefore, the tunneling magnetoresistive sensor can be well applied to application scenes with a wide working temperature range and high precision requirements, and the problem that an existing tunneling magnetoresistive sensor is prone to being affected by temperature to generate measurement deviation is solved.

The invention discloses a fluidic resistor module based on LDO zero pole tracking compensation. The fluidic resistor module comprises an operational transconductance amplifier, a PMOS transistor PM1 and a PMOS transistor PM2. The in-phase end of the operational transconductance amplifier is connected with the drain electrode of the PMOS transistor PM1, and the anti-phase end of the operational transconductance amplifier is connected with a first ideal voltage source; the output end G12 of the operational transconductance amplifier is connected with the grid electrode of the PMOS tube PM1 and the grid electrode of the PMOS tube PM2 at the same time; the drain electrode of the PMOS transistor PM1 is connected with an ideal current source Isense; the source electrode of the PMOS transistor PM1 and the drain electrode of the PMOS transistor PM2 are connected with an ideal voltage source VCC at the same time; a source electrode S2 of the PMOS transistor PM2 is connected with a capacitor C1, and the other end of the capacitor C1 is connected with a second ideal voltage source. The fluidic resistor module can generate an equivalent resistor inversely proportional to a sampling current, so that the equivalent fluidic resistor Rds can be linearly correlated with 1 / Isense, and the problems that a traditional fluidic resistor module cannot linearly change along with the 1 / Isense and the control is inaccurate are solved; meanwhile, the influence of process errors and temperature on the fluidic resistor is small, and generated errors are small.

The application belongs to the technical field of analog integrated circuits, and particularly relates to a high-efficiency swing rate enhanced full-differential operational transconductance amplifier. The circuit of the application comprises an input signal following circuit, an alternating current signal coupling circuit and an operational transconductance amplifier main circuit. The input signal following circuit effectively reduces the output impedance by adding local negative feedback, and ensures effective following of the input signal under the condition that the load current changes greatly. The alternating current signal coupling circuit adopts a complementary gate-source short MOS tube structure, ensures high impedance under the condition that the internal node swing is large, thereby realizing good alternating current coupling characteristics, and improving current utilization rate and small signal performance. The operational transconductance amplifier main circuit adopts a following circuit to expand the signal amplitude between the input tube gate and source, and under the condition of a large signal, the current-voltage conversion ratio is improved to 4 times of that of the traditional structure, and is no longer limited by the fixed tail current.

An output buffer for a source driver of a panel includes an output stage for outputting an output voltage, an operational transconductance amplifier for controlling the output stage to charge or discharge a panel pixel capacitance, and a detector coupled between the operational transconductance amplifier and the output stage for outputting an enable signal to turn on or turn off the output buffer after the output buffer finishes charging or discharging the panel pixel capacitance, wherein the enable signal is determined according to an output current of the output stage. The output buffer can be turned off after the panel pixel capacitance finishes charging or discharging, thereby reducing the power consumption of the display driver.

The invention discloses a high-precision fast transient response low dropout linear regulator which comprises a DC loop and an AC loop, the DC loop comprises a regulator tube device MP, an error operation transconductance amplifier gm, DC, a compensation circuit, an intermediate drive circuit-A and a feedback resistor, and the AC loop comprises a voltage detection circuit and a second operation transconductance amplifier gm, AC; the regulator tube device MP is connected between a power supply input end and a power supply output end and receives a DC output signal from the error operation transconductance amplifier gm, and the DC output signal is controlled by the intermediate stage driving circuit-A; in conclusion, the defects in the prior art are overcome, the design is reasonable, the stability margin and the transient response speed are improved by using the dual-loop control mode of the DC loop and the AC loop, and the high social use value and the application prospect are achieved.

A circuit arrangement is provided which includes an array of stages for photon counting current to voltage conversion. Each stage includes a tunable operational transconductance amplifier and a feedback network forming a feedback loop of the operational transconductance amplifier. Each stage is configured to provide an output signal as a function of an input signal that is provided to the amplifier input of the operational transconductance amplifier, wherein the input signal comprises one or more current pulses and the output signal comprises one or more voltage pulses. With the tunable operational transconductance amplifier the transconductance of a stage can be tuned so that differences in peaking time and gain are avoided. Furthermore, an imaging device and a method for operating a circuit arrangement are provided.

The embodiment of the invention discloses an equivalent capacitance circuit, an equivalent capacitance circuit device, an equivalent capacitance calculation method, an equivalent capacitance calculation system and a Buck circuit, and belongs to the technical field of circuit impedance calculation, the equivalent capacitance circuit comprises an operational transconductance amplifier, a first resistor and a first capacitor, and the equivalent capacitance circuit is applied to the Buck circuit. And the equivalent capacitance circuit is connected between the first operational transconductance amplifier of the Buck circuit and the PWM comparator. According to the embodiment of the invention, the equivalent capacitance circuit is arranged in the Buck circuit, and the operational transconductance amplifier is reasonably arranged in the equivalent capacitance circuit, so that the problem that some circuits cannot adopt miller compensation in the related technology is solved, equivalent impedance is increased in the Buck circuit by designing one equivalent capacitance circuit, and the Buck circuit is improved. The equivalent capacitance circuit can be regarded as a capacitor with a large capacitance value.

A low dropout regulator comprising: a supply voltage connection for receiving a supply voltage; a load voltage output connection for providing a load voltage to a load; load voltage output control circuitry comprising a pass transistor configured to regulate the load voltage based on a voltage at its gate region; adaptive biasing circuitry comprising: a biasing transistor configured to regulate the voltage provided to the gate region of the pass transistor based on a voltage provided to a gate region of the biasing transistor; and operational transconductance amplifier, OTA, circuitry comprising a first OTA transistor and a second OTA transistor, wherein a gate region of the first OTA transistor is arranged to receive a reference voltage and a gate region of the second OTA transistor is arranged to receive a voltage indicative of the load voltage; and adaptive compensation circuitry comprising: (i) a first compensation capacitor having a first electrode and a second electrode, (ii) a second compensation capacitor having a first electrode and a second electrode, and (iii) a first compensation transistor, wherein the second electrode of the first compensation capacitor is coupled to a first region of the first compensation transistor, and wherein the first electrode of the second compensation capacitor is coupled to both a second and a gate region of the first compensation transistor; wherein a first region of the second OTA transistor is coupled to: (i) the supply voltage connection, (ii) the first electrode of the first compensation capacitor, and (iii) the gate region of the biasing transistor; and wherein a second electrode of the second compensation capacitor is coupled to a first region of the biasing transistor.

The present application relates to a kind of multiple transconductance amplifier, characterized in that, including operational transconductance amplifier, first threshold control device, second threshold control device, threshold control device includes current source, for output threshold current;Input end, for obtaining the first current of operational transconductance amplifier output;Current processing device, for comparing the numerical value of threshold current and first current, when first current is greater than threshold current, after the operation of threshold current and first current, output adjustment current;Total output end, first current and adjustment current, after the operation of output total current.The present application provides a kind of multiple transconductance implementation, can be according to the change of output voltage, judge whether the output current exceeds the set threshold, if exceeding threshold, then automatically adjust output current, so that the transconductance value of the overall circuit changes.

Certain aspects of the present disclosure generally relate to electronic circuits and, more particularly, to an operational transconductance amplifier (OTA). One example amplifier generally includes: a first pair of input transistors; a first pair of cascode transistors coupled in cascode with the first pair of input transistors, respectively; a second pair of input transistors; a second pair of cascode transistors coupled in cascode with the second pair of input transistors, respectively; and a third pair of input transistors coupled to the second pair of cascode transistors, respectively.

The invention relates to an operational transconductance amplifier. The improved OTA may include an input circuit arranged to receive a differential voltage input; a load circuit arranged to measure a positive branch current and a negative branch current from the input circuit; a bias circuit arranged to determine a bias voltage based on the negative branch current; a folded current branch circuit arranged to generate an adaptive bias current; and a pass transistor configured to adjust an amount of the adaptive bias current based on the bias voltage; and a push-pull output circuit configured to draw a current based on the adjusted adaptive bias current. The folded current branch circuit may generate an adaptive bias current based on the measured negative branch current. An output circuit may supply a current based on the measured positive branch current. Advantageously, most transistors may have a minimum size.

A method for jointly receiving a differential input signal in a pipeline ADC having a first and a second ADC input terminal, the method comprising: a) providing an operational transconductance amplifier (OTA) having a differential input and a differential output and a first quantizer terminal; b) for each ADC input port: 1) Providing multiple input signal sampling capacitors (C S <0:3>), a first feedback capacitor (Cf), wherein a second lead of the feedback capacitor (Cf) is connected to second lead wires of the input signal sampling capacitors (C S <0:3>); 2) coupling a first lead of the feedback capacitor (Cf) to a first voltage, coupling the second lead of the input signal sampling capacitors (C S<0:3>) with a second common-mode voltage, and coupling first leads of the input signal sampling capacitors (C S <0:3>) to each of the ADC input terminals; 3) Decoupling the first connecting wires of the input signal sampling capacitors (C S <0:3>) from the respective ADC input terminals and decoupling the second connecting wires of the input signal sampling capacitors (C S <0:3>) from the second common mode voltage; 4) Coupling the second leads of the input signal sampling capacitors (C S <0:3>) to a respective one of the differential inputs of the OTA and coupling a respective output of the OTA to the first leads of the input signal sampling capacitors (C S <0:3>) and with an input to a first quantizer; c) locking an output of the first quantizer; and d) for each ADC input port: 1) Coupling the first lead of the first feedback capacitor (Cf) to the output of the OTA, and coupling the first lead of each of the input signal sampling capacitors (C S <0:3>) with a positive or a negative voltage in response to the output latched in the first quantizer.

A front-end electronic circuitry for an electromagnetic radiation sensor application comprises a charge sensitive amplifier stage with a first single-input operational transconductance amplifier, and a transistor being arranged in a first feedback path of the first single-input operational transconductance amplifier, and a signal shaper stage with a second single-input operational transconductance amplifier, and an active feedback circuit being arranged in a second feedback path of the second single-input operational transconductance amplifier. The front-end electronic circuitry further comprises a control circuit having a second transistor. The control circuit is configured to provide a control signal to control the transistor of the first feedback path in dependence on a gate-source voltage of the second transistor.