72 results about "Programmable-gain amplifier" patented technology

The invention discloses a logarithmic pixel signal quantization method and module based on gain dynamic adjustment, and an image sensor. The logarithmic pixel signal quantization method comprises the following steps of: converting light current into logarithmic voltage by logarithmic amplification by using a logarithmic response unit; the voltage type comparator compares the logarithmic voltage with a threshold voltage, outputs a gain regulation and control signal for gain configuration of the programmable gain amplifier and input reference voltage switching, enables the programmable gain amplifier to work in different gain modes, and inputs a flag bit to the N-bit analog-to-digital converter; based on the current gain mode, the programmable gain amplifier amplifies the logarithmic voltage and translates the logarithmic voltage into the quantization range of the N-bit analog-to-digital converter to be output; the N-bit analog-to-digital converter samples an output voltage signal of the programmable gain amplifier, combines the output voltage signal with a flag bit, and outputs an N + 1-bit equivalent digital code value signal. According to the invention, high-sensitivity quantization of low-light-intensity signals and high-precision conversion of high-light-intensity signals are realized at the same time.

The invention provides a frequency converter embedded current waveform analysis method and system and a medium, and relates to the technical field of current waveform analysis, and the method comprises the steps: obtaining a sampling circuit configured in a current path of a frequency converter; calculating the required total gain based on the original output voltage signal of the sampling resistor and the required input voltage of the analog-to-digital converter; the signal quality of the original output voltage signal is evaluated, the required total gain is dynamically distributed to an instrument amplifier and a programmable gain amplifier, the original output voltage signal is amplified and then passes through an analog-to-digital converter, and current waveform data is obtained for current anomaly analysis; when the signal quality is lower than a first threshold value, the gain share of the instrument amplifier is increased preferentially; when the signal quality is higher than a second threshold, the gain share of the programmable gain amplifier is increased preferentially. According to the invention, the technical problem of low accuracy of current waveform analysis in the prior art can be solved, and the technical effect of improving the accuracy of waveform analysis is achieved.

The invention belongs to the technical field of electronic measurement and control, and particularly relates to a seamless switching method for a VI source voltage range, and the system comprises a digital controller, a digital-to-analog converter, a programmable gain amplifier, an isolation switch module, a voltage maintaining and buffering module, a power amplifier, and a feedback measurement network. The digital controller is configured to receive a range switching instruction, manage the working state of the VI source, execute digital closed-loop voltage regulation and coordinate actions of all hardware components in the range switching process; a digital voltage reference generation module, a measuring range switching control logic module, a loop adjusting module and a high-precision clock synchronization unit are integrated in the digital controller. According to the invention, seamless switching of the output voltage can be realized, the test efficiency is obviously improved, the protection of the tested device is enhanced, and the data continuity and accuracy are improved.

A zero intermediate frequency receiver and wireless communication equipment, the zero intermediate frequency receiver comprises a direct current offset correction circuit and a data receiving link, the data receiving link comprises a trans-impedance amplifier, a low pass filter, a programmable gain amplification circuit and an analog-to-digital converter which are connected in series, the DC offset correction circuit comprises a control module, a first correction module, a second correction module and a third correction module. And the control module is suitable for determining a first target calibration value, a second target calibration value and a third target calibration value based on the DC offset on the data receiving link, outputting the first target calibration value to the first correction module, outputting the second target calibration value to the second correction module, and outputting the third target calibration value to the third correction module. According to the scheme, high-precision correction of the zero intermediate frequency receiver can be realized.

The invention relates to the technical field of sensors and precision measurement, and discloses an accurate matching method and system for data of an SMR chip of an encoder and a non-magnetic coded disc, and the method and system are characterized in that a special magnetic calibration pattern is integrated on a non-magnetic coded disc body, and the pattern is automatically driven to pass through the SMR sensing chip when the system is powered on, so that the non-magnetic coded disc is accurately matched with the SMR sensing chip. Bias, gain and phase error parameters are synchronously collected and calculated at a time, and the parameters are directly written into a programmable gain amplifier and a phase compensation register in the SMR sensing chip, so that front-end hardware-level real-time compensation carried out from a signal source is realized, and a closed-loop self-calibration system without external calibration is formed.

This invention belongs to the field of electronic measurement and control technology, specifically a seamless switching method for VI source voltage ranges. The system includes: a digital controller, a digital-to-analog converter, a programmable gain amplifier, an isolating switch module, a voltage holding and buffer module, a power amplifier, and a feedback measurement network. The digital controller is configured to receive range switching commands, manage the operating state of the VI source, perform digital closed-loop voltage regulation, and coordinate the actions of all hardware components during the range switching process. The digital controller integrates a digital voltage reference generation module, a range switching control logic module, a loop regulation module, and a high-precision clock synchronization unit. This application enables seamless output voltage switching, significantly improves testing efficiency, enhances protection for the device under test, and improves data continuity and accuracy.

The invention belongs to the technical field of industrial automation instruments, and particularly relates to a self-powered temperature transmitter, which comprises an explosion-proof cast aluminum shell, a circuit board and a lithium battery, and is characterized in that the circuit board comprises a microcontroller MCU, a signal conditioning circuit, an analog-to-digital converter ADC, a power management circuit and a display driving circuit; the average working current of the whole machine is reduced to a microampere level by adopting multi-stage low-power-consumption design such as an ultra-low-power-consumption MCU, a low-quiescent-current power supply chip, a programmable sampling interval and intelligent backlight control, and the theoretical endurance time can reach several years in cooperation with a high-capacity lithium battery, so that the constraint of an external power supply and a cable is thoroughly eliminated; according to the technical scheme, signal range adaptation is achieved through a programmable gain amplifier on hardware, a full-scale linearization algorithm is built in software, various common industrial temperature sensors such as Pt100, Cu50, K, S, E, J, T and N can be compatible only through panel key selection, and the universality and field applicability of equipment are greatly improved.

The present application relates to the technical field of electronic circuit, and especially relates to a readout circuit of a terahertz detection array, which comprises: a readout link at least comprising a current feedback instrumentation amplifier, a programmable gain amplifier and an incremental analog-to-digital converter connected in sequence; the current feedback instrumentation amplifier amplifies the signal output by the detector and outputs a first-stage amplified signal, the current feedback instrumentation amplifier comprises an instrumentation amplifier body and a first ripple suppression module, the first ripple suppression module comprises a first redundant segmented current steering DAC and a first DAC code register; the programmable gain amplifier further amplifies the first-stage amplified signal, the programmable gain amplifier comprises a gain amplifier body and a second ripple suppression module, and the second ripple suppression module comprises a second redundant segmented current steering DAC and a second DAC code register. The present application effectively reduces the chip area and power consumption while ensuring that the readout circuit of the terahertz detection array has high gain, low noise and low offset.

The application belongs to the technical field of integrated circuits, and specifically discloses a digital control programmable gain amplifier chip, which adopts an SIP packaged operational amplifier, a digital potentiometer, an input end Vin and an output end Vout, an alternating current signal is input from the Vin end, is connected to the inverting input end of the operational amplifier through a capacitor C1 and an input resistor R1, a positive power supply pin of the operational amplifier is connected to a positive electrode VDD of a power supply, a negative power supply pin is connected to the ground, a same-phase input end obtains a VDD / 2 direct current bias voltage through a precision resistor voltage dividing network and is connected after low-pass filtering, a high end of the digital potentiometer is connected to the Vout end, a low end is connected to the inverting input end of the operational amplifier, and a feedback path is formed through a sliding end. The operational amplifier and the digital potentiometer are integrated, high integration and modularization of the programmable gain amplification circuit are realized, and the problems of insufficient gain precision, decreased reliability of a multi-element system and large circuit volume caused by the on-resistance of an analog switch in a traditional discrete scheme are solved.

This invention provides a circuit and method for sampling and transmitting telemetry data from a cochlear implant, belonging to the field of telemetry technology for cochlear implants. The method amplifies the analog signal under test using a programmable gain amplifier, converts the signal into a pulse width signal using a voltage ramp generator and comparator, and then generates a short-duration step signal on the coil via an output driver to form a ringing pattern. An external device detects the interval between the step signals to reconstruct the signal magnitude. This invention eliminates the need for an analog-to-digital converter, significantly reducing power consumption and chip area, and improving data transmission efficiency. It is suitable for telemetry systems in various implantable medical devices such as cochlear implants. This invention significantly reduces the power consumption and layout area of ​​the implanted chip and shortens the single data transmission time to 48μs, improving efficiency by approximately 10 times, making it suitable for low-power implantable devices such as cochlear implants.

The invention relates to an AI-assisted multi-index environment quality monitoring method and system, and relates to the technical field of environment monitoring, and the method comprises the steps: receiving an environment monitoring task, decoupling the task into a task field sequence, and constructing a dynamic monitoring topology network; writing into a programmable gate, establishing a meta-cognitive engine and coupling a plurality of PGA threads, and generating an intelligent gain module constructed by a programmable gain amplifier; and performing round robin monitoring according to a task field sequence to monitor combination, target PGA thread and gain value management, reconstructing a lower node topology network and adjusting gain by using a real-time environment impedance spectrum, and finally obtaining an environment quality state. The technical problems of single index coverage, hardware adaptation stiffness and data response lag in traditional environment monitoring are solved, and the technical effect of multi-dimensional, high-precision and self-adaptive environment quality monitoring is achieved.

The invention relates to a wide-range negative gain programmable gain amplifier circuit applied to audio analog output. The front-path adjustable resistor array adopts an R-2R topological structure, one end of each resistor with the resistance value of 2R is connected with a complementary switch, and the reference voltage or the input end of the amplifier can be selectively accessed. The complementary switch is controlled by digital logic. The digital logic coding is different from the traditional thermometer or binary coding, and is coded according to the dichotomy characteristic of the R-2R resistance network. Under the coding, the circuit realizes 121 gain steps, the gain step length is approximately equal to 0.5 dB, and the gain adjustable range is 0-60 dB. According to the invention, the requirements of small step length, large-range negative gain and high linearity of an audio programmable gain amplifier circuit are met.

A low power high bandwidth analog to digital converter system is disclosed. A first analog signal input receives an input signal. A first programmable gain amplifier receives the input signal. An analog to digital converter (ADC) is coupled to the output of the first programmable gain amplifier and samples the input signal for conversion to a digital signal. A controller is coupled to the ADC and the first programmable gain amplifier. The controller selects and enables either a reduced power mode or a power up mode for the first programmable gain amplifier and the ADC. The power up mode is selected and enabled when the input signal is to be sampled to operate the first programmable gain amplifier and the ADC to sample the input signal.

This invention discloses an analog-to-digital converter (ADC) including a voltage input terminal, a reference input terminal, a buffer circuit, and control logic. The buffer circuit includes an input terminal, an output terminal, and a variable resistor comprising parallel-connected resistor branches. The control logic is configured, during a calibration phase, to: determine a given gain value for which gain error needs to be calibrated; determine a set of resistor branches in the buffer circuit to be used to achieve the given gain value; sequentially enable different resistor branches of the variable resistor in the set until all resistor branches in the set have been enabled; determine an output code obtained after enabling all resistor branches in the set; and determine the gain error of the given gain value from the output code. The control logic is further configured to take a correction action based on the gain error of the given gain value.

The application provides an ultra-high-precision dB-linear programmable gain amplifier based on a resistance attenuator, the resistance attenuator in the coarse adjustment gain unit is composed of the same resistance, and attenuation determined by the ratio between the resistances is provided; the gain generated in the fine adjustment gain unit is controlled by the ratio between transconductances, the coarse adjustment gain unit and the fine adjustment gain unit of the application can both generate strictly fixed voltage gain, so that the PGA is not sensitive to P-V-T changes. Therefore, the application has the advantages of low gain step, small gain error, small gain step, large gain range, low power consumption and the like, and is suitable for high-precision PGAs for high-frequency applications.

The invention provides a signal amplifier and a radar chip, and the signal amplifier comprises a programmable gain amplifier and a voltage stabilizing circuit. The alternating current input coil voltage stabilizing circuit is connected with a direct current path of the alternating current input coil programmable gain amplifier so as to supply power to the alternating current input coil programmable gain amplifier; the alternating current input coil programmable gain amplifier comprises a pre-stage amplification circuit and a post-stage amplification circuit; the alternating-current input coil pre-stage amplification circuit and the alternating-current input coil post-stage amplification circuit are coupled to form an alternating-current path, and a direct-current path of the alternating-current input coil pre-stage amplification circuit is connected with a direct-current path of the alternating-current input coil post-stage amplification circuit through a coil tap. The signal amplifier provided by the invention aims to form a programmable gain amplifier with both efficiency and power gain.

A low-power programmable gain amplifier (PGA) with 3dB out-of-band amplification is based on a second-generation current conveyor structure of foldable source follower, which comprises a common-mode feedback loop, a DC offset self-calibration loop, a fast start circuit and a dynamic bias circuit. The programmable gain amplifier amplifies narrow-band signals with 3dB out-of-band, changes the bandwidth by adjusting the tail current with digital signals, and then changes the gain size, thereby building a bridge between power consumption and gain. The gain and power consumption are positively correlated, and the effect of dynamic low power consumption is achieved. The common-mode feedback loop controls the PGA output DC point at V DD / 2, so that the PGA output has the maximum swing. The DC offset self-calibration loop suppresses the output DC offset of the PGA through voltage-current negative feedback. The fast start circuit is used to ensure smooth and fast start of the PGA. The dynamic bias circuit is used to provide current bias to control the gain of the PGA.

An apparatus includes a discrete time analog front-end circuit. The discrete time analog front-end circuit includes: a sample and hold circuit; a discrete time linear equalizer circuit having an input coupled to the output of the sample and hold circuit; and a discrete time programmable gain amplifier circuit having an input coupled to the output of the discrete time linear equalizer circuit. The sample and hold circuit is to generate a discrete time modulated signal based at least in part on the continuous time modulated signal. The discrete-time linear equalizer circuit is configured to generate an equalized discrete-time modulated signal based at least in part on the discrete-time modulated signal. The discrete-time programmable gain amplifier circuit is to generate an amplified equalized discrete-time modulated signal based at least in part on the equalized discrete-time modulated signal. A discrete-time analog front-end circuit may include a quantizer circuit having an input coupled to an output of a discrete-time programmable gain amplifier circuit.

Novel tools and techniques are provided for implementing a novel integrated programmable gain amplifier "PGA" and protection circuit. In various embodiments, a circuit is provided that includes a PGA, an analog-to-digital converter "ADC", and a protection circuit, all disposed on the same semiconductor chip. The PGA is configured to receive a wireless signal received from an antenna as input, and to output an amplified wireless signal at its output based on amplifying the wireless signal by a programmable gain amount. The protection circuit is configured to, in response to detecting a spike in gain at the output of the PGA that exceeds a threshold magnitude, control a reduction in the programmable gain amount to bring the resulting signal at the output of the PGA below the threshold magnitude. A normally open switch can also be added at the differential output of the PGA to further clamp the PGA output.

The invention relates to the technical field of power electronics, and discloses a power factor correction method and system for an LED power supply. The method comprises the steps that an analog-digital hybrid control circuit based on a memristor is constructed, and PFC loop parameters are adjusted in real time by means of the non-volatile resistance change characteristic of the analog-digital hybrid control circuit; acquiring running state data and inputting the data into the control processor; optimizing memristor configuration by taking the power factor, the total harmonic distortion rate and the efficiency as fitness functions through a genetic algorithm; dynamically applying a voltage pulse to accurately adjust the resistance value of the memristor; and continuous self-tuning is carried out based on closed-loop feedback. The system comprises a memristor programmable gain amplifier, a sensor, a control processor and a health monitoring module. According to the scheme, hardware-level rapid, fine and self-adaptive PFC parameter regulation and control are realized, and the power factor stability, the system efficiency and the long-term reliability are improved.

The application discloses a programmable gain amplifier and a control method thereof. The programmable gain amplifier comprises a first differential amplifier circuit, a first set of gain resistors, a second set of gain resistors, a set of sampling capacitors, a first set of switches and a second differential amplifier circuit. The first set of switches is used for selectively coupling the first set of gain resistors between an inverting input voltage and an input of the first differential amplifier circuit, coupling the second set of gain resistors between a common-mode voltage source and the input of the first differential amplifier circuit, and coupling the set of sampling capacitors with respective outputs of the first differential amplifier circuit during a first stage of an offset calibration of the first differential amplifier circuit. Through storage of the sampling capacitors and negative feedback of the second differential amplifier circuit, an offset voltage on the first differential amplifier circuit is offset, so that the influence of the offset voltage on a front-stage amplifier circuit on detection accuracy can be effectively reduced.

This application provides a frequency-modulated continuous wave lidar system, comprising a programmable gain circuit and a laser. The programmable gain circuit includes a control module, a digital-to-analog converter module, and a programmable gain amplifier. The laser generates a detection beam. The control module generates a digital signal and controls the gain of the programmable gain amplifier according to the modulation bandwidth of the laser. The programmable gain amplifier, in response to the gain control of the control module, amplifies the analog signal to match the modulation bandwidth of the laser and uses the amplified analog signal as a modulation signal to modulate the detection beam. The modulated detection beam is emitted into the detection space. This application solves the problem of high resource requirements of the back-end receiving system in related technologies' frequency-modulated continuous wave lidar systems, thereby achieving optimal bandwidth modulation and ranging effects.

This application provides a temperature-adaptive eddy current signal dynamic compensation system, including a high-temperature eddy current sensor, a high-temperature temperature sensor, a signal processing module, a data storage module, and a control module. The temperature sensor is used to collect temperature data of a high-temperature alloy sample in real time. The data storage module is used to store material property data of the high-temperature alloy sample. The control module is used to determine the optimal excitation frequency and driving voltage based on the temperature data and material property data. The signal processing module includes a DDS signal generator, a PID controller, and a PGA programmable gain amplifier, used to dynamically compensate the excitation signal and detection signal of the high-temperature eddy current sensor. This invention effectively stabilizes the detection sensitivity under high-temperature conditions, keeping the amplitude fluctuation of the temperature-compensated eddy current signal within 3%, and ensuring that the signal-to-noise amplitude is basically consistent with the initial state, thereby achieving accuracy and reliability of eddy current non-destructive testing under high-temperature conditions.

The invention provides an analog-to-digital converter circuit. The analog-to-digital converter circuit comprises a programmable gain amplifier (PGA), a buffer, a differential-integral analog-to-digital converter (ADC) and a bandwidth control circuit. The PGA is configured to receive and amplify an input signal to generate an amplified signal. The buffer is configured to receive the amplified signal and output a corresponding buffer signal. The differential-integral ADC is configured to receive the amplified signal or the buffered signal and output a corresponding digital signal. The bandwidth control circuit is configured to generate a first control signal and a second control signal, the first control signal is output to the programmable gain amplifier to control the bandwidth of the programmable gain amplifier, and the second control signal determines to enable or disable the buffer.

The present application relates to power supply dynamic efficiency detection technical field, and disclose a kind of power supply dynamic efficiency online evaluation detection method, comprising the following steps, shunt resistance and binding post key position in resistance load instrument are deployed acquisition module, temperature is collected in real time, resistance change caused by temperature is converted into electric signal, in the present application, the scheme is deployed thin film platinum resistance acquisition module in resistance load instrument shunt resistance and binding post key position, four-wire connection method is used to eliminate lead resistance influence, establish the relationship model of shunt resistance and binding post temperature and resistance, the resistance change amount is calculated in combination with Kalman filter and adaptive weighted average algorithm, the measurement signal is corrected in real time by compensation module consisting of programmable gain amplifier and digital potentiometer, the measurement error caused by shunt resistance and binding post temperature change can be reduced by more than 90%, the measurement accuracy of electronic load instrument is improved to ±0.1% or less, ensure that power supply dynamic efficiency evaluation detection result is accurate and reliable.

A circuit (100) includes a programmable gain amplifier (PGA 102) having a PGA output. The circuit (100) further includes a delta-sigma modulator (104) having an input coupled to the PGA output. The circuit (100) also includes a digital filter (114) and a dynamic range enhancer (DRE) circuit (110). The digital filter (114) is coupled to the delta-sigma modulator output and to the PGA (102). The DRE circuit (110) is configured to monitor a signal level of the delta-sigma modulator output. In response to the signal level being less than a DRE threshold, the DRE circuit (110) is configured to program the PGA to a gain level greater than unity gain and to cause the digital filter to implement an attenuation of the same magnitude as the gain level to be programmed into the PGA (102).

The present application belongs to the technical field of analog circuit, and particularly relates to a programmable gain amplifier suitable for a high-precision ADC front end. The programmable gain amplifier of the present application adopts a whole differential structure, and comprises a whole differential amplifier. The amplifier completes the function of signal amplification, and has the characteristics of high gain and high linearity. The switches of the network of the switching feedback resistance and capacitance all adopt transmission gate switches, so as to reduce the channel charge injection effect of the switches and the nonlinearity of the on-resistance of the switches. The feedback network of the programmable gain amplifier changes the size of the feedback resistance and capacitance through the transmission gate and the resistance-capacitance combination, so as to realize the control of the gain. The input signal is amplified by the accurate amplification multiple, and meanwhile the size of the feedback resistance and capacitance is impedance-matched, so as to ensure that the-3dB bandwidth of the whole programmable gain amplifier remains basically unchanged, so that the working speed of the programmable gain amplifier under different gain conditions remains consistent, and the linearity is greatly improved.

The invention belongs to the technical field of CMOS (complementary metal oxide semiconductor) image sensors, and particularly relates to a global and rolling compatible high-frame-frequency 3D (three-dimensional) stacked image sensor and a readout method.According to the image sensor, a readout circuit and pixel layers are stacked after being designed from the structure, pixel array layers are divided into UP and DN groups, each group is independently subjected to two-way readout, and the readout circuit and the pixel layers are subjected to two-way readout; the reading circuit layer adopts the same group for the column level and adopts a mode of parallel working of a plurality of sub-column level ADCs for the column level ADC to improve the frame frequency; meanwhile, a switched capacitor array is added to an analog front-end circuit (AFE), and the inconsistency of the sequence of integral signals and reset signals output by pixels in a global shutter mode and a rolling shutter mode is adjusted, so that the requirement that a programmable gain amplifier (PGA) and an analog-to-digital converter (ADC) firstly process the reset signals and then process the integral signals is met. Compatibility of a global shutter mode and a rolling shutter mode is achieved, and the pixel structure design is more flexible.

A programmable gain amplifier that comprises: a transconductance amplifier, a switch leakage compensation circuit and a transimpedance amplifier. The transconductance amplifier provides a transconductance amplifier current signal and includes a switchable resistance network. The switch leakage compensation circuit provides a compensation current signal and comprises a switchable compensation resistance network. The transimpedance amplifier provides the output voltage signal based on the difference between the transconductance amplifier current signal and the compensation current signal. The switchable compensation resistance network comprises a plurality of branches in parallel with each other, wherein each branch includes: a gain-mimicking switch that has a corresponding gain-setting switch in the switchable resistance network; and a leakage-current-conducting switch in series with the gain-mimicking switch. The leakage-current-conducting switch is openable and closable in accordance with the complement of a switch control signal that is used to control the gain-mimicking switch in the same branch.

A circuit includes an analog-to-digital converter (ADC). The circuit also includes an analog front end (AFE, 310) having an AFE input and an AFE output. The AFE output is coupled to an input of the ADC. The AFE includes a programmable gain amplifier (PGA, 115) having a first PGA input and a second PGA input. The PGA (115) includes a first operational amplifier (OP AMP, OP1) having first and second OP AMP inputs. The AFE (310) also includes a programmable resistance circuit (320) having a first programmable resistance circuit input and first and second programmable resistance circuit outputs. The first programmable resistance circuit input is coupled to the first and second PGA inputs. The programmable resistance circuit (320) includes a resistor network having first and second balancing resistances. The first balancing resistance is coupled to the first and second OP AMP inputs, and the second balancing resistance is coupled to the first and second OP AMP inputs.