10 results about "High gain amplifier" patented technology

The invention discloses a low-output-ripple ultralow-offset-voltage operational amplifier and a working method thereof. The low-output-ripple ultralow-offset-voltage operational amplifier comprises a first chopper circuit, a first-stage operational amplifier additionally provided with an offset voltage adjusting circuit, a second chopper circuit, a notch filter, a second-stage operational amplifier and a third-stage operational amplifier which are sequentially connected. The offset voltage adjusting circuit trims the input offset voltage of the first-stage operational amplifier to hundreds of microvolts and then outputs the offset voltage to the second chopper circuit; the first chopper circuit and the second chopper circuit are used for modulating the offset voltage of the first-stage operational amplifier to a chopping frequency, and then the ripple voltage at the chopping frequency is filtered by the notch filter; the first-stage operational amplifier is designed to be a high-gain amplifier so as to restrain input offset voltage errors caused by the second-stage operational amplifier and the third-stage operational amplifier. According to the invention, low output ripple voltage and ultralow input offset voltage can be realized only by using the wave trap with a small area.

The application relates to the technical field of tunable N-path filter, in particular to a tunable N-path reflection-free filter and a superheterodyne receiver. The tunable N-path reflection-free filter comprises a signal source, an N-path band-pass filter unit, an N-path band-stop filter unit, an output resistor and a phase-splitting clock generating circuit. The output end of the signal source is connected with one end of the N-path band-pass filter unit and the N-path band-stop filter unit respectively, the other end of the N-path band-stop filter unit is connected with the output resistor, the gate of a plurality of MOS switches in the N-path band-pass filter unit and the N-path band-stop filter unit is connected with the phase-splitting clock generating circuit, and the phase-splitting clock generating circuit outputs a control signal. The tunable N-path reflection-free filter provided by the application has excellent frequency selectivity, can effectively suppress high-order harmonics, and can adjust the passband and the stopband by changing the switching frequency. Meanwhile, the filter can eliminate the reflected signal, prevent the intermodulation interference and gain fluctuation of the mixer and the high-gain amplifier in the system.

Amplifier (10) with high gain and high tracking speed, comprising: a pair of input transistors (MNP 12, MNN 14) to which input voltages (IN+ and IN-) are applied; a pair of loads switched as diodes (MPP 16, MPN 18) connected to the input transistors (MNP 12, MNN 14); at least a pair of current sources (MPIP 20, MPIN 22) connected to the loads switched as diodes (MPP 16, MPN 18);and a bias control (28) designed to switch off the at least one pair of current sources (MPIP 20, MPIN 22) to enable a high tracking speed for the amplifier (10), wherein the bias control (28) switches off the current sources (MPIP 20, MPIN 22) during a coarse tracking mode of the amplifier (10) when the amplifier (10) is tracking, and to switch on the at least one pair of current sources (MPIP 20, MPIN 22) to enable a high gain for the amplifier (10), and wherein the bias control (28) switches on at least one pair of current sources (MPIP 20, MPIN 22) at the end of the tracking and leaves the current sources (MPIP 20, MPIN 22) switched on when the amplifier (10) is not tracking.

The present application relates to the field of array signal processing, and particularly relates to a high linearity pipeline ADC front-end sampling circuit. In the traditional structure, the sampling current of MDAC and Sub-ADC flows through the output impedance of the input signal source at the same time, which leads to signal-dependent voltage drop and thus introduces nonlinear error. The technical scheme of the present application is to construct a compensation circuit in the Sub-ADC branch, which is opposite in polarity to the input current of the MDAC branch, so that the input currents of the two branches are offset on the output impedance of the signal source, thereby significantly reducing the nonlinear distortion. The present application does not require additional high-gain amplifiers or complex calibration algorithms, and can effectively suppress the nonlinear caused by the input current through circuit structure optimization, and is suitable for high-speed high-precision pipeline ADC design.

The utility model provides a built-in IEPE circuit used for a piezoelectric type shock wave pressure sensor, comprising a high gain amplifier, a feedback capacitor and a constant current source, the high gain amplifier is composed of an N channel enhanced field effect transistor, a P channel enhanced field effect transistor, a resistor R1, a resistor R2, a feedback resistor R3 and a resistor R4, the two ends of the high-gain amplifier are connected with the constant current source, the positive electrode of the constant current source is an output end, and the constant current source is connected to the P-channel enhanced field effect transistor; the piezoelectric sensor sensitive element is connected with the input end and receives a charge signal generated by the piezoelectric sensor sensitive element through the input end; the feedback capacitor is installed between the input end and the output end to form negative feedback to form a charge amplifying circuit, a small number of electronic components are used for constructing a complete IEPE circuit, and the charge amplifying circuit has the advantages of being high in integration level, small in size and high in anti-interference capacity and can be integrated in a sensor to amplify charge signals.

The invention relates to the technical field of external diagnosis equipment, in particular to an optical signal processing circuit for a hematology analyzer. Comprising a light source driving monitoring module, a sheath flow control circuit module, a photoelectric detector, a transconductance amplifier, a low-noise amplifier, a buffer, a high-gain amplifier, a low-gain amplifier, a first gain adjusting unit, a first filter, a first analog-to-digital converter, a second gain adjusting unit and a second filter. A second analog-to-digital converter and a programmable gate array / digital processing unit; a high-low gain dual-channel multi-stage amplification and signal processing technology is adopted, so that weak optical platelet signals can be effectively captured, amplified and processed; and correct counting of medium and large volume cells such as red blood cells and white blood cells can be ensured. The circuit can automatically adjust the gain multiple value of the amplifier in a test, identifies various cell signals between two channels through a digital algorithm, and has good accuracy and precision in a whole blood cell test.

A microwave plasma monitoring system including one or more sensors structured to generate a signal based on a measured parameter of the microwave plasma, a plasma monitoring device in communication with the one or more sensors, and at least one measurement device in communication with the plasma monitoring device. The plasma monitoring device includes a signal processing assembly that includes one or more high-gain amplifiers that receive and amplify one or more weak frequency components of the signal generated by the one or more sensors, and one or more filters in communication with the one or more high-gain amplifiers that attenuate or block one or more undesired frequency components of the signal. The at least one measurement device is structured to convert the amplified and filtered signal from the plasma monitoring device to a value of the measured parameter and to output the value of the measured parameter.

This invention discloses an oscillator loop phase noise suppression structure and method, relating to the field of microwave signal source technology. It includes: a low 1 / f phase noise amplifier; a first coupler input connected to the output of the low 1 / f phase noise amplifier, with a through port connected to the LO terminal of a double-balanced mixer; an oscillator amplifier input connected to the coupled output of the first coupler; a voltage-controlled phase shifter connected at one end to the oscillator amplifier and at the other end to the input of a second coupler; a power port of the second coupler connected to the RF terminal of the double-balanced mixer; and an IF terminal of the double-balanced mixer connected to the VCP operating voltage port of the voltage-controlled phase shifter after passing through an integrator (PI). By combining the low 1 / f phase noise amplifier with a high-gain amplifier, high gain and ultra-low phase noise can be achieved.

The present application belongs to the field of power management in analog integrated circuits, and particularly relates to a digital auxiliary analog off-chip capacitor-free low-dropout linear voltage regulator; comprising a control module, a bandgap reference circuit, a transient enhancement circuit, a transient enhancement power tube group, an analog loop and a digital loop; in a load steady state, an analog LDO is used as a main control scheme, a high-gain amplifier can obtain an accurate output voltage, and limit cycle oscillation does not occur. Only when a load transient occurs, a digital LDO is called as a main control scheme, so as to improve speed, reduce static current and suppress switching noise. On-chip integration, high-precision output voltage, wide load current range, fast transient response speed, high-efficiency power tube area utilization and low output ripple can be realized. The circuit can be applicable to SoC modular power management and digital IP load.

The invention relates to the field of array signal processing, in particular to a high-linearity pipeline ADC front-end sampling circuit. In a traditional structure, sampling currents of an MDAC and a Sub-ADC flow through output impedance of an input signal source at the same time, voltage drop on which signals depend is caused, and therefore nonlinear errors are introduced. According to the technical scheme, a compensating circuit with the polarity opposite to that of the input current of an MDAC branch is constructed in a Sub-ADC branch, so that the input current of the two branches counteracts each other on the output impedance of a signal source, and nonlinear distortion is remarkably reduced. According to the invention, an additional high-gain amplifier or a complex calibration algorithm is not needed, nonlinearity caused by the input current can be effectively suppressed only through circuit structure optimization, and the circuit is suitable for high-speed and high-precision assembly line ADC design.