194results about "Dc-amplifiers with dc-coupled stages" patented technology

A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.

Amplifiers with new circuit topologies for gain shaping and gain control are described herein. An example amplifier circuit with gain control includes a differential transistor pair, a main transistor pair coupled to the differential transistor pair, an auxiliary transistor pair coupled to the differential transistor pair, and a resistive impedance coupled between base terminals of the auxiliary transistor pair. The resistive impedance can include a pair of matched resistors coupled between base terminals of the auxiliary transistor pair. The amplifier can also include a capacitor coupled from a virtual ground node between the pair of matched resistors to ground. The amplifier circuits described herein can present a preferred gain response as compared to other amplifiers, at both midband and peaking frequencies. The amplifier circuits also offer additional options for control of gain at midband frequencies, among other benefits.

An apparatus for wireless communications includes a power amplifier, a low-noise amplifier, a power detector, and a transformer. The transformer includes a first inductor coupled to an output of the power amplifier, and a second inductor coupled to an antenna, wherein the second inductor is magnetically coupled with the first inductor. The transformer also includes a third inductor coupled to an input of the low-noise amplifier, wherein the third inductor is magnetically coupled with the second inductor. The transformer also includes a coupling inductor coupled to an input of the power detector, wherein the coupling inductor is magnetically coupled with at least one of the first inductor and the second inductor.

An RF amplifier includes a transistor, a first inductance element, a second inductance element, and a third inductance element. The transistor includes an output terminal, a reference terminal, and a control terminal for receiving an input signal. The first inductance element is connected between the reference terminal of the transistor and a second power supply. The second inductance element is negatively coupled with the first inductance element and connected between the output terminal and a first power supply. The third inductance element is positively coupled with one of the first inductance element and the second inductance element and negatively coupled with the other.

An exemplary setup includes: a transconductance circuit arrangement with one input and one output; a first capacitor with one terminal; an amplifier with one input and one output, wherein the input of the amplifier is coupled to the output of the transconductance circuit arrangement and the terminal of the first capacitor; a resistor with a first terminal and a second terminal; and a second capacitor with a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the output of the amplifier and the first terminal of the resistor, and wherein the second terminal of the second capacitor is coupled to the input of the transconductance circuit arrangement and the second terminal of the resistor.

Aspects of the subject disclosure may include, for example, first and second operational amplifiers; and a differential pair of NPN transistors in a feedback path of the TLA configured to convert an input current signal into an output voltage signal, where a first emitter of a first NPN transistor of the pair of NPN transistors is connected to an inverting input of the first operational amplifier, and where a second emitter of a second NPN transistor of the pair of NPN transistors is connected to a non-inverting input of the second operational amplifier. Other embodiments are disclosed.

This application discloses a differential transmitter circuit, chip, and electronic device. The differential transmitter circuit includes: a single-slip differential drive enhancement circuit, including a single-ended digital input terminal (IN) and a first differential output terminal (IN_P, IN_N), used to convert the input single-ended digital signal into a pair of differential signals; a differential drive circuit, connected to the first differential output terminal (IN_P, IN_N), including a second differential output terminal (OUT_P, OUT_N), used to convert the differential signals into differential output voltages; wherein, the single-slip differential drive enhancement circuit includes a transmission gate (Tran) and an inverter, used to generate the differential signals with a phase difference of 180° and timing matching. The embodiments of this application aim to solve the technical problems of slow response speed, poor common-mode stability, high power consumption, and insufficient noise suppression capability in the prior art when transmitter circuits are used in LVDS interface applications.

An amplifier arrangement for providing a variable electrode voltage to an ion optical device. The amplifier arrangement comprises a high speed amplifier designed to receive an input signal to the amplifier arrangement and provide a low voltage output, and a low speed adjustable voltage source arranged to float above the low voltage output and configured to provide a high voltage output of the amplifier arrangement. The high voltage output of the amplifier arrangement is fed back to control the high speed amplifier. Advantageously, the amplifier arrangement forms part of a power supply for providing a varying electrode voltage, for example as part of an ion analysis system.

The application relates to the technical field of signal processing, and discloses a logarithmic detector, which comprises at least one feedback loop module, multiple rectification modules, a filtering module, a buffer module, a temperature compensation module and a band gap reference module; the feedback loop module is used for amplifying an input differential input signal to obtain an amplified differential signal; the rectification module is used for converting the differential input signal and the amplified differential signal to output a current signal; the buffer module is used for performing level shifting on a filtered voltage signal to output a detection voltage; the temperature compensation module is used for performing temperature compensation on the detection voltage to output an output signal; one feedback loop module comprises one pre-stage limiting amplification unit, two limiting amplification units and a direct current feedback compensation unit. The direct current feedback compensation unit performs negative feedback on the differential input signal, reduces direct current distortion, and improves the precision of the output signal; the temperature compensation module performs temperature compensation on the voltage signal, and improves the precision of the output signal.

This invention provides an optimized system for improving the slew rate of a Line Driver, comprising a differential input module, a bias current module, an amplification module, an active load module, and a mirror load module. The differential input module receives the input signal and converts the voltage signal into a current signal. The bias current module provides a stable bias current to the circuit. The amplification module receives the current signal from the differential input module and achieves voltage gain. The amplification module is electrically connected to the active load module. The active load module can improve the amplification gain of the amplification module, replicate the current, and stabilize the output node. The mirror load module can replicate the signal amplification path of the amplification module to achieve symmetrical output, thereby improving the signal amplification effect and anti-interference reliability of the circuit and solving the problem of limited slew rate in traditional optimized systems for Line Drivers.

In described examples, a low dropout voltage regulator includes an input voltage terminal, a resistive element, first and second transistors, an output terminal, a differential amplifier, and first and second saturation prevention circuits. The resistive element is coupled between the input voltage terminal and a gate of the first transistor. The output terminal is coupled to the drain of the first transistor and the source of the second transistor. A first input of the differential amplifier receives a reference voltage, and a second input is coupled to the output terminal. The first saturation prevention circuit provides a first clamp current to the differential amplifier output if the gate-source voltage of the first transistor is less than a first threshold voltage. The second saturation prevention circuit provides a second clamp current to the differential amplifier output if the gate-source voltage of the second transistor is greater than a second threshold voltage.

The invention discloses a multi-loop control circuit and a control method thereof. The multi-loop control circuit comprises an amplification stage circuit and a current selection circuit. Wherein the amplification stage circuit is provided with a first transduction amplifier capable of outputting a first transduction amplification current and a second transduction amplifier capable of outputting a second transduction amplification current. The current selection circuit receives the first transduction amplification current and the second transduction amplification current and outputs an error output current. The current selection circuit selects the maximum one from the first transduction amplification current and the second transduction amplification current and outputs the maximum one as an error output current, and the error output current generates an error amplification signal.

The embodiment of the present application provides an output stage circuit and an operational amplifier, which comprises: a first input end and a second input end for being connected with an input stage circuit; an output end for providing an output signal; a first power supply node for being connected with a first power supply; a second power supply node for being connected with a second power supply; a first transistor connected in a pull-up current path; wherein the pull-up current path extends from the first power supply node to the output end; a gate of the first transistor is connected with the first input end; a second transistor connected in a pull-down current path; wherein the pull-down current path extends from the output end to the second power supply node; a gate of the second transistor is connected with the second input end; a cascade transistor module is vertically connected with the first transistor in the pull-up current path and / or is vertically connected with the second transistor in the pull-down current path. In this way, the output voltage swing of the output stage circuit is improved without changing the first transistor and the second transistor.

The application discloses an input clamping circuit of an operational amplifier, comprising: a threshold setting module, which is used for setting a threshold voltage; an input module, which is connected with a signal input end of the operational amplifier and is used for being turned on when the voltage of the signal input end reaches a first preset voltage, the first preset voltage being obtained based on the threshold voltage and a power supply voltage; a voltage comparator, whose positive input end is connected with the output of the input module and whose negative input end is connected with the power supply voltage; and a current discharge module, which is connected between the signal input end and the ground, wherein the voltage comparator is configured to control the current discharge module to be turned on when the voltage difference between the output voltage of the input module and the power supply voltage exceeds a second preset voltage, so as to discharge the high-voltage pulse signal of the signal input end to the ground. The input clamping circuit not only can protect the input device in the operational amplifier from being damaged by the high-voltage signal, but also can adaptively adjust the clamping threshold according to the application situation, and is more flexible.

This invention relates to a fast-response RSSI circuit, a high-speed burst-mode transimpedance amplifier chip, and an optical receiver module, belonging to the fields of integrated circuits and optical communication. The invention addresses the problems of traditional optical receiver modules relying on external, independent high-voltage sample-and-hold chips to monitor APD photocurrent, resulting in large PCB area, high system cost, low integration, and complex R&D and debugging. The RSSI circuit described in this invention is integrated within the transimpedance amplifier chip and manufactured using the same constant-voltage process. It includes: a transimpedance amplification and monitoring unit providing a monitoring differential voltage proportional to the input photocurrent; an integral feedback control unit generating a global control voltage; a dynamic current allocation unit adaptively allocating a reference current in response to the global control voltage; a DC component management unit extracting the DC component of the input node; a bias calibration unit eliminating fixed bias components; and a signal output unit outputting a received signal strength indication signal proportional to the input photocurrent.

A current mirror circuit (200) comprises: a first current source (206) for providing a first reference current (IB1); a first transistor (M1, 222) having a control terminal (226), a first current terminal (228) coupled to receive the first reference current (IB1), and a second current terminal (230) coupled to a reference potential (VEE); a second transistor (M2, 224) having a control terminal (232) coupled to the control terminal (226) of the first transistor (M1, 222), a first current terminal (234) coupled to an output node (GL, 208) of the current mirror circuit (200), and a second current terminal (236) coupled to the reference potential (VEE); and matching circuitry (300) having an input (302) coupled to the output node (GL, 208) of the current mirror circuit (200), and an output (304) coupled to the first current terminal (228) of the first transistor (M1, 222), the matching circuitry (300) being configured to provide, at the first current terminal (228) of the first transistor (M1, 222), a replica voltage corresponding to a voltage at the output node (GL, 208) of the current mirror circuit (200).

This application relates to a transimpedance amplifier circuit, comprising a front-end amplifier that receives an input current and outputs a corresponding voltage, and a processing stage configured to process the voltage output from the front-end amplifier. The application also relates to an amplifier circuit where the processing stage has a filter having a frequency response with a local minimum. The transimpedance amplifier circuit can be used to process signals including data within a data band, and the filter can be configured such that the local minimum occurs within that data band. The filter response at least partially compensates for resonance peaks in the frequency response of the front-end amplifier caused by anticipated resonance at the input of the front-end amplifier.

The invention relates to the field of current protection systems. The current protection system comprises a shunt sub-system, arranged between an input and an output of the current protection system, the shunt sub-system comprising a first switch and a shunt resistor, the first switch arranged in series with the shunt resistor. The current protection system further comprises a comparator sub-system, arranged in parallel to the shunt resistor, the comparator sub-system being configured for comparing a shunt voltage across the shunt resistor with a reference voltage, the comparator sub-system comprising an offset-compensated operational amplifier. And, the current protection system comprises a control component, arranged between an output of the comparator sub-system and a first control input of the first switch.

Provided is a weak-signal reading circuit for a sensor, comprising a sensing signal input amplifying unit and a signal reading unit. The sensing signal input amplifying unit comprises a first transistor, wherein a gate and a drain of the first transistor are connected with a sensor; the signal reading unit is connected to a source of the first transistor, the first transistor is turned on when the sensor generates a sensing signal, so that the sensing signal is captured by the signal reading unit. When the sensor senses a signal and generates a voltage, the first transistor tends to be switched on, then the signal reading unit reads the sensing signal through the first transistor which has been turned on, that is, by providing the first transistor, the weak-signal reading circuit for sensor can be self-driven according to the voltage generated by the sensor without an extra drive circuit, thereby achieving low power consumption.

The application discloses a kind of full differential current domain echo cancellation analog front-end circuit and its working method.The circuit includes one end and chip pin connection resistance R50_to_AVDD, resistance R_hybrid and local sending current source LS, the other end of resistance R50_to_AVDD is connected with power supply positive pole VDD, the other end of resistance R_hybrid is respectively connected with echo cancellation current source LS_cancel, fixed pull-down current source Idc and the one end of capacitor AC_couple, the other end of capacitor AC_couple is respectively connected with recovery resistance Rdc and gain amplifier Gain, resistance R_hybrid and capacitor AC_couple are all connected with a signal switch in parallel.The application supports three kinds of working modes, can adapt to different encoding mode, different rate application demand, simplifies BOM management.

An internal voltage offset between a positive input and a negative input of a first operational amplifier is compensated. The negative input and the positive input of the first operational amplifier are coupled at the same voltage level. A comparison current generated at an output of the first operational amplifier has a sign that is representative of a sign of the internal voltage offset. The output of the first operational amplifier is biased to a threshold voltage using a current-to-voltage converter. A control voltage is generated from a sum of the threshold voltage and a voltage conversion of the comparison current. Compensation for the internal voltage offset between the positive and negative inputs of the first operational amplifier is made dependent on the control voltage.

The application discloses a clock tree circuit, a clock signal transmission method and a chip, and the circuit comprises a current mode logic buffer at a clock sending end, a clock wire network and a clock buffer at a clock receiving end; the current mode logic buffer is used for driving enhancement and high-frequency performance enhancement on an original differential clock signal generated by a clock source, obtaining an enhanced differential clock signal and driving the enhanced differential clock signal to the clock wire network; wherein the high-frequency performance enhancement is realized through an equivalent negative capacitance generated at an output end of the current mode logic buffer; the clock wire network is used for transmitting the enhanced differential clock signal to one or more clock receiving ends; and the clock buffer is used for performing level conversion and signal correction on the received enhanced differential clock signal, and obtaining a target differential clock signal. According to the application, the clock signal can be accurately and efficiently transmitted without additionally inserting a buffer in the clock wire.

A reference buffer with wide output voltage and current range is provided. A reference buffer includes an error amplifier comprising a first input, a second input, and a first output, wherein the amplifier is configured to generate an output signal indicative of an error between an output reference signal and an internal reference signal. The reference buffer further includes a first voltage follower circuit configured to generate the output reference signal based, at least in part, on the output signal of the error amplifier, wherein the first voltage follower comprises a third input and a second output, and wherein the second output is coupled to the second input of the error amplifier.

An audio input circuit includes a single-ended signal input circuit, a differential signal input circuit, a first amplifier circuit, and a second amplifier circuit. The single-ended signal input circuit is enabled by switches in a single-ended mode to output a single-ended audio signal to the first amplifier circuit. The differential signal input circuit is enabled by switches in a differential mode to output a differential audio signal to the first amplifier circuit. The first amplifier circuit outputs an inverted audio output signal to the second amplifier circuit according to signals it received. The second amplifier circuit outputs a non-inverted audio output signal according to signals it received. In the single-ended and differential modes, the signals inputted to non-inverting inputs of the first and second amplifier circuits are DC signals to stabilize the on-resistance linearity of the switches and prevent the deterioration of the audio input circuit's total harmonic distortion.

A system includes a radio frequency (RF) receiver having a low noise trans-impedance amplifier (LNTA). The LNTA is configured to receive a single-ended RF voltage signal and convert the RF voltage signal to a differential current mode signal. The LNTA is configured for adjustable gain by controllable circuits.

Amplifiers with differential transformers for high peaking frequency are described herein. An example amplifier includes a differential transistor pair, an auxiliary transistor pair coupled to the differential transistor pair, a differential transformer coupled between base terminals of the auxiliary transistor pair, and a bias circuit coupled between base terminals of the auxiliary transistor pair. The differential transformer can be embodied as a coupled-line transformer. The bias circuit can include a first bias circuit coupled between a first coupled line of the differential transformer and a base terminal of a first transistor among the auxiliary transistor pair, and a second bias circuit coupled between a second coupled line of the differential transformer and a base terminal of a second transistor among the auxiliary transistor pair.

The present disclosure relates to the technical field of integrated circuits, and particularly relates to an operational amplifier, a driving chip and an electronic device. The operational amplifier comprises: an operational amplification circuit comprising at least one input transistor group, each input transistor group comprising a first differential input transistor and a second differential input transistor; at least one resistance unit; and at least one voltage follower module, an input end of each voltage follower module being configured to receive a common-mode voltage of a differential signal to be amplified, and an output end of each voltage follower module being connected to a second end of a corresponding resistance unit. According to the present disclosure, the source common node voltage of each input transistor group is followed to change with the common-mode voltage through the resistance unit and the voltage follower module, and on the basis of retaining high linearity and high energy efficiency, the common-mode rejection and the power supply rejection are greatly improved, thereby improving the performance and energy efficiency of the operational amplifier.

The application provides a common-mode feedback circuit with a level conversion function, comprising an amplifier output stage, a resistive common-mode feedback circuit and an amplifier common-mode feedback circuit, the amplifier output stage comprising a first current source I1, a second current source I2, a tail current source I3, input pair tubes M1 and M2 and a common-mode adjusting tube M3, the resistive common-mode feedback circuit comprising a first resistor R1 and a second resistor R2, and the amplifier common-mode feedback circuit comprising a third resistor R3, a fourth resistor R4 and a first operational amplifier AMP1, V OP and V ON The input ports of the resistive common-mode feedback circuit and the amplifier common-mode feedback circuit are commonly connected, for detecting the common-mode voltage and adjusting the common-mode adjusting tube at the same time. The scheme introduces the fast response advantage of the amplifier feedback on the basis of the resistive feedback, realizes the accurate control and dynamic adjustment of the common-mode level, and makes the output common-mode voltage be flexibly set by integrating the level conversion function in the feedback loop, so that the transient response speed of the system is significantly improved.

The application relates to a trans-impedance amplifier integrated with automatic reset and fast burst response, which comprises a trans-impedance amplifier front-end circuit, a reset signal automatic generation circuit in communication with the trans-impedance amplifier front-end circuit and an adjustable low-pass filter circuit; the adjustable low-pass filter circuit is in communication with an output signal of the trans-impedance amplifier front-end circuit and in communication with reset signals RST and inverse reset signals RSTB generated by the reset signal automatic generation circuit; the adjustable low-pass filter circuit is used for controlling MOS variable resistors and MOS switches arranged in the adjustable low-pass filter circuit according to the reset signals RST and the inverse reset signals RSTB and forming a low-pass filter with adjustable cut-off frequency, and a signal output by the low-pass filter with adjustable cut-off frequency conforms to a mean interval of a voltage signal output by the trans-impedance amplifier front-end circuit. An external RESET signal provided by an MCU is no longer needed to complete fast burst response of chips such as a trans-impedance amplifier, a limiting amplifier and a CDR.

Methods, systems, and devices for a radio frequency (RF) power detector are described. An example circuit may include a rectifier having differential RF input terminals and an amplifier configured to generate a voltage that is logarithmically related to the rectifier output current. The rectifier may include a first rectifier core configured to generate a first current reference associated with a difference between the differential RF input terminals and a second rectifier core configured to generate a second current reference associated with a common mode of the differential RF input terminals. The rectifier may further include a third rectifier core configured to generate a first reference voltage that is based at least in part on a bias voltage of the differential RF input terminals a fourth rectifier core configured to generate a rectifier output current that is based at least in part on the first and second current references.