312 results about "Inductive load" patented technology

The invention belongs to the technical field of unmanned aerial vehicle full-aviation electromagnetic detection, and particularly relates to a full-aviation frequency domain electromagnetic emission system and a control method. A broadband frequency mixing and matching circuit is connected in series between an H-bridge power inverter and an emission coil of an unmanned aerial vehicle electromagnetic emission system; the broadband mixing and matching circuit comprises a first resonance unit formed by connecting a fixed capacitor and an adjustable inductor in parallel and a second resonance unit formed by connecting a fixed capacitor and an adjustable inductor in parallel, and the first resonance unit and the second resonance unit are connected in series. The adjustable inductor is matched with the dynamic impedance of the inductive load by adjusting the inductance value, and the broadband frequency mixing and matching circuit can adjust the impedance in real time, so that the matching of different resonant frequencies is realized, and the frequency range of a matching signal can be obviously widened.

The invention discloses an audio and video data transmission anti-interference method and system based on coding error correction, relates to the technical field of audio and video data transmission, and is used for solving the problem that centralized error burst occurs in audio and video data transmission due to periodic strong electromagnetic interference generated by high-power inductive load equipment in an industrial production environment. The method comprises the following steps: acquiring predicted interference occurrence time, duration and reference intensity range of high-power inductive load equipment in an industrial production environment; detecting the channel quality of a transmission link to obtain the actual starting time and ending time of interference, the influence on a specific frequency range and the specific mode and length of error burst; predicting interference occurrence time according to an interference rule; generating a transmission strategy adjustment instruction according to the priorities of the multiple paths of audio and video streams; and according to the transmission strategy adjustment instruction, carrying out coding error correction or transmission time sequence adjustment on the multiple paths of audio and video streams before the interference occurrence time.

The invention relates to the technical field of motor current regulation, in particular to a synchronous reluctance motor induction load change automatic regulation output energy-saving current system, which comprises a load control unit for selecting a starting mode according to a load condition by monitoring load data of a motor in real time and predicting a change trend of a load; the compensation isolation unit performs sampling and real-time compensation according to the change trend to obtain accurate data; the dynamic protection unit is connected with the compensation isolation unit, and key components are modularly designed, so that the starting stability of the motor is improved, the high efficiency in the running process of the motor is ensured, the impact on a power grid and the motor during starting can be remarkably reduced through a soft starting mode, the service life of the motor is prolonged, and the running stability of the motor is improved. The sampling precision is improved, it is ensured that current adjustment and load control are more accurate, the reliability of the system is greatly improved through an over-current and over-temperature protection mechanism, and equipment damage or shutdown caused by faults is avoided.

The present invention provides a power converter, a resisting method in inductive load switching, and a power generation system. The power converter includes a direct current input end, an alternating current output end, a bus capacitor, a DC / AC power conversion circuit, and a controller. The direct current input end is configured to connect to a direct current source. The alternating current output end is configured to connect to a load. The bus capacitor includes a positive bus capacitor and a negative bus capacitor that are connected in series. The positive bus capacitor is connected to a positive direct current bus. The negative bus capacitor is connected to a negative direct current bus. The DC / AC power conversion circuit is connected in parallel between the positive direct current bus and the negative direct current bus, and configured to convert a direct current from the direct current source into an alternating current, and transmit the alternating current to the load through the alternating current output end. The controller is configured to control, based on an even harmonic current on a connection line between the DC / AC power conversion circuit and the load, an output voltage at which the power converter outputs the alternating current, to reduce an absolute value of a voltage difference between the positive bus capacitor and the negative bus capacitor.

The present invention provides a negative voltage protection circuit, which includes a voltage clamping module, which is arranged between the gate terminal and the drain terminal of an NMOS tube, and is used to clamp the voltage between the drain terminal and the source terminal of the NMOS tube to a protection threshold voltage when the NMOS tube is turned off, so that the voltage between the drain terminal and the source terminal of the NMOS tube can be clamped within a safe range, avoiding the problem that the NMOS tube is broken down due to excessive current between its source terminal and the drain terminal. In this process, the power supply voltage for the inductive load, the NMOS tube and the inductive load form a demagnetization path, so that the inductive load can be demagnetized faster. On this basis, since the protection threshold voltage of the voltage clamping module is negatively correlated with the temperature of the voltage clamping module, when the NMOS tube is overheated during demagnetization, the voltage between the drain terminal and the source terminal of the NMOS tube will decrease, so that the NMOS tube will not produce thermal failure during demagnetization.

The invention discloses a current distortion suppression method and device for an N-phase AC-AC conversion system, and relates to the field of voltage conversion control, and the method comprises the steps: determining the ideal sine reference current of an xth phase, obtaining the actual input current of the xth phase in a current control period and the actual output current of the xth phase corresponding to an inductive load, and determining the current variation of the xth phase; and determining a difference value between the ideal sine reference current of the x-th phase and the actual input current as a real-time current distortion error signal of the x-th phase, further determining a compensation duty ratio of the x-th phase for suppressing current distortion by combining a preset duty ratio compensation strategy, and further determining a target duty ratio of the x-th phase as a target PWM signal. According to the scheme, the input current of each phase can be monitored, inductive load disturbance can be responded, the compensation duty ratio of the x-th phase used for restraining current distortion can be dynamically adjusted so as to determine the target duty ratio, the current distortion of the input current can be effectively restrained, and the input current can follow ideal sine reference current.

Techniques are provided for controlling alternating current (AC) power which is supplied to an inductive load by an AC switch. For example, the AC power is controlled by a process which comprises detecting zero-voltage crossings of an AC voltage waveform of the AC power, monitoring a load voltage to detect for a presence of inductive flyback voltage when the AC switch is placed into a turned-off state, and determining a delay time to place the AC switch into the turned-off state subsequent to a detected zero-voltage crossing of the AC voltage waveform, when inductive flyback voltage is detected in the load voltage, so that the AC switch is placed into the turned-off state at a time which substantially coincides with a zero-current crossing of load current of the inductive load, to thereby suppress the generation of inductive flyback voltage when the AC switch is placed into the turned-off state.

The invention provides a simulation test device and a verification method of a transformer on-load tap-changer tester, the simulation test device comprises a simulation part and a time control unit, the simulation part comprises a signal input unit, an inductive load array, a high-precision resistor array, an AC solid-state relay array and a signal output unit; the inductive load array is sequentially connected with the high-precision resistor array and the alternating-current solid-state relay array; the time control unit is connected with the alternating-current solid-state relay array; the time control unit simulates a time sequence signal in the switching process of the on-load tap-changer to be tested, and the simulation part simulates load impedance conversion in the switching process of the on-load tap-changer to be tested; the measurement of AC / DC parameters of the transformer on-load tap-changer tester is realized. According to the invention, the transformer on-load tap-changer tester integrates alternating current and direct current tests of the transformer on-load tap-changer, so that simulation test and verification of the transformer on-load tap-changer tester in an alternating current and direct current method are realized, and the effectiveness and accuracy of simulation verification are improved.

The utility model discloses an inductive load circuit of a gallium nitride device and electronic equipment, which are used in the technical field of gallium nitride. According to the utility model, when the gallium nitride device is in a turn-off state, the drain-source electrode voltage of the gallium nitride device is clamped in the maximum withstand voltage of the drain-source electrode of the gallium nitride device through the clamping circuit, so that the gallium nitride device can be effectively prevented from being broken down by the voltage and losing efficacy; the gate-source voltage of the gallium nitride device is adjusted through a potential self-building circuit, the gallium nitride device is controlled to work in a semi-conduction state, the current of the inductor is released, and the turn-off process of the gallium nitride device is completed; according to the utility model, in the turn-off process of the gallium nitride device, the clamping circuit and the potential self-building circuit are signal circuits, the power of the gallium nitride inductive load circuit is not additionally consumed, the power loss of the gallium nitride inductive load circuit can be effectively avoided, and the system efficiency of the gallium nitride inductive load circuit is improved.

A controller and an interleaved switching method for a converter for a polyphase connected inductive load including a method for operating: at least a first drive circuit and a second drive circuit in parallel, each connected to one or more phases of the polyphase connected inductive load.

A load driver includes an active clamping circuit coupled between gate and source terminals of a power stage. The active clamping circuit serves to either pass through a gate drive voltage (provided by a gate driver) to the power stage in a PWM mode or to actively clamp the voltage between gate and source terminals of the power stage to enable fast decay recirculation in fast decay mode (when the load driver is configured for active clamping). A semi-active recirculation driver is coupled between ground and the output of the power stage. The semi-active recirculation driver serves to either provide a low impedance recirculation path in the PWM mode or to passively clamp the output voltage to provide for a fast decay recirculation path in fast decay mode (when the load driver is configured for passive clamping).

The invention discloses a method and system for testing electromagnetic radiation characteristics of an IGBT module for a converter valve, and the method comprises the steps: selecting an inductive load connection mode according to the position of an IGBT to be tested during testing: testing an upper IGBT, and connecting the two ends of an inductive load with a first wiring terminal and a second wiring terminal (the first wiring terminal is a neutral point between the upper IGBT and a lower IGBT) of the converter valve; and when the lower tube IGBT is tested, the first wiring terminal and the positive terminal of the bus capacitor are connected. A combined electromagnetic field probe is arranged around the IGBT to be detected, a probe shell is grounded, and a lead is connected with a signal conversion device. Firstly, a bus capacitor is charged to a stable voltage, and environmental background noise is collected by a probe when no gate pole is triggered. And pulse parameters are set by the upper computer and are sent to the driving board through the optical fiber to trigger the IGBT double-pulse action. Electric signals output by the probe are converted into optical signals through the photoelectric converter and transmitted to external equipment through the optical fiber to be restored. And subtracting background noise from a double-pulse measurement result, extracting a net radiation electromagnetic signal, and separating electromagnetic interference signals in different processes according to the switching time of the IGBT. The invention aims to accurately measure the radiation electromagnetic interference signal of the IGBT in the converter valve module in the switching-on, switching-off and diode follow current processes, and provides a basis for the electromagnetic compatibility design and shielding reinforcement of the converter valve module.

The invention relates to a cyclic aging test device for a power semiconductor device with a three-level three-phase bridge twin-dragging structure, which comprises a three-phase bridge test unit, a host control board and a slave control board, and is characterized in that the three-phase bridge test unit comprises a host three-phase bridge, a slave three-phase bridge and a three-phase inductive load with the same three-phase bridge structure; the three-phase bridge is connected with a power semiconductor device; the direct current ends of the host three-phase bridge and the slave three-phase bridge are connected in parallel, and the same group of direct current power supply Vdc supplies power to the host three-phase bridge and the slave three-phase bridge; the alternating current ends of the host three-phase bridge and the slave three-phase bridge are interconnected through the three-phase inductive load to form a twin-trawling structure; the slave control panel controls the voltage output of the three-phase bridge arm as the target of the current closed-loop control of the host control panel, and the host control panel simulates the actual working state of the power semiconductor device by adjusting a control strategy. The device has the beneficial effects that various real working conditions are simulated, and the cyclic aging test of the system-level AC type power semiconductor device is realized.

A capacitive load, an inductive load, or a transmission line coupled to an output of a closed-loop amplifier circuit can cause undesirable oscillations in a feedback signal of the amplifier circuit. The oscillations in the feedback signal can cause the amplifier circuit to exhibit instability and unpredictable behavior. Techniques are described that allow an amplifier circuit to provide a stable response while driving a capacitive load.

The invention discloses wafer dynamic parameter testing equipment which is provided with a testing device and a probe card for testing a wafer which is placed on a probe table and is internally provided with a to-be-tested device, and the probe card is provided with a plurality of probes connected with the to-be-tested device and a plurality of conductive contact pieces connected with the probes respectively. A connecting module of the testing device is provided with a plurality of connectors connected with conductive contact pieces, a high-voltage capacitor electrically connected with a high-voltage power supply in the testing device is connected with an inductive load module through a power switch, the inductive load module is connected with the connectors, and a control module is connected with a chip to be tested through the connectors. The control module realizes the dynamic parameter test of the device to be tested in the wafer by controlling the power switch to be turned on and turned off according to a certain time sequence, and the matching value of the probe card and the connector can reduce spurious oscillation signals so as to effectively improve the accuracy of the dynamic parameter test of the wafer. And therefore, the chip testing efficiency can be improved and the chip cost can be reduced.

The invention provides a closed-loop D-class amplifier loop, a differential closed-loop D-class amplifier loop, audio equipment and electronic equipment, the loop comprises a first-stage integrator, a second-stage integrator, a pulse width modulation module and an H-bridge module which are electrically connected in sequence, and a feedback module, the first end of the feedback module is coupled to the input end of the first-stage integrator, and the second end of the feedback module is coupled to the input end of the second-stage integrator. The second end of the feedback module is coupled to the output end of the H-bridge module, the feedback module comprises a feedback capacitor and a feedback resistor which are connected in parallel, a zero point is formed, and the zero point is designed within the frequency range between one time and two times of the gain bandwidth product. The feedback capacitor is connected to the feedback resistor in parallel, so that zero points in a loop are increased, and the system stability of the class-D amplifier is improved when the class-D amplifier is in a no-load state or the connected inductive load is large.

The invention particularly relates to a three-frequency-band low-profile common-caliber antenna array based on a low-scattering wave-transparent structure, which comprises a low-frequency antenna and a group of 4 * 4-scale high-dual-frequency antenna arrays, the low-frequency antenna is positioned at the top of the array, and the high-dual-frequency antenna arrays are positioned at the bottom. The low-frequency antenna is composed of a low-scattering wave-transparent structure composed of two layers of electromagnetic surfaces, and the first electromagnetic surface located on the upper layer serves as a radiation structure of the low-frequency antenna and is directly excited by a feeder line to radiate electromagnetic waves to a free space. The second electromagnetic surface located on the lower layer and the first electromagnetic surface jointly form a low-scattering wave-transparent structure with frequency selection characteristics, and a multi-band broadband wave-transparent window with second-order response is achieved; the second electromagnetic surface is introduced to serve as inductive loading of the low-frequency antenna, the impedance matching condition of the low-frequency antenna is improved, and the low-profile design of the low-frequency antenna and even the whole array is achieved; and the low-frequency antenna has a wave-transparent characteristic for the high-dual-frequency antenna below the low-frequency antenna, so that the problem of directional diagram distortion caused by space shielding is avoided.

The utility model discloses a circuit capable of inhibiting surge voltage between contacts when a relay acts. The circuit comprises a relay, a resistor, a piezoresistor, a diode, a direct current electromagnetic coil and a binding post. When a high-capacity inductive load in a circuit loses power, a relatively high reverse electromotive force, namely a surge voltage, is generated. A resistor-diode series follow current loop and a piezoresistor-diode series surge suppression loop are reversely connected in parallel to the two ends of an inductive load, when the load loses power and generates reverse electromotive force, the follow current loop eliminates or reduces the electromotive force, and the surge suppression loop is conducted and shunted when the electromotive force exceeds a threshold value, so that surge voltage is prevented from being generated through dual protection; and a relay contact and a circuit are protected. The scheme is a passive suppression protection circuit, has the advantages of simple structure, low cost, fast response, recoverability, dual protection and the like, and improves the operation stability and reliability of equipment.

The invention provides a power distribution network partition optimization method and system. The method comprises the steps that a non-inductive load characteristic index set is constructed, non-inductive load characteristic indexes are constructed into characteristic vectors, electrical attributes of a power supply unit are constructed into attribute vectors, and then a two-dimensional evaluation model is constructed; obtaining a plurality of candidate partitions based on electrical attributes of the power supply units, calculating a comprehensive evaluation value of each load point and each power supply unit through a two-dimensional evaluation model, distributing each load point to the candidate partitions meeting a preset partition requirement through the comprehensive evaluation value, obtaining a preliminary partition scheme, constructing a global optimization model, and obtaining a final partition scheme; and optimizing each candidate partition to obtain a preliminary partition optimization scheme, constructing a corresponding power flow balance equation, and locally adjusting the preliminary partition optimization scheme to obtain a power distribution network partition optimization scheme so as to optimize the power distribution network partition. According to the invention, multi-dimensional evaluation is carried out on the power distribution network to optimize the reasonability of load division of the power distribution network, so that the operation reliability of the power grid is improved.

The application discloses an electromagnetic detection optimized bipolar SHMPWM transmitting method, which comprises the following steps: S1, by analyzing the influence of the resistive and inductive load on the transmitting current waveform distortion and the transmitting spectrum energy loss, extending the current waveform based on the equal-area principle, compensating for the lost transmitting current spectrum energy, and calculating the current waveform extension time; S2, considering the inductive load and the dead zone effect, establishing a bipolar SHMPWM nonlinear equation set; S3, using the particle swarm algorithm to iteratively operate the bipolar SHMPWM nonlinear equation set, and obtaining the solving result of the switching angle of the half-cycle symmetric SHMPWM. The application adopts the optimized particle swarm algorithm to solve the equation set to obtain the switching angle, and realizes that the frequency domain information of the half-cycle symmetric SHMPWM frequency focusing waveform conforms to the specific harmonic amplitude set by the expectation.

The invention provides an FRD chip detection method and platform. According to the method, a switch device and an inductive load module are controlled, a preset forward conduction working condition is established at an FRD chip, and when the FRD chip is in a forward conduction state, the switch device is controlled to switch the conduction state, so that reverse voltage is applied to the two ends of the FRD chip, and the reverse recovery process of the FRD chip is triggered. And then, synchronously acquiring the terminal voltage waveform of the FRD chip and the inductive current waveform associated with the inductive load module to obtain test data. Then, determining a reverse recovery characteristic parameter and an overvoltage characteristic parameter of the FRD chip under the inductive load working condition based on the test data, and finally, evaluating the FRD chip based on the reverse recovery characteristic parameter and the overvoltage characteristic parameter. Therefore, the technical problem that the dynamic performance of the FRD chip under the inductive load cannot be accurately evaluated under the traditional test condition is solved.

The invention discloses a continuous current pulse generation circuit for power device testing and a control method thereof, and relates to the technical field of power electronics, the continuous current pulse generation circuit comprises a power supply, a control unit, a switch unit, an energy storage unit, an inductive load and a current absorption unit; the switch unit comprises a first relay, a second relay, a third relay, n first switches and one second switch; the energy storage unit comprises n capacitors; the control unit is used for respectively controlling the on-off of the first relay, the second relay, the third relay, the n first switches and the n second switches, carrying out different-stage control on each capacitor, and providing continuous current pulse for the test of the power device; the different stages comprise a capacitor charging stage, a capacitor discharging stage according to a time sequence and a capacitor residual charge releasing stage. According to the invention, more real continuous current pulse can be provided for the power device, and the reliability test requirement of the device under the impact of the continuous current pulse is met.

The present application relates to the field of semiconductors, and in particular to a switch chip, including a power transistor unit, including a first transistor; a switching unit; a voltage clamping unit; a state detection unit; a control unit; and a driving unit; during the shutdown process of the inductive load, when the state detection unit detects that the current flowing through the power transistor unit is greater than or equal to a first threshold, the control unit controls the switching unit so that the voltage clamping unit controls the voltage across the power transistor unit to be equal to the clamping voltage; when the state detection unit detects that the current flowing through the power transistor unit is less than the first threshold, the control unit controls the switching unit to avalanche the first transistor, and the avalanche voltage is greater than the clamping voltage. The present application relates to an electronic device. The present application relates to a working method of a switch chip. The switch chip of the present application takes into account the scenarios of the inductive load being shut down at high current and low current, so that the power transistor in the switch chip can withstand greater inductive load energy under the same conditions.

The invention discloses a detection circuit and a detection method of an intelligent power module, the detection circuit comprises a power supply module, the intelligent power module, a microcontroller unit, an inductive load and a comparator, a first voltage dividing unit is electrically connected with the intelligent power module, a second voltage dividing unit is electrically connected with the microcontroller unit, and the microcontroller unit is electrically connected with the inductive load. The microcontroller unit is electrically connected with the intelligent power module; the microcontroller unit comprises an analog input port, an over-current signal port and a digital-to-analog converter port, the intelligent power module comprises a first alternating current output port, and the comparator comprises a positive input port, a negative input port and an output port; the analog input port is connected with the load resistor, and the first AC output port is connected with the sampling resistor; the positive input port is connected with the port of the digital-to-analog converter, the negative input port is connected with the first alternating current output port, and the output port of the comparator is connected with the overcurrent signal port. The structure of the invention can accurately determine whether the intelligent power module is over-current.

The present invention provides a load driving device, which can diagnose a fault of the output terminal before the charging voltage is stabilized in a structure in which a capacitor is connected to the output terminal of the load driving device driving an inductive load. The load driving device of the present invention has a capacitor connected between the load terminal and the ground terminal, and diagnoses whether the load terminal has a fault based on the current flowing between the internal power supply of the diagnostic circuit and the load terminal.

A driver circuit, including: a transistor including a ground side electrode, a control electrode, and a power supply side electrode for an inductive load to be connected thereto; a first resistor connected to the control electrode; a line connected to the first resistor; a second resistor provided between the line and a ground; a first diode, including a cathode connected to the line and an anode, the first diode being connected in parallel with the second resistor; and a second diode including a cathode connected to the line, and an anode for connecting to a capacitor, thereby receiving a voltage generated in the capacitor for driving the transistor.

The invention relates to the technical field of SiP power modules, and discloses a SiP power module integrated by SiCMOSFETs (silicon carbide metal oxide semiconductor field effect transistors) and diodes on a single chip for a medium-power and high-power energy storage power supply. Comprising a chip, the chip is composed of a single-chip integrated SiCMOSFET unit and a diode, the rear surface of the chip is provided with a module packaging plate, the front surface of the chip is provided with a substrate, the front surface of the substrate is connected with the SiCMOSFET unit and the diode, the rear surface of the substrate is provided with a first pin wire, the first pin wire is connected with the chip in a spot welding mode, and the first pin wire is connected with the chip in a spot welding mode. According to the invention, through the monolithic integration and optimized low-inductance packaging design of the SiCMOSFET and the diode and the combination of the advantages of the SiC material, the ultrahigh-frequency working capability, the extremely high conversion efficiency, the excellent thermal performance and the extremely high power density are realized at the same time, the system design is greatly simplified, the excellent reliability and the protection capability for inductive load switching are provided, and the application range is wide. Therefore, the power supply can be applied with high efficiency, high power density and high reliability, such as a medium-high power energy storage power supply.

This invention discloses a control circuit based on a hybrid switching timing of relays and thyristors. By connecting the thyristor in parallel with the relay, the thyristor bears the load current before and after the relay is closed, thus avoiding contact arcing. The control unit triggers the thyristor at the AC zero-crossing point, reducing switching losses and electromagnetic interference, and combines an RC snubber circuit with optocoupler isolation to improve reliability. This device can increase the relay lifespan from 20,000 cycles to 500,000 cycles, and its cost is only 1 / 3 that of a solid-state relay, making it particularly suitable for soft-start control of high-current inductive loads.

An integrated circuit (IC) includes an array of compute units and control circuitry for mitigating supply voltage overshoot. Each compute unit contributes to an aggregate time rate of change of current drawn by the IC when transitioning between processing and non-processing states. The control circuitry is configurable to stagger when each compute unit is eligible to transition from processing data to not processing data relative to other compute units, thereby limiting the negative rate of change of current through inductive loads of the IC and preventing voltage overshoot above a maximum threshold. The control circuitry may be distributed among the compute units and configured using statically reconfigurable parameters that specify the maximum number of compute units permitted to transition concurrently and the minimum number of clock cycles between successive group transitions.

An externally cooled high efficiency induction coil system is formed from a substantially planar electrically conductive strip, machined or 3D printed from solid copper or a copper alloy defining a multiturn solenoidal induction coil. Each turn of the multiturn induction coil is separated by a separation gap dimensioned to produce a low-variance heating pattern in a magnetically coupled inductive load or workpiece when an alternating current is supplied to the induction coil. A cooling fluid is forced over the induction coil and through the gap width to externally cool the induction coil via forced convection. The substantially planar electrically conductive strip may further include a plurality of crests and troughs defining a wave structure to increase surface area in contact with the cooling fluid and thereby increase efficiency in heat transfer.