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The present invention provides robotic surgical instruments and systems that include electrosurgical cutting/shearing tools and methods of performing a robotic surgical procedure. The surgical instruments can advantageously be used in robotically controlled minimally invasive surgical operations. A surgical instrument generally comprises an elongate shaft having a proximal end and a distal end. An end effector, for performing a surgical operation such as cutting, shearing, grasping, engaging, or contacting tissue adjacent a surgical site, is coupleable to a distal end of the shaft. Preferably, the end effector comprises a pair of scissor-like blades for cooperatively shearing the tissue. A conductor electrically communicating with at least one blade delivers electrical energy to tissue engaged by the blades. An interface coupled to the proximal end of the shaft and removably connectable to the robotic surgical system is also included.

The present invention provides improved electrosurgical instruments and systems having electrocautery energy supply conductors that provide inhibited current leakage and methods of performing a robotically controlled minimally invasive surgical procedure while preventing unintended capacitive coupling. A surgical instrument generally comprises an elongate shaft having a proximal end and a distal end and defining an internal longitudinally extending passage. An electrocautery end effector is coupled to or disposed at the distal end of the shaft. An interface or tool base is coupled to or disposed at the proximal end of the shaft and removably connectable to the robotic surgical system. Typically, an independent electrical conductor extends from the interface to the end effector to transmit electrical energy to tissue engaged by the end effector. A sealed insulation tube extends within the passage and over the conductor. A separation is maintained between the sealed insulation tube and the conductor.

A pixel current driver comprises a plurality of thin film transistors (TFTs) each having dual gates and for driving OLED layers. A top gate of the dual gates is formed between a source and a drain of each of the thin film transistors, to thereby minimize parasitic capacitance. The top gate is grounded or electrically tied to a bottom gate. The plurality of thin film transistors may be two thin film transistors formed in voltage-programmed manner or five thin film transistors formed in a current-programmed ΔV_T-compensated manner. Other versions of the current-programmed circuit with different numbers of thin film transistors are also presented that compensate for δV_T. The OLED layer are continuous and vertically stacked on the plurality of thin film transistors to provide an aperture ratio close to 100%.

Embodiments of the present invention are directed to apparatus and methods of minimizing current drain of an implantable medical device during wireless communication with the device, thereby reducing battery depletion of the device. In one embodiment, the implantable medical device comprises a wireless receiver configured to communicate wirelessly with an external transmitter of an external device via a plurality of communication channels each having a different frequency within a frequency band. The wireless receiver comprises a wideband receiver circuit configured to detect a signal from any of the plurality of communication channels at the different frequencies within the frequency band simultaneously. In another embodiment, the external device is configured to communicate wirelessly with the implantable medical device via a preset communication channel, and via an alternate communication channel selected according to an order of priority if the wireless receiver does not detect a suitable signal from the external transmitter using the preset communication channel.

A charging apparatus for electrically charging a capacitor storage type power source comprises a switching circuit for turning on/off the charge current, a current detection circuit for detecting the charge current, a voltage detection circuit for detecting the voltage of power source, a constant current control circuit for outputting an error amplifying signal according to the current value, a power control circuit for outputting an error amplifying signal according to the current value, the voltage value-and a power reference value, a constant voltage control circuit for outputting an error amplifying signal according to the voltage value and a voltage reference value, an OR circuit for selecting one of the error amplifying signals and a control circuit for generating a pulse width modulation signal according to the error amplifying signal output from the OR circuit to turn on/off the switching circuit and control the charge current.

A multi-motor drive in which the resonance existing between one or more output filter capacitors of a current source inverter and an a.c. induction motor is reduced. The inverter features a switching pattern generator which controls the power switches of the inverter based on a reference current. A control loop, connected to the switching pattern generator, measures the load current or voltage and generates a nominal reference current based on an error therein; determines a damping current based on the voltage at the terminal; and determines the reference current supplied to the switching pattern generator by subtracting the damping current from the nominal reference current. The invention essentially simulates the use of a physical damping resistor connected in parallel with each output filter capacitor, but without the corresponding energy loss. This form of active damping control is also applied to a resonance mode existing between the input filter capacitors of a PWM-based rectifier and the system inductance of a power source.

The present invention provides a polyphase inductive power transfer (IPT) system comprising a primary power supply comprising a plurality of primary conductors, the primary conductors being individually selectively operable to provide or receive a magnetic field for inductive power transfer; and at least one pick-up comprising one or more pick-up conductors, the one or more pick-up conductors each being individually selectively operable to magnetically couple with a primary conductor to control power transfer between the primary power supply and a load coupled or coupleable with the respective pick-up. The polyphase primary power supply may be used to power a plurality of single-phase pick-ups, one or more polyphase pick-ups, or a combination thereof. Also disclosed are polyphase primary and secondary converters for use in such a system.

A Switch Node Assisted Linear architecture, including a linear amplifier in parallel with a switched converter, is configurable in two tracking modes: (a) a SMAL regulator in which the amplifier sets toad voltage with an envelope tracking bandwidth, and the switched converter is configured for current assist, and (b) a Switched Mode Power Supply configuration in which the amplifier is switch-decoupled, and the switcher circuit is switched configured with an output capacitor, operable as an SMPS providing load voltage with an adaptive tracking bandwidth that is less than the envelope tracking bandwidth. Staged switching effects substantially seamless transitions between tracking modes, with the amplifier holding the load voltage at a substantially constant envelope tracking voltage (CVET): (a) for ET-AT transitions, the CVET mode enables pre-charging the output capacitor to a target AT voltage, prior to switch-decoupling the amplifier; and (b) for AT-ET transitions, CVET mode enables discharging the output capacitor.

A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.

The drive for an a.c. induction motor features a rectifier for converting alternating current into direct current and a current source inverter for converting direct current into alternating current supplied to a motor. A d.c. link choke interconnects the rectifier and the inverter. The inverter includes a first control loop which provides a desired or command d.c. link choke current to a second control loop responsible for the rectifier. For the purposes of the second control loop the actual d.c. link choke current and an input voltage of the inverter are detected. The difference or error between the desired and actual d.c. choke currents are minimized by a compensator. The output of the compensator is added to the detected inverter input voltage, and the sum is fed to a switching pattern generator which controls the switches in the rectifier. In this manner the feedback of the inverter input voltage is decoupled from the compensator responsible for the d.c. link choke current. This makes the parameters of the second control loop substantially independent of the load, thereby enhancing the ease with which the control loop may be tuned and hence the stability of the drive.

A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.

There is disclosed a voltage supply stage comprising: a selection means for selecting one of a plurality of power supply voltages in dependance on a reference signal representing a desired power supply voltage; a combining means for combining the selected power supply voltage with a correction signal to generate an adjusted power supply voltage; and an adjusting means adapted to generate the correction signal in dependence on the reference signal and the adjusted power supply voltage, wherein the selection means is arranged to select the one of the plurality of supply voltages further in dependence on a signal derived from one of the inputs to the combining means.

A reservoir electrode assembly of the present invention for an iontophoretic drug delivery device includes an electrode and a hydrophilic reservoir situated in electrically conductive relation to the electrode. The hydrophilic reservoir is formed from a bibulous hydrophilic cross-linked polymeric material having a first surface and a second surface that is adhesively adherent to the electrode. The first surface of the polymeric material is releasably adhesively adherent when applied to an area of a patient's skin. The polymeric material has a cohesive strength forms an adhesive bond with a bond strength between the second surface of the polymeric material to the electrode that is greater than the cohesive strength of the polymeric material. Additionally, an adhesive bond strength of the first surface of the polymeric material to the applied area of the patient is less than the cohesive strength of the polymeric material so that upon removal of the reservoir assembly of the invention from the applied area of the patient, substantially no polymeric material remains on the applied area and the hydrophilic reservoir remains substantially intact and adhesively adherent to the electrode.

The present invention relates to a method for determining drive values for driving a lighting device at a desired brightness and color. The method comprising the steps of determining a first luminous flux weight ratio based on the desired color and a first drive current for driving each of the differently colored LEDs, determining a first luminous flux for each of the differently colored LEDs based on the desired brightness and the first luminous flux weight ratio, comparing, for each of the differently colored LEDs, the first luminous flux with a nominal luminous flux for a plurality of different drive currents, selecting, for each of the differently colored LEDs, a preferred drive current that at least can produce the first luminous flux, determining a second luminous flux weight ratio based on the desired color and the selected drive currents for each of the differently colored LEDs, determining a second luminous flux for each of the differently colored LEDs based on the desired brightness and the second luminous flux weight ratio, and determining a duty cycle for each of the differently colored LEDs at the selected drive currents, wherein the selected currents at the determined duty cycles produces the second luminous flux for each of the differently colored LEDs. The present invention provides for the possibility to limit the number of necessary computational steps for determining preferred drive currents. Furthermore, an increase in number of current level and/or differently colored LEDs would only slightly increase the computational cost.

In a semiconductor storage device with cross point type arrays of memory cells including variable resistor elements, a selected data line and unselected data lines are supplied with a row selecting potential and a row unselecting potential through a data line selecting transistor respectively, a selected bit line and unselected bit lines are supplied with a column selecting potential and a column unselecting potential through a bit line selecting transistor respectively. Data lines and bit lines are separately driven so that when the data line selecting transistor is higher in the current driving capability than the bit line selecting transistor, a second bias voltage between the row unselecting potential and column selecting potential is lower than a first bias voltage between the row selecting potential and column unselecting potential, in the opposite case, the first bias voltage is lower than the second voltage.

A chop saw, grinding wheel, or like apparatus is disclosed herein also incorporated to an easily portable dust collection system. In a preferred embodiment, a worktable is provided with a center slot for receiving a circular saw blade. A negative pressure and resulting air flow is provided at the center slot to capture particulate matter as a byproduct of cutting the workpiece. Side slots are also disclosed to assist in particulate collection. A unique filter chamber having a cylindrical filter is additionally provided to remove dust from air and discharge the filtered air at a lateral side of the apparatus. A filter cleaning knob is additionally disclosed to assist in cleaning the filter. Of the beneficial aspects of the chop saw with dust collection system is its portability being one integral unit and the dust filter being easily cleaned and maintained.

A semiconductor device including a large capacity non-volatile memory and at least one random access memory, said the access time of said device being matched to the access time of each random access memory. The semiconductor memory device is comprised of: a non-volatile memory FLASH having a first reading time; a random access memory DRAM having a second reading time which is more than 100 times shorter than the first reading time; a circuit that includes a control circuit connected to both the FLASH and the DRAM and enabled to control accesses to those FLASH and DRAM; and a plurality of I/O terminals connected to the circuit. As a result, FLASH data is transferred to the DRAM before the DRAM is accessed, thereby matching the access time between the FLASH and the DRAM. Data is written back from the DRAM to the FLASH as needed, thereby keeping data matched between the FLASH and the DRAM and storing the data.

A magnetoresistance effect element includes: a first ferromagnetic layer having invariable magnetization perpendicular to a film plane; a second ferromagnetic layer having variable magnetization perpendicular to the film plane; a first nonmagnetic layer interposed between the first ferromagnetic layer and the second ferromagnetic layer; a third ferromagnetic layer provided on an opposite side of the second ferromagnetic layer from the first nonmagnetic layer, and having variable magnetization parallel to the film plane; and a second nonmagnetic layer interposed between the second and third ferromagnetic layers. Spin-polarized electrons are injected into the second ferromagnetic layer by flowing a current in the direction perpendicular to the film planes between the first and third ferromagnetic layers, precession movement is induced in the magnetization of the third ferromagnetic layer by injecting the spin-polarized electrons, and a microwave magnetic field of a frequency corresponding to the precession movement is applied to the second ferromagnetic layer.

A pixel structure using a voltage programming type active matrix organic light emitting diode (OLED) which can minimize a current deterioration phenomenon is disclosed. The pixel structure includes a fifth TFT receiving an external management signal EMS through its gate, having a drain region connected to a cathode part of an OLED, and receiving an input of an OLED current through its source-drain current path when the OLED emits light, a fourth TFT receiving a set scan signal SCAN through its gate and having source and drain regions connected to gate and drain parts of a third TFT T3, respectively, the third TFT T3 being a current driving transistor for determining the OLED current when the OLED emits light, a capacitor C having upper and lower plates connected to the gate part of the third TFT T3 and a ground voltage VSS, respectively, a first TFT receiving the SCAN signal through its gate and transferring a data voltage to a source region of the third TFT T3, a second TFT receiving the EMS signal through its gate and connecting the lower part of the capacitor C to the source region of the third TFT T3, and a sixth TFT having source and drain regions connected to an external clock signal CLK and the gate region of the third TFT T3, respectively, and having a gate connected to the gate part of the third TFT T3. An anode part of the OLED receives a voltage VDD.