2189results about "Differential amplifiers" patented technology

A logarithmic amplifier includes programmable gain amplifiers each having a different gain, wherein an input of each of the programmable gain amplifiers is coupled to an input of the logarithmic amplifier; and a summing circuit having inputs coupled to a corresponding output of each of the programmable gain amplifiers and an output coupled to an output of the logarithmic amplifier, wherein the summing circuit generates a logarithmic transfer function having piecewise linear segments.

The invention provides a common-mode feedback circuit and a differential amplifier thereof, the common-mode feedback circuit comprises a sampling circuit and an amplifier circuit, the sampling circuit comprises a first input end, a second input end and a first output end, the first input end receives a first differential signal Voutp, and the second input end receives a second differential signal Voutn; the level shift module comprises a third input end, a fourth input end and a second output end, receives a common-mode signal VCMS and a reference common-mode signal VOCM output by the sampling circuit, and adjusts the common mode of the common-mode signal VCMS and the reference common-mode signal VOCM to enable the second output end to output a common-mode feedback signal VCMFB processed by the level shift module; the amplifier circuit receives a common mode feedback signal VCMFB. After the technical scheme is adopted, the same speed as that of a differential loop can be realized, the current of a main operational amplifier can be multiplexed, the power consumption of a common-mode loop is far lower than that of a main loop, and meanwhile, the common-mode level can be randomly adjusted.

The invention provides a broadband low-noise amplifier based on a three-coil coupling transformer. The broadband low-noise amplifier comprises an input matching network, a common-source differential output driving stage amplifier, an inter-stage matching network, a common-source differential output power stage amplifier and an output matching network which are connected in sequence, broadband matching is realized by using the input matching network and the inter-stage matching network, and the effective transconductance of the transistor is improved; through the cross-coupled capacitors, the LNA gain and stability on a broadband are improved, better isolation is realized, and input and output are decoupled; due to the design of the grounding capacitor, the linearity of the LNA is improved; through the combination of the three-coil coupling transformer and the differential topology, output signals are superposed in the same direction at the output end, and noise is cancelled in the reverse direction at the output end, so that the thermal noise is greatly inhibited, the isolation is improved through the output matching network, the insertion loss is reduced, and the output matching performance is optimized.

The invention discloses a high-voltage power amplifier with an over-temperature and over-current protection circuit, and relates to the technical field of integrated circuits. The high-voltage operational amplifier comprises a high-voltage operational amplifier core unit and a self-adaptive protection circuit unit, the high-voltage operational amplifier core unit comprises a rail-to-rail input stage, a gain amplification stage and an AB type push-pull output stage which are sequentially cascaded, and the AB type push-pull output stage comprises a PMOS upper power tube and an NMOS lower power tube; the self-adaptive protection circuit unit comprises a PMOS (P-channel Metal Oxide Semiconductor) current-limiting protection circuit, an NMOS (N-channel Metal Oxide Semiconductor) current-limiting protection circuit and an over-temperature protection circuit; the PMOS current-limiting protection circuit is used for generating a high-voltage domain over-current control signal when the power tube on the PMOS is over-current; the NMOS current-limiting protection circuit is used for generating a low-voltage domain overcurrent control signal when the NMOS lower power tube is in overcurrent; the over-temperature protection circuit is used for generating high-voltage domain over-temperature turn-off signals and low-voltage domain over-temperature turn-off signals when the amplifier is over-temperature; and finally, carrying out logic synthesis on the corresponding over-current control signal and the over-temperature turn-off signal to generate a gate clamping signal.

The various implementations described herein include techniques and apparatuses for multi-channel biopotential signal acquisition, biopotential signal pre-processing, and adaptive signal conditioning. In one aspect, an analog frontend circuit includes an instrumentation amplifier (INA) and an analog-to-digital circuit (ADC) in a forward signal path. A digital circuit receives input from the ADC. An adaptive baseline tracking and compensation circuit tracks and compensates moving motion artifact driven changes. A power line interference (PLI) detection and compensation circuit tracks a desired number of PLI harmonics, and magnitude, phase and frequency for the PLI harmonics in real time. A digital-to-analog converter (DAC) circuit combines output of the adaptive baseline tracking and compensation circuit and the PLI detection and compensation circuit to output an analog output. A passive filter receives the analog output and drives an analog compensation signal at an input of the INA.

The invention discloses a noise elimination circuit structure, a low noise amplifier, a chip and electronic equipment. The noise elimination circuit structure comprises an input matching network; a common source stage amplification path connected with the first differential output end of the input matching network, comprising a first common source stage differential amplifier, and outputting an amplified first signal inverted from the radio frequency input signal to the ground; the common-gate amplification path is connected with the second differential output end of the input matching network, comprises a first common-gate differential amplifier and outputs an amplified second signal which is opposite to the radio frequency input signal to the ground; and the output end of the common-source amplification path and the output end of the common-gate amplification path are connected in parallel to form the output end of the noise elimination circuit structure. The common-source amplification path and the common-gate amplification path required by the noise elimination structure are realized by using one amplifier path, the utilization rate of the layout area is improved, the compactness of the layout is realized, and the amplifier can be widely applied to the field of communication or radar.

The invention relates to the technical field of wireless communication networks, and provides a low-channel electroencephalogram amplification circuit and brain-computer interface equipment oriented to an after-ear electroencephalogram signal, and the low-channel electroencephalogram amplification circuit comprises a dry electrode sensing module which is used for collecting an electroencephalogram signal; the front active amplification module comprises an operational amplifier circuit with high input impedance; the anti-aliasing filtering module is formed by cascading a multi-order passive filtering network and an active filtering circuit, is connected with the output end of the front active amplification module and is used for filtering high-frequency interference signals; the right leg driving feedback module comprises a programmable impedance adjusting circuit and a current limiting protection circuit, the right leg driving feedback module and the front active amplification module form a closed-loop feedback loop, and the output end of the right leg driving feedback module and the human body form a current loop through a protection resistor; the analog-to-digital conversion module adopts an integrated low-power-consumption analog front-end chip; a wireless transmission module; and the power supply management module provides independent power supply for the analog front-end chip, the operational amplifier circuit and the wireless transmission module.

A calibration circuit includes a replica transconductance stage that is a replica of a transconductance amplifier in a serializer / deserializer (SerDes) interface and a replica transimpedance stage that is a replica of a transimpedance amplifier in the SerDes interface. The replica transimpedance stage has an input coupled to its output. A comparison circuit is configured to generate a difference signal representative of a difference between voltage levels of an input signal received at an input of the replica transconductance stage and an output signal representative of voltage level at the output of the replica transimpedance stage. Replica feedback resistors are configured to couple an output of the replica transimpedance stage to the input of the replica transconductance stage. The difference signal can be used to select resistance values provided by the replica feedback resistors and by corresponding gain control resistors in the transimpedance amplifier in the SerDes interface.

An amplification circuit is configured to differentially amplify an input signal and a reference voltage to generate an output signal when a clock signal has a first logic level. The amplification circuit is configured to precharge the output signal when the clock signal has a second logic level. The amplification circuit is configured to adjust a current driving force that precharges the output signal based on the reference voltage.

A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.

The present disclosure discloses a Doherty power amplifier, including: a quadrature coupler including a first coupled inductor and a second coupled inductor, the quadrature coupler being configured to split an input signal into a first signal and a second signal; a first amplifier circuit, configured to amplify the first signal; a second amplifier circuit, configured to amplify the second signal; and a load modulation network, which is an output voltage-combined Doherty load modulation network using a T equivalent model. An overlapping part of the coupled inductors is used to provide distributed parasitic capacitance, thereby eliminating the need to set an additional capacitor in the quadrature coupler, and therefore reducing an area. Through the T equivalent model, a quarter-wavelength transmission line is equated to the load modulation network of the embodiments of the present disclosure, multiple inductors are combined into transformers with small areas.

The invention provides a fully differential operational amplifier circuit and an operational amplifier. The fully differential operational amplifier circuit comprises an input stage circuit, a gain stage circuit and a common-mode feedback circuit, the input stage circuit is used for processing a differential input voltage signal, converting the differential input voltage signal into a differential current signal and transmitting the differential current signal to the gain stage circuit; the gain stage circuit is used for performing gain processing on the differential current signal and outputting a target differential voltage signal; the common-mode feedback circuit is used for detecting the common-mode voltage of the target differential voltage signal, generating a common-mode feedback signal and transmitting the common-mode feedback signal to the gain-stage circuit to stabilize the common-mode voltage; wherein the gain stage circuit comprises a gain enhancement circuit, and the gain enhancement circuit is used for increasing the output impedance of the gain stage circuit. According to the chopping operational amplifier, the input stage circuit, the gain stage circuit, the common mode feedback circuit and the gain enhancement circuit are combined, so that the precision and the sensitivity of the chopping operational amplifier are improved.

The invention discloses a power synthesis amplifier which comprises two power amplification structures, and each power amplification structure is composed of an input matching circuit, a driving stage amplifier DA, an inter-stage matching circuit, a power stage amplifier PA and an output matching circuit. The input end of the power synthesis amplifier is connected by a T-junction power distribution network; the output end of the power synthesis amplifier is connected with the T-junction power synthesis network. The output power of the power amplifier is improved by adopting a two-path synthesis technology, specifically, the power amplifier can be expanded to multiple paths according to needs, and an output power synthesis network adopts a current type synthesis network, so that the amplitude-phase balance of two paths of output signals and the current processing capability of a circuit are ensured, and the output efficiency is improved; the output-stage matching circuit adopts a transformer with a high coupling coefficient to reduce signal loss, the input and inter-stage matching networks adopt a transformer with a low coupling coefficient to play a role in expanding bandwidth, and the multi-stage matching circuit can be widely applied to the technical field of mobile communication and radar detection.

A squelch detection device is provided. The squelch detection device receives first and second input signals and first and second threshold voltages. The squelch detection device determines a first common mode of the first and second input signals and a second common mode of the first and second threshold voltages. The squelch detection device averages the first common mode with the second common mode to produce an average common mode and sets the first common mode of the first and second input signals to the average common mode. The squelch detection device sets the second common mode of the first and second threshold voltages to the average common mode and determines a state of a squelch signal, indicative of whether the first and second input signals are attributable to noise, based on the first and second input signals and the first and second threshold voltages.

The invention provides a dynamic residual amplification circuit based on charge sampling, and relates to the technical field of integrated circuits, the dynamic residual amplification circuit comprises an integrating circuit, a logic circuit, a charge pump and a zero-cross detection circuit, the integrating circuit is connected with the logic circuit and the zero-cross detection circuit, the integrating circuit converts a sampled input differential signal into a constant current, and the constant current is connected with the charge pump. The output node is continuously charged or discharged, so that the input differential signal is converted into a current integral quantity; the zero-cross detection circuit monitors the output voltage of the integrating circuit in real time, and when the output voltage is greater than or equal to the common mode voltage VCM, the moment when the output voltage is equal to the common mode voltage VCM is converted into a digital clock edge; the logic circuit is connected with the charge pump and outputs digital pulses to the charge pump according to the digital clock edge so as to control the reset time sequence of the whole dynamic residual amplification circuit; the charge pump is configured to output a residual voltage modulated by the digital pulse in response to the digital pulse. The application helps to improve the linearity of the residual signal.

An even harmonic multiplier employing complementary current reuse is disclosed. The even harmonic multiplier employs supply voltage and current density scaling to reduce power consumption. Further, by using complimentary NMOS and PMOS transistors, the even harmonic multiplier achieves high areal efficiency. Current reuse causes a reduction in noise at the first harmonic, as the corresponding first harmonic currents from the NMOS and PMOS transistors are in opposite, i.e., canceling, directions. Complementary current reuse is now feasible, as the performance of PMOS transistors at current process nodes is similar to those of NMOS transistors, with appropriate sizing leading to approximately equivalent transconductances. Multiple even harmonic multiplier configurations are possible, with many using transformer circuits at the input and / or the output. The resultant even harmonic multipliers find ready application in millimeter wave radio frequency receivers. The most common even harmonic multiplier is a frequency doubler, which produces a strong second harmonic signal.

The invention provides a correlated double-sampling program-controlled gain amplifier for a high-energy particle detection pixel sensor and an implementation method, and solves the technical problem that a large dynamic range and high readout precision cannot be considered at the same time during existing high-energy particle detection. The circuit comprises a correlated double-sampling circuit, a signal polarity conversion circuit, an amplification feedback circuit and a configuration automatic judgment circuit. The correlated double sampling circuit is used for performing double sampling on the output voltage of the pixel signal to obtain twice sampling voltage; the configuration automatic judgment circuit is used for selecting configurations for switching according to the voltage difference between the two sampling voltages to obtain an output signal; and the amplification feedback circuit is used for performing fixed gain voltage amplification on the output signal to obtain an amplified voltage signal. The circuit can be widely applied to the technical field of integrated circuits.

The invention discloses a multi-channel common-mode feedback high-gain amplification circuit. The circuit comprises a differential amplification module, an output end of which is connected with a load; the input end of the common-mode detection module is connected with the output end of the differential amplification module; the first input end of the error amplification module is connected with the output end of the common-mode detection module, and the second input end of the error amplification module receives reference voltage; and the multi-path feedback control module comprises at least two feedback branches which are connected in parallel, the input ends of the feedback branches are jointly connected with the output end of the error amplification module, the output ends of the feedback branches are respectively connected with different bias nodes in the differential amplification module, and the feedback branches have path impedance with gradient change. Through a dynamic division mechanism of a feedback branch, and in combination with a gain boosting unit and a hybrid compensation network, high-precision rapid establishment under a high-speed load is realized.

A class D amplifier circuit receives an analog audio signal with a first reference voltage as its center level, and outputs an output pulse signal having a duty cycle that corresponds to the analog audio signal. A bias circuit generates a second reference voltage having a voltage level obtained as a division of the first reference voltage and the power supply voltage. A periodic voltage generating circuit of the class D amplifier circuit generates a periodic voltage having a triangle waveform or otherwise a sawtooth waveform having an amplitude that corresponds to the second reference voltage.

A transimpedance amplifier circuit (110) is proposed, comprising at least one transimpedance amplifier (112). The transimpedance amplifier comprises at least one variable feedback resistor (114) and at least one operational amplifier (116). The variable feedback resistor (114) is connected between an input of an operational amplifier (116) and an output of the operational amplifier (116).

A mixer includes a mixing stage, and a first transistor and a second transistor coupled to the mixing stage. A gate of the first transistor is coupled to a first input of the mixer, and a gate of the second transistor is coupled to a second input of the mixer. The mixer also includes a first source resistor coupled to a source of the first transistor, and a second source resistor coupled to a source of the second transistor. The mixer further includes an amplifier having a first input coupled to the source of the first transistor, and a second input coupled to the source of the second transistor. The amplifier is configured to adjust at least one bias voltage of at least one of the first transistor and the second transistor based on a differential voltage between the first and second inputs of the amplifier.

The invention relates to the technical field of signal processing, in particular to a microseismic sensor front-end signal conditioning circuit based on lag correction frequency expansion. The microseismic sensor front-end signal conditioning circuit based on lag correction frequency broadening comprises a differential amplification circuit used for converting a differential signal input by a microseismic sensor into a single-ended vibration signal and carrying out pre-amplification processing on the vibration signal according to a preset gain to obtain an amplified vibration signal; and the filtering and lag correction circuit is used for widening the frequency range of the amplified vibration signal in a filtering and lag correction mode to obtain a conditioned vibration signal. According to the invention, frequency expansion can be carried out on the magnetoelectric sensor through a low-frequency compensation technology, and the response capability of the magnetoelectric sensor to a low-frequency signal is improved.

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

The invention discloses a gain boosting type floating anti-phase dynamic amplifier circuit, and relates to the technical field of integrated circuits, the gain boosting type floating anti-phase dynamic amplifier circuit comprises a power supply, a main amplifier, a first auxiliary amplifier and a second auxiliary amplifier, and the main amplifier and the auxiliary amplifiers both adopt a cascode floating anti-phase dynamic amplifier structure; the main amplifier comprises a first power supply capacitor, a second power supply capacitor, a plurality of first common-source transistors and a plurality of first common-gate transistors; a plurality of drain electrodes of the plurality of first common-source transistors are respectively connected with the input ends of the first auxiliary amplifier and the second auxiliary amplifier, and a plurality of grid electrodes of the first common-gate transistors are respectively connected with the output ends of the first auxiliary amplifier and the second auxiliary amplifier; the first auxiliary amplifier and the second auxiliary amplifier each comprise a plurality of second common-gate transistors, and a plurality of gates of the second common-gate transistors are directly connected to the common-mode level. According to the amplifier circuit, the gain of the amplifier is improved on the premise that the speed and the stability are guaranteed.

The invention discloses a self-stabilization zero operational amplifier circuit free from input imbalance and common mode influence, relates to the technical field of integrated circuits, and is applied to a high-precision operational amplifier. The operational amplifier is a three-stage operational amplifier and mainly comprises a single auxiliary input end zeroing amplifier, a main amplifier and an output stage. After a zero setting auxiliary input end of a traditional zero setting amplifier is changed into single-end input from differential input and a zero setting input stage is subjected to multi-stage design, an offset voltage of 3.8 microvolts, a low-frequency gain of 189dB and a gain bandwidth product of 8.6 MHz are realized under power consumption of 400 microamperes, the phase margin of the operational amplifier is 78 degrees under unit gain, and the stability requirement is met. Compared with a traditional structure, the low-residual-offset operational amplifier has the advantages that lower residual offset and larger operational amplifier bandwidth are achieved, and the application range is wider.

A semiconductor device has an amplifier and common mode suppression (CMS) circuit formed on a common substrate. The CMS circuit has a first input and second input coupled for receiving an input signal and further has a first output coupled to a first input of the amplifier and a second output coupled to a second input of the amplifier to reduce common mode. The CMS circuit further has a ground plane, a first conductive trace disposed over the ground plane and coupled between the first input and first output, second conductive trace disposed over the ground plane and coupled between the second input and second output, and third conductive trace disposed over the ground plane with a first end of the third conductive trace coupled to the ground plane and a second end of the third conductive trace open circuit to form a resonator.

A voltage generation circuit includes a voltage input terminal, a voltage output terminal, a first resistor having a first terminal electrically connected to the voltage input terminal, a second resistor having a third terminal electrically connected to the second terminal and a fourth terminal electrically connected to a ground potential, a first capacitor having a first capacitive terminal electrically connected to the voltage input terminal, a third resistor having a fifth terminal electrically connected to a second capacitive terminal, a fourth resistor having a seventh terminal electrically connected to a sixth terminal, and a first operational amplifier having a first inverting input terminal electrically connected to the sixth terminal, a first non-inverting input terminal electrically connected to the second terminal, and a first output terminal electrically connected to the voltage output terminal and an eighth terminal.

An error amplifier includes a first transistor having a first error amplifier input and having first and second current terminals, a second transistor having a second error amplifier input and having third and fourth current terminals, a first resistor coupled between a supply voltage terminal and the first current terminal, and a second resistor coupled between the supply voltage terminal and the third current terminal. The error amplifier has a second stage circuit coupled to the first and second resistors. The second stage circuit has an error amplifier output. The second stage circuit is configured to cause less current to flow through the second stage circuit than a current that flows through either of the first or second resistors or the first or second transistors.

The invention describes a Josephson parametric amplifier and a manufacturing method thereof. The broadband Josephson parametric amplifier comprises: a substrate; a coplanar waveguide disposed on the substrate, the coplanar waveguide having an impedance that varies in a length direction thereof, in which the coplanar waveguide includes a conductor separated from a first ground plane by a first gap and separated from a second ground plane by a second gap; and a non-linear resonator disposed on the substrate and coupled to the coplanar waveguide.

The ultralow frequency sensor comprises a vibration detection unit, a power supply voltage stabilization unit and a signal conditioning unit, the power supply voltage stabilization unit is provided with a low dropout linear voltage regulator U20, a voltage converter U19 and a negative voltage regulator U21, and the low dropout linear voltage regulator U20 stabilizes an external power supply as a positive power supply VCC; the voltage converter U19 is used for converting positive voltage of an external power supply into negative voltage and outputting stable negative power supply VEE through the negative voltage stabilizer; the positive power supply VCC and the negative power supply VEE supply power to the signal conditioning unit; the signal conditioning unit comprises a high common mode rejection differential amplifier, a differential-to-single-ended amplifier, a band-pass filter and a differential output driver, a differential signal output by the vibration detection unit sequentially passes through the high common mode rejection differential amplifier, the differential-to-single-ended amplifier, the band-pass filter and the differential output driver, and then a differential voltage signal is output; the method has the advantages of high stability and reliability and the like.