412results about "Gated amplifiers" patented technology

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

Disclosed is a technology related to a low noise amplifier applied between an RF receiver and an RF switch. A phase difference matching circuit having the same phase difference as a positive gain amplifier is added to an output terminal of an attenuator of a low noise amplifier having a variable gain switching structure. In addition, a variable impedance circuit connected to an output terminal of the positive gain amplifier and an output terminal of a phase difference matching unit to finely adjust the phase difference of each output terminal may be further included.

Apparatus and methods for power amplifier consolidation are disclosed. In certain embodiments, a power amplifier system includes a controllable attenuator that generates a 2G cellular transmit signal, a multi-throw switch including a first input that receives the 2G cellular transmit signal and a second input that receives a 5G cellular transmit signal, and a power amplifier including an input electrically connected an output of the multi-throw switch. The power amplifier amplifies the 2G cellular transmit signal in a first mode and amplifies the 5G cellular transmit signal in a second mode.

A power amplifier includes a main switched capacitor power amplifier (SCPA), a peak SCPA, and a shunt inductor. The main SCPA is electrically coupled to a load. The peak SCPA is in parallel with the main SCPA and electrically coupled to the load. The shunt inductor is electrically coupled between the peak SCPA and the load.

Circuits and methods for providing ESD protection, particularly for LNAs lacking a DC blocking input capacitor (“capless LNAs”). Novel circuitry provides both improved ESD protection and an improved Noise Figure compared to conventional designs. One embodiment includes an integrated circuit including a voltage source pin and a plurality of low-noise amplifiers lacking a respective DC blocking input capacitor, each of the plurality of low-noise amplifiers including: a voltage source terminal coupled to the voltage source pin, an input terminal configured to receive a signal to be amplified, an output terminal configured to output an amplified version of the received signal to be amplified, an ESD protection circuit coupled to the input terminal and to both the voltage source terminal and a reference potential, and a distributed ESD clamp coupled between the reference potential and a node located between the ESD protection circuit and the voltage source terminal.

A low-noise amplifier (LNA) includes a first transistor, a second transistor, and a load coupled to a drain of the first transistor and a drain of the second transistor. The LNA also includes a first reactive impedance matching network including a first inductor and a second inductor inductively coupled with the first inductor, wherein the first inductor is coupled to a source of the first transistor, and the second inductor is coupled to a gate of the first transistor. The LNA also includes a second reactive impedance matching network including a third inductor and a fourth inductor inductively coupled with the third inductor, wherein the third inductor is coupled to a source of the second transistor, and the fourth inductor is coupled to a gate of the second transistor. The LNA also includes a switching circuit configured to enable or disable each of the reactive impedance matching networks.

An impedance matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second transistor differential pair. The network can further include a matching network connected to the first port and the second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

Circuits and methods include amplification circuitry coupled to a plurality of input signal paths and an output signal path and a unified signal path combining a feedback path couplable between a feedback node in the output signal path and the input signal path via a plurality of input switches and a passive gain path couplable between the feedback node in the output signal path and one or more input signal paths through the input switch. The circuit may include a first capacitor and a variable resistor coupled in series and a second capacitor coupled in series with a feedback path switch and a power supply rejection resistor. The passive gain path may further include a shunt switch coupled in series between a plurality of bypass switches to form a T-switch. A fast charging switch may be configurable to couple a second capacitor to a reference potential during a state change of the unified signal path.

A high-voltage input stage circuit without bias current includes a high-voltage conversion unit, a clamping unit and an input unit. The high-voltage conversion unit is connected to the clamping unit, and is used to generate a unique switching voltage based on the magnitude of the differential input voltage, and the switching voltage is respectively input into the positive phase clamping unit and the negative phase clamping unit of the clamping unit. The clamping unit is connected to the high-voltage conversion unit and the input unit, and is used to realize conduction or shutdown based on the switching voltage to input the differential input voltage into the input unit; the input unit is used to realize voltage output to the subsequent load.

A radio-frequency module includes one or more first electronic components disposed on one main surface and one or more second electronic components disposed on another main surface. The one or more first electronic components include at least one of a filter whose passband includes a first band, a switch connected to the filter, a power amplifier connected to the filter, and a switch connected to the filter. The one or more second electronic components include at least one of a filter whose passband includes a second band in which the frequency of a harmonic wave of a signal in the first band is included, a switch connected to the filter, a low-noise amplifier connected to the filter, and an inductor connected to a path that forms a connection between the first low-noise amplifier and an antenna connection terminal.

A radio frequency module is provided that includes a module laminate having main surfaces that oppose each other; at least one power amplifier circuit on a first main surface; and at least one integrated circuit on the second main surface. The integrated circuit includes at least one switch included in a switched-capacitor circuit and at least one switch included in a supply modulator. The switched-capacitor circuit generates a plurality of discrete voltages based on an input voltage and outputs the generated plurality of discrete voltages to the supply modulator. The supply modulator selectively outputs at least one voltage of the generated plurality of discrete voltages to a power amplifier. The power amplifier circuit includes a first amplifying transistor of the power amplifier.

Disclosed in the present invention are a low-loss radio frequency transceiving front-end module and an electronic device. The radio frequency transceiving front-end module comprises at least one PA transmitting path, at least one LNA receiving path, at least one bypass receiving path, and / or at least one bypass transmitting path; the at least one PA transmitting path or the at least one LNA receiving path is directly connected to an ANT port of an antenna, and the PA transmitting path or the LNA receiving path comprises at least one switch connected in parallel to the ground; the remaining PA transmitting path or LNA receiving path is connected to the ANT port of the antenna by means of a radio frequency switch.

This disclosure provides systems, methods, and devices for wireless communications that support enhanced two-stage low-noise amplifiers with feedforward circuitry. In a first aspect, a receiver circuit includes a two-stage low-noise amplifier (LNA) configured to amplify a radio frequency (RF) input signal and output a combined amplified RF input signal to a mixer. The two-stage LNA includes a first gain stage configured to amplify the RF input signal and output the amplified RF input signal to a second gain stage of the two-stage LNA and to the mixer via a feedforward path, and includes the second gain stage configured to amplify the amplified RF input signal received from the first gain stage. The two-stage LNA further includes feedforward circuitry in the feedforward path and configured to provide the amplified RF input signal from the first gain stage to the mixer. Other aspects and features are also claimed and described.

A radio frequency power amplifier includes a power amplification transistor and a gate bias circuit. The gate bias circuit includes a VHb terminal connected to a high voltage power supply for bias, a VLb terminal connected to a low voltage power supply for bias, an enable terminal that receives an enable signal, an enable transistor and a voltage dividing resistor that are connected in series and connected between the VHb terminal and the VLb terminal, a driver that outputs a voltage to a control terminal of the enable transistor, and a gate bias output terminal that outputs, as a gate bias voltage, a divided voltage generated by the voltage dividing resistor. When an OFF signal is received as the enable signal, the driver causes the enable transistor to operate in a first operating area that is not a cutoff region.

Embodiments of a method and apparatus for reconfiguring an amplifier system with a switchable multiple-coil transformer are disclosed. In an example, a transformer with multiple switches is described. The transformer includes a first coil electrically coupled to a pre-power amplifier that is configured to receive an input signal, a second coil inductively coupled to the first coil and configured to be electrically coupled to a first power amplifier, a third coil inductively coupled to the first coil and electrically coupled to a second power amplifier, and a switch to alternately connect and disconnect the third coil from a ground.

A high voltage driver is provided that includes a PMOS stack of transistors arranged in series between a power supply node and an output node. The high voltage driver also includes an NMOS stack of transistors arranged between the output node and ground.

A transistor device package includes a component assembly comprising an interconnect structure, a transistor die having a front surface including gate, drain, and source terminal on a first surface of the interconnect structure, and one or more passive electrical components electrically coupled to the gate, drain, and / or source terminal by the interconnect structure. A thermally conductive flange is attached to a back surface of the transistor die, which is opposite the front surface, by a conductive adhesive. Respective patterns of the conductive adhesive are provided on the first surface of the interconnect structure, and least one of the respective patterns of the conductive adhesive provides an input, output, or ground signal path for the transistor device package. Related fabrication methods are also discussed.

A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.

The present disclosure relates to power amplifier circuitry with temperature-controlled biasing and protective shutdown based on die temperature. A first amplifier die and second amplifier die each have their own power amplifiers and temperature-sensing elements. An amplifier controller die controls both power amplifier dice, generating a bias current that can be coupled to either power amplifier die to activate the power amplifier of one or the other die. The bias current magnitude is updated in response to decreased temperature-dependent voltage from the inactive die which is at an average temperature of both dice. A switch control logic also selects the temperature-dependent voltage of the temperature-sensing element of the active die to input to a comparator that outputs a thermal shutdown signal if the temperature of the active die approaches a damaging level, and the switch control logic controls opening of switches connected to the bias output terminal to prevent damage.

The present disclosure provides a power amplifier system. The system includes: a differential power divider configured to perform power distribution on an input signal and output a plurality of sub-differential signals; a plurality of branch differential amplifying circuits, wherein each branch differential amplifying circuit of the plurality of branch differential amplifying circuits is configured to amplify a corresponding sub-differential signal; and a differential synthesizer connected with the plurality of branch differential amplifying circuits and configured to perform power synthesis on the plurality of sub-differential signals to obtain a synthesized differential signal; wherein an operating state of at least one of the plurality of branch differential amplifying circuits is different from that of the other branch differential amplifying circuits of the plurality of branch differential amplifying circuits.

According to one embodiment, an electronic device comprises: a memory that stores instructions; a first power amplifier (PA) selectively connected to at least one of a plurality of modulators via a first switch; a first modulator of the plurality of modulators that includes a second switch connected between the first switch and a first capacitor, and a third switch connected to an output end of a first buck converter, and is configured to operate in an envelope tracking (ET) mode or an average power tracking (APT) mode; a second modulator of the plurality of modulators that includes a fourth switch connected between the first switch and a second capacitor, and a fifth switch connected to an output end of a second buck converter, and is configured to operate in an ET mode or an APT mode; and at least one processor that is operatively coupled to the first PA, the first modulator, and the second modulator, and comprises a processing circuit, wherein the instructions, when executed by the at least one processor, cause the electronic device to control the first modulator to operate in the APT mode on the basis of identifying a first event associated with network communication, control the first switch so as to couple the first PA to the first modulator and the second modulator, control the second switch, the third switch, and the fourth switch to be turned on, and control the fifth switch to be turned off on the basis of the first modulator operating in the APT mode.

Exemplary embodiments of the described technology provide a power supply system and method. The exemplary power supply system may include a load circuit comprising power electronics configured to apply DC power to a load. The power supply system may also include a power supply unit connected to drive the load circuit. The power supply unit may include a converter configured to convert input AC power to DC power. The power supply system may also include a controller. The controller may be configured to generate voltage and current control signals to be received as input by the load circuit. The voltage and current control signals may represent voltage and current values ​​to be applied to the load. The controller may also be configured to determine a voltage level to be supplied by the power supply unit to the load circuit. The controller may also be configured to generate a signal to be received by the power supply unit that represents a voltage level to be supplied by the power supply unit to the load circuit. The power supply system may include circuitry for measuring voltage with high accuracy.

A wireless communication circuit for use in an electronic device may include: a power amplifier (PA) configured to amplify radio frequency (RF) signals in a first frequency band of a first radio access technology (RAT) in a first communication mode and to amplify RF signals in a second frequency band of a second RAT in a second communication mode; and a switch including a first input terminal connectable to receive an envelope tracking (ET) power supply signal, a second input terminal connectable to receive an average power tracking (APT) power supply signal, and an output terminal connected to the PA. The switch may be configured to switchably connect one of the first input terminal and the second input terminal to the output terminal in response to a switching control signal.

Methods and devices to mitigate the detrimental effects of highly capacitive output routes of multiple gain low noise amplifiers on the overall performance of the circuit are disclosed. The disclosed methods and devices implement the same inductive element across the output load in both the low gain and high gain operational modes. Furthermore, such devices implement switches to control the selection of different signal paths for the high gain and low gain mode. The implemented switches are also used to selectively adjust the isolation of the output stage of the LNA.

Low noise amplifier (LNA) architectures addressing the parasitic challenges in the circuit in order to meet the high gain and bandwidth requirement at higher frequencies are disclosed. The described LNAs include cascode transistors and implement a tunable inductor (Lgate) in series with the gate terminal of a transistor (M2) of the cascode transistors to improve the gain and bandwidth of the LNAs and achieve high gain wideband switching LNAs.

A power amplifier (100) includes an input end (RFIN), an output end (RFOUT), a first amplification circuit (PA1), a second amplification circuit (PA3), a bias circuit (BIAS3), a current detection circuit (110), and a first protection circuit (120). The first amplification circuit (PA1) includes a first signal input end (IN1) coupled to the input end (RFIN) and a first signal output end (OUT1). The bias circuit (BIAS3) outputs a bias current (IBIAS3) to the second amplification circuit (PA3). The current detection circuit (110) generates a digital control signal (VOCP) according to the bias current (IBIAS3). The first protection circuit (120) selectively reduces the radio frequency signal (RF) input to the first signal input end (IN1) according to the digital control signal (VOCP).

A radio frequency circuit including power amplifiers, a transformer having an input-side coil and an output-side coil, a bias circuit connected to the power amplifiers, an output terminal connected to one end of the output-side coil, an output terminal connected to another end of the output-side coil, a switch connected between the output terminal and a ground, a switch connected between the output terminal and a ground, a phase shift line having an input end connected to an output terminal of the power amplifier and an output end connected to one end of the input-side coil, and a phase shift line having an input end connected to an output terminal of the power amplifier and an output end connected to another end of the input-side coil.