A divider circuit is disclosed. The divider circuit includes a pair of differential latch circuits. The divider circuit receives complementary
clock signals as a pair of differential signals. The divider circuit generates frequency divided signals based on the complementary
clock signals, inverted versions of the complementary
clock signals, and input signals. The frequency divided signals may be substantially
ripple-free. Further, the frequency divided signals remain substantially
ripple-free in a presence of the
skew between the complementary clock signals.