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1033 results about "Baud" patented technology

In telecommunication and electronics, baud (/bɔːd/; symbol: Bd) is a common measure of symbol rate, one of the components that determine the speed of communication over a data channel. It is the unit for symbol rate or modulation rate in symbols per second or pulses per second. It is the number of distinct symbol changes (signaling events) made to the transmission medium per second in a digitally modulated signal or a bd rate line code.

Density detection using real time discrete photon counting for fast moving targets

A system for detecting and graphically displaying a contents of a fast-moving target object comprises: a radiation source, having a position such that at least a portion of radiation emitted from the radiation source passes through the fast-moving target object, the fast-moving target object having a variable velocity and acceleration while maintaining a substantially constant distance from the radiation source and being selected from the group consisting of: a vehicle, a cargo container and a railroad car; a velocity measuring device configured to measure the variable velocity of the fast-moving target object; a detector array comprising a plurality of photon detectors, having a position such that at least some of the at least a portion of the radiation passing through the target object is received thereby, the detector array having a variable count time according to the variable velocity and a grid unit size; a counter circuit coupled to the detector array for discretely counting a number of photons entering individual photon detectors, the counter circuit measuring a count rate according to a contents within the fast-moving target object; a high baud-rate interface coupled to the counter circuit for sending count information from the counter circuit at a rate fast enough to support real-time data transfer therethrough; and a processor coupled to the velocity measuring device and to the high-baud-rate interface, receiving count information from the high baud-rate interface and generating distortion-free image data in real time as a function of the count information and the variable velocity. A method for using the system is also disclosed.
Owner:LEIDOS

Frame structure for an adaptive modulation wireless communication system

A method of assigning downlink time slots to receive units where the units may generate data using different modulation schemes. The method preferably assigns the downlink time slots as a function of the complexity of modulation schemes employed by the units. Further, the method preferably assigns the time slots from the least complex modulation scheme to the most complex scheme. The method may further assign uplink time slots to transmit units where the transmit units may generate data using different modulation schemes. The method preferably assigns the uplink time slots as a function of the complexity of modulation schemes employed by the uplink units. Further, the method preferably assigns the uplink time slots from the least complex modulation scheme to the most complex scheme. In other embodiments, the downlink time slots are assigned as a function of the bit per symbol rate employed by the receive units, preferably from the lowest bit per symbol rate to the highest bit per symbol rate. Further, the uplink time slots are assigned as a function of the bit per symbol rate employed by the transmit units, preferably from the lowest bit per symbol rate to the highest bit per symbol rate. The present invention is also a method of simplifying the encoding of a predetermined number of bits of data into frames. The method adds error coding bits so that a ratio of the frame length times the baud rate of the frame times the bit packing ratio of the data divided the total bits of data is always an integer. The method may also convolutionally encode the bits of data so that the same equation is also always an integer. The present invention is also a method of updating the weights of a FIR filter where the filter processes symbols having variable modulation rates. When the modulation rate of the incoming symbols changes, the weights corresponding to the first symbol having the new modulation rate are changed based as the symbol propagates through the filter.
Owner:WI LAN INC

Modular electronic sign and method of assigning a unique identifier to common modules of said sign

InactiveUS7495576B2Frees up more time for actual showingMinimally activeRoad vehicles traffic controlElectric/electromagnetic visible signallingData connectionMicrocontroller
A plurality of common, modular panels attach to a support frame carrying power and data connections for an electronic display sign. LEDs are used as the light mechanisms for illumination of said sign. Each modular panel is under separate microcontroller control and includes its own on-board memory. The electronic display sign includes a master control element that connects to a PC or laptop computer for loading data or programs into the memory of each modular board. The master control sends out commands or data that is interrogated by every microcontroller on each modular panel of the entire sign such that only the panel with a unique identification number will process data intended therefore. The on-board memory allows for the creation of a virtual screen such that each modular panel of the entire sign is rendering the entire message being displayed on said sign even though each modular panel may only be actually illuminating a portion of said message on the LEDs of each panel. A novel auto-baud scheme re-sets the baud rate for the sign for each packet of data received. A novel identifier assignment scheme allows the end user to assign serial numbers to each panel after the sign is attached to the support frame.
Owner:MASKENY DONALD D +1

Canceller circuit and controlling method

Disclosed is a device in which overasampling is not needed and in which the echo / crosstalk of a continuous time analog waveform may be canceled at a baud rate. There are provided a continuous time analog subtractor, an AD converter for converting an analog signal from a subtractor to a digital signal, an adaptive filter receiving a digital output signal from the AD converter and an echo / crosstalk reference signal and having adaptively variable filter coefficients, a FIFO in which a digital output signal from the FIFO is written in first-in first-out and in which a write and read clocks are interchanged, a D / A converter for converting the digital output signal from the FIFO to an analog signal to output the analog signal, and first and second variable delay circuits for variably delaying an input clock signal to output the delayed signals as first and second clock signals. The first clock signal is supplied to the AD converter, adaptive filter and to the FIFO, while the second clock signal is supplied to the FIFO and to the DA converter as sampling clock. A received signal, containing the echo-crosstalk, and a replica signal of the echo-crosstalk, output from the D / A converter, is supplied to the subtractor. A true received signal, which is the received signal from which the echo / crosstalk has been cancelled, is supplied to the AD converter.
Owner:RENESAS ELECTRONICS CORP

Baud rate fast self-adaptive method based on field programmable gate array (FPGA), processor and receiving end

InactiveCN103036823AAchieve adaptiveApplicable to occasions where data transmission requires encryptionBaseband system detailsComputer moduleSelf adaptive
The invention discloses a baud rate fast self-adaptive method based on a field programmable gate array (FPGA), a processor and a receiving end. The method comprises the following steps: an falling edge of a bus enables a spurious triggered detection circuit to be started, the falling edge is judged whether to be a start bit of a pre-set start frame of sending and receiving double-parties, and if the falling edge is judged to be the start bit, a counter is controlled to continue counting; a rising edge of the bus enables a spurious triggered detection circuit to be started again, the rising edge is judged whether to be a data bit, and if the rising edge is judged to be the data bit, the control counter is controlled to stop counting; and when the control counter stops counting, an actual baud rate of a current data frame is calculated according to a counting result of the counter and a frequency of a high precision clock, the baud rate is written into a data sending and receiving module, the data sending and receiving module is enabled to communicate according to the baud rate, and a baud rate fast self-adaptive process is completed. According to the baud rate fast self-adaptive method based on the FPGA, the self-adaption of any baud rate can be achieved, and a baud rate detection error caused by peaks or burrs on the bus is effectively removed by the use of the spurious triggering detection circuit.
Owner:CSIC WUHAN LINCOM ELECTRONICS

Method for analyzing and triggering controller area network (CAN) bus

The invention discloses a method for analyzing and triggering a controller area network (CAN) bus, which can provide a triggering and decoding function of a CAN bus for a measuring instrument. The method comprises the following steps of: converting a CAN bus signal to be measured into a digital signal through an analog-to-digital converter; generating, by a sampling clock generator, sampling clock of corresponding frequency to a snapshot module to snapshot the digital signal according to baud rate set by a user; converting, by a digital comparator, into 0/1 value and then transmitting to a decoding module to extract frame information; transmitting to a comparative trigger module to compare with a trigger condition set by the user; and if the trigger condition is met, generating a trigger signal to an acquisition control module to control acquisition and storage of the signal after snapshot. The frame information output by the decoding module can be transmitted to a subsequent processing module together with acquired and stored waveform information so as to be used for further analysis processing. By adopting the method, the acquisition of an interesting CAN bus event of the measuring instrument is facilitated, interruption of the CAN bus information of the user is facilitated, and debugging efficiency of the CAN bus is increased.
Owner:SOUTHEAST UNIV

Personal information device and method for downloading reprogramming data from a computer to the personal information device via the PCMCIA port or through a docking station with baud rate conversion means

InactiveUS6202209B1Easily and safely receiveEasily reprogrammedEnergy efficient ICTError detection/correctionDocking stationInformation device
A personal information device is provided in the form of a PCMCIA card and includes a PCMCIA I / O port that is adapted to be coupled to a PCMCIA port of a computer, a first memory that is directly accessible by the computer via the PCMCIA I / O port, second and third memories that are not directly accessible to the computer, and a controller. When the personal information device is inserted into the computer's PCMCIA port, the first memory directly receives and stores therein reprogramming data supplied by the computer. Immediately after the data is downloaded, or alternatively, upon disconnection of the personal information device from the computer, the personal information device's controller transfers to the second memory reprogramming code included in the reprogramming data stored in the first memory, executes the reprogramming code stored in the second memory, and then programs the third memory by utilizing the application code included in the reprogramming data stored in the first memory in accordance with the reprogramming code being executed. The downloaded application code may include organizer application code for the end user, diagnostic code or other types of code. In addition to being able to interface with a computer via the computer's PCMCIA port, the personal information device may communicate with a computer by using a docking station that includes therein a controller and that is capable of changing the baud rate of data serially supplied thereto so as to allow a computer and a personal information device communicating at different baud rates to serially communicate with one another.
Owner:MICRON TECH INC +2

Frequency synchronizer

A frequency synchronizer system is based on the maximum likelihood criterion from estimation theory and that can achieve both frequency acquisition and frequency tracking without requiring knowledge at the receiver of the carrier's phase angle, baud timing, or a preamble consisting of known signal symbols. The synchronizer includes a processor for executing the following sequence of operations: a) initializing an estimated frequency correction factor; b) determining a corrected frequency offset value from a first product of a sample signal and the estimated frequency correction factor; c) filtering a first sample of the corrected frequency offset value to obtain a filtered corrected frequency offset value; d) imparting a delay to a second sample of the corrected frequency offset value to obtain a delayed corrected frequency offset value; e) determining a conjugate product value from a second product of the filtered corrected frequency offset value and a conjugate of the filtered corrected frequency offset value; f) determining a delay conjugate value from a third product of the delayed corrected frequency offset value and the conjugate product value; g) determining an error signal from the delay conjugate value; h) determining a frequency offset value from the error signal; and i) determining an updated value of the estimated frequency correction factor from the frequency offset value.
Owner:THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY
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