174 results about "Digital front end" patented technology

The method and system for printer color calibration use a combination of a full-width array (FWA) or similar page-scanning mechanism in conjunction with an spectrophotometer color measurement system in the output path of a color printer for measuring colors (e.g., on printed test sheets, banner/separation pages, etc.) with or without requiring any manual operations or operator involvement. The automatic color balance control system produces spatial tonal reproduction values for all four of the primary colors by printing patches, measuring colors using the sensor combination and automatically readjusting the spatial tone reproduction curves until a satisfactory level of printed color accuracy and uniformity are obtained. While producing color balanced TRCs, the system will automatically lock the printer output to some predetermined color patch targets. In one particular preferred embodiment, this output is locked to neutral gray when target colors are set to neutral gray inside the digital front end (DFE). After converging to the targets, the control system returns full TRCs for use inside the normal print path.

A cost-efficient digital CATV network to improve signal quality, provide reliability, and offer the ability to meet demands for interactive services is described. Analog or digital video downstream channels are converted to a digital format by a digital headend transmitter. Relatively costly error-encoding for digital video channels is also part of the digital headend transmitter. Downstream analog and digital video channels in the digital format are transmitted using time-division multiplex technology from a headend to nodes using standard network protocols, such as SONET. Standard network protocols provide error-monitoring and status indication of transmit data, thus ensuring high signal quality and reliability. Time-division multiplexing facilitates easy adding or dropping of information to a transmit path. Flexibility to add or drop information is critical in providing interactive services. Data from interactive services can be added or dropped at points of presence throughout the digital CATV network. Subscribers to the digital CATV network can communicate with each other. A digital node transmitter receives the analog or digital video channels in digital format and converts the analog or digital video channels into an analog format. The digital node transmitter also frequency-division multiplexes multiple analog or digital video channels into one analog broadband signal for broadcast to subscribers' homes.

A system is provided to automatically estimate performance of a receiver for receiving input signals, the input signals having a carrier frequency and a baud rate, from a channel in a communication system and the effect of highly correlated noise cancellation on performance of the receiver, while no active transmission is occurring on the channel, comprising: a digital front end in the receiver for receiving samples of the input signals; a predictor coupled to the digital front end for predicting highly correlated noise in a second sample of the input signal; and a subtraction unit coupled to the predictor for subtracting the predictor output from the second sample to determine residual noise in the second sample. Other systems and methods are disclosed.

The present invention relates to the expedient supply of differential gloss text into a document image, particularly as when desired in the employ of rendering variable data. A font character is selected and sub-sampled. The sub-sampled result is then scaled up into a full size result. A first halftone cell having a first anisotropic structure orientation is selected and applied to the full size scaled font result while a second halftone cell having a second anisotropic structure orientation is applied to the surrounding background around the full size scaled font result to create a gloss font character. This full gloss font character is then stored as a font representation as callable by the digital front end of a printing apparatus.

A digital front end transceiver system (300) for a software radio system comprising: a transmitter module (310) adapted to digitally interpolate, up-convert and combine baseband digital in-phase (I) and quadrature (Q) channels to form a digital intermediate frequency (IF) IQ signal for conversion to an analogue IF IQ signal for transmission; and a receiver module (320) adapted to separate, down-convert and decimate a received digital IF IQ signal into baseband digital I and Q channels. The transmitter and receiver modules use a common fixed sampling and IF conversion rate f_s, where f_s is a quadruple of the bandwidth of the baseband signal, such that the system can be applied in a software radio system for a wireless communication application having any baseband bandwidth by selecting the fixed sampling rate based on the baseband bandwidth.

A method for creating a pattern color space for use during print job processing may include: a) defining a variable portion of the pattern color space, b) defining a fixed portion of the pattern color space, c) defining a bounding shape for the pattern color space, d) defining a procedure for painting the variable and fixed portions within the bounding shape, and e) at least temporarily, saving the pattern color space to a storage device. The variable portion of the pattern color space may be based on variable data associated with the print job and an object within the print job may identify the pattern color space for a color parameter. A system using this method may include a storage device, a digital front end, a print controller, and a print engine. Various methods for using the pattern color space during print job processing are also provided.

This invention discloses a programmable interpolation filter device and its implementation method, the said device including: an input data generation module, a coefficient generation module, a calculation module and an output module; the said input data module is used to store the input sample data in the data RAM, and provide to the calculation module to process; the said coefficient module is used to address, and generate the coefficient to the said calculation module; the said calculation module is used to complete the multiply-add operation of the interpolation filter; the said output module is used to extract the interpolation data according to the set extraction multiple, and generate the required sampling rate output data. As the device and its implementation method of the invention, since it is based on the RAM design, and using the pipeline and TDM technologies, significant saving hardware resources, when applied to the digital front-end system of the communication system, it can improve the system performance and design flexibility.

The embodiment of the invention provides a digital front end, a base band main processing unit and a channel function dividing method, wherein the digital front end comprises a control module used for obtaining control information sent by the base band main processing unit; a processing module used for carrying out processing on a cell-level processing flow of a channel according to the control information, generating processed data and sending the processed data to the base band main processing unit through an exchange network. The cell-level processing flow comprises a processing flow of signals independent of a cell processing load change. By adopting the scheme provided by the invention, dynamic exchange of internal data of a base band pool is realized, and the overall power consumption of the base band pool is reduced by means of a UE level processing load dynamic migration manner.

A transmission node includes a digital front-end device that provides functional clocks for JESD204B based data transmission. The front-end device includes a PLL for generating a phase locked clock based on a device clock of the front-end device, a clock dividing unit for generating the functional clocks by dividing the phase locked clock, a clock gating unit connected between the PLL and the clock dividing unit, and a system reference signal sampling unit for timing radio frame boundaries. The clock gating unit gates the phase locked clock to align the functional clocks with the device clock within a predetermined number of cycles of the phase locked clock, upon locking of the PLL or receipt of a system resynchronization request. The system reference signal sampling unit samples the system reference signal with zero-cycle latency between device clock and phase locked clock.

A WLAN transmitter capable of transmitting data signals modulated in accordance with an individual one of at least two different modulation schemes and corresponding methods and integrated circuit chips are provided. The WLAN transmitter contains a front end section having a low-IF topology and including a digital front end unit and an analog front end unit. The digital front end unit contains a first signal processing branch for processing transmission data signals modulated in accordance with a first one of said at least two different modulation schemes. The digital front end unit further contains a second signal processing branch for processing transmission data signals modulated in accordance with a second one of said at least two different modulation schemes. The analog front end unit contains one single signal processing branch for processing transmission data signals modulated in accordance with any one of said at least two different modulation schemes.

A color image control system and method are provided for improving the image control of printing systems, including digital front-end processors, color printers and post-finishing system. This automatic image control system, including measurement and calibration, by registering the captured reproduced document with the extracted virtual device document and automatically locating a plurality of regions in which to measure captured color values, using colorimetric measurements of an aim reproduction of the document at these same region positions, and finally relating the captured color values, the colorimetric color values, and the virtual device color values to create the an accurate color mapping. One embodiment of this method combines a global regression polynomial with local mapping refinement.

The invention discloses a method for processing a broadband receiving digital front end, which comprises the following steps that: 1, received radio frequency signals are divided into n paths of signals, and each path of the signals is subjected to frequency mixing respectively, and the difference of the frequencies of the frequency mixing among the paths is 80 MHz, then the paths of signals are processed respectively and are transmitted to an AD (Analogue-Digital Converter) for sampling with the sampling frequency of F1, and digital medium frequency signals with the centre frequency of F2 and the bandwidth of 80MHz are generated by each path, and are transmitted to a FPGA (Field Programmable Gata Array) for processing; 2: a corresponding AD is selected to input signals according to a current signal frequency code of the system, a DDS (Digital Display Scope) is controlled to generate orthogonal digital local oscillation consistent with a signal frequency spectrum sampled by the AD, the signals input by the AD are multiplied by the orthogonal digital local oscillation generated by the DDS respectively and the frequency spectrum is shifted to a zero intermediate frequency to carry out orthogonal decomposition to acquire an I path of baseband signals and a Q path of baseband signals which are orthogonal to each other; and 3: the velocity of a signal data stream acquired after theshift of the frequency spectrum is F1, the signals are subjected to extraction filtering for M times by using a CIC extraction filter to acquire an I baseband signal and a Q baseband signal with the velocity of F1/M, and the baseband signals are subjected to complementary filtering respectively by using an FIR low-pass filter.

Automatically determining the cost to complete a printed job on a digital printing press. A Job Control Component in the Digital Front End of the printing press collects and stores the processing information from the job processing components after each has completed its step in the sequence of steps required to complete the printed job. A Job Reporting Component displays the stored processing information and, when the press owner has stored the predetermined cost of each processing step, automatically computes and displays the cost of the job.

The invention discloses a wireless aviation burst communication system, which comprises a burst frame construction module, a receiving digital front-end processing module, a burst detector, a carrier and phase parameter extraction and recovery module, and a timing parameter extraction and recovery module, wherein the burst frame construction module is used for constructing a burst frame, and the burst frame is composed of an AGC training sequence, two identical repeated CAZAC training sequences, and a data block; the receiving digital front-end processing module is used for acquiring an initial demodulation signal with frequency offset, phase offset and timing errors; the burst detector is used for adopting the repeated CAZAC training sequences for carrying out matched filter on the initial demodulation signal, acquiring a burst sign and outputting two related peak values and related peak sidelobe values; the carrier and phase parameter extraction and recovery module is used for estimating carrier and phase parameters and completing recovery; and the timing parameter extraction and recovery module completes timing recovery. The burst frame detection probability can be effectively improved, and complexity of burst communication carrier, phase and timing recovery is reduced.

The invention relates to the field of electric power telecommunication used for supporting smart power grids, in particular to a digital front end system used for power line carrier communication and an implementation method of the digital front end system. The digital front end system comprises a transmitter and a receiver, wherein the transmitter and the receiver carry out communication in sequence. The transmitter comprises an inversion Fourier transformation module, a windowing module I, an interpolation filter, a frequency mixer I and a digital-analog converter, wherein the inversion Fourier transformation module, the windowing module I, the interpolation filter, the frequency mixer I and the digital-analog converter carry out communication in sequence. The receiver comprises an analog-digital converter, a frequency mixer II, an interpolation filter, a windowing module II and a Fourier transformation module, wherein the analog-digital converter, the frequency mixer II, the interpolation filter, the windowing module II and the Fourier transformation module carry out communication in sequence. The implementation method of the digital front end system comprises the following steps: 1, a modulation symbol is input to the transmitter and converted into an analog signal; 2, the analog signal is input to the receiver and converted into the modulation symbol. The digital front end system used for the power line carrier communication and the implementation method of the digital front end system combine a digital front end in the form of an equivalent complex number base band with a Nyquist windowing method, and have the advantages of supporting frequency band selection and bandwidth configuration, suppressing out-of-band interference, reducing sending signal out-of-band energy, and suppressing in-band narrow-band interference.

Multi-phase clocks are used to encode and decode signals that are phase- modulated. The input signal is phase-compared with a feedback clock. Phase differences increment or decrement an up/down counter. The count value from the up/down counter is applied to a phase rotator, which selects one clock phase from a bank of multi-phase clocks. The multi-phase clocks have the same frequency, but are offset in phase from each other. An output divider divides the selected multi-phase clock to generate a phase-modulated output. A feedback divider divides a fixed- phase clock from the multi-phase clocks to generate the feedback clock. An analog or a digital front-end may be used to convert analog inputs to digital signals to increment or decrement the counter, or to encode multiple digital bits as phase assignments. For a de-modulator, a digital-to-analog converter (DAC) or a digital decoder produces the final output from the count of the up/down counter.

The invention discloses a low-complexity bandwidth signal digital frequency selection method for a communication system. In signal processing, a parallel filter structure is adopted instead of a conventional low-pass filter structure so as to reduce a logic processing complexity in hardware realization; and a frequency selection operation on a quadrature channel is saved by utilizing Hilbert transform to halve parallel processing channels, so signal processing complexity is reduced. By the method, the frequency selection operation can be effectively finished, the frequency selection of any carrier number and/or any bandwidth is supported, and the engineering realization complexity is greatly reduced. The method provided by the invention is widely applicable to a plurality of communicationsystems such as global systems for mobile communication (GSM), time division-synchronization code division multiple access (TD-SCDMA) communication systems, wideband code division multiple access (WCDMA) communication systems, code division multiple access 2000 (CDMA2000) communication systems, long term evolution communication systems and the like to form digital front-ends of communication equipment of different standards, such as repeaters, base stations and the like. Generally, the method is vast in popularization and application prospect.

The invention discloses a high dynamic weak DS/FH (Direct Sequence/ Frequency Hopping) hybrid spread spectrum signal acquisition system, and aims to provide an acquisition system which consumes less resources, has a simple structure, and is capable of reducing hardware resources. The acquisition system is realized through the implementation scheme that in an acquisition subsystem, a digital front-end unit inputs a zero intermediate frequency signal from a radio frequency subsystem into a Doppler slotting unit to be subject to Doppler precompensation; a time unit (8) drives a spreading and hopping pseudo-code generator (9) to input a spreading and hopping pseudo code into a composite code generating unit (10) to produce a composite code; a control unit (11) stores the signal, subjected to Doppler precompensation, from the Doppler slotting unit, and the composite code to a storage unit (5); the control unit (11) drives a parallel related unit (6) to fetch related data from the storage unit to perform parallel correlation calculation; a judgment unit (7) carries out the maximum comparison on the result of parallel correlation calculation, and feeds back the obtained correct code phase to the time unit (8) to drive the spreading and hopping pseudo-code generator (9) to produce the correct-phase DS pseudo code and FH pseudo code.

Automatically determining the cost of a printed job on a digital printing press before the job is run. A job control component in the digital front end of the printing press collects and stores the processing information from the job processing components from prior runs. A job-reporting component displays the stored and estimated processing information and automatically computes and displays the estimated cost of the job. The method includes determining a future toner cost using a toner cost, a future press usage cost, and a substrate cost based on historical toner consumption and then rasterizing the job to determine the total job cost.

A satellite navigation receiver having a digital front end. The satellite navigation receiver includes an analog section for receiving, amplifying, and filtering a satellite navigation signal. The digital front end is coupled to the analog section and is used to perform digital signal processing on the satellite navigation signal before it is passed on to the acquisition and tracking engines. By off-loading some of the functionality from the analog section to the digital front end, the analog section may be made smaller and cheaper and may consume less power. Moreover, additional functionalities can be added to the digital front end to improve performance. Since the digital front end is comprised of digital circuitry, it scales down in size, cost, and power with advances in semiconductor fabrication techniques.