8results about How to "Reduce implementation complexity" patented technology

This invention discloses a point cloud data correction method and related lidar, apparatus, program, and equipment. The method includes: determining the corrected field-of-view position information based on a pre-constructed temperature-distortion model, temperature data from the lidar receiving lens, and the field-of-view position information corresponding to the original measured point cloud data; and reconstructing three-dimensional point cloud data based on the corrected field-of-view position information and the point cloud data. This method enables real-time dynamic correction of the angle value of each laser ranging point during the online operation of the lidar. It eliminates nonlinear angle measurement errors introduced by temperature changes, especially the amplification of light rays at the edge of the field of view due to thermal expansion and contraction at large field-of-view angles, from the data source. It effectively suppresses the bending, twisting, or drifting of straight objects in the point cloud image at the edge of the field of view, thereby improving the point cloud output accuracy and coordinate reliability of the wide-angle blind-spot lidar under all temperature conditions.

The application discloses a kind of high-frequency frequency domain characteristics and time-domain waveform high-precision prediction method and system of electromagnetic equipment system, including steps: (1) cable, electromagnetic equipment winding is divided into cascaded multi-conductor minimum unit;(2) establish cable, electromagnetic equipment winding high-precision multi-conductor minimum circuit unit model;(3) finite element simulation calculation parasitic parameter, setting minimum circuit unit model parameter;(4) the transmission matrix calculation of minimum circuit unit, cable, electromagnetic equipment winding system;(5) according to the connection form of electromagnetic equipment winding end and high-frequency characteristic measurement, calculate high-frequency frequency domain characteristics;(6) the spectrum analysis of inverter output PWM voltage, predict high-frequency time-domain waveform.The application can quickly and accurately predict the high-frequency frequency domain and time-domain characteristics of electromagnetic equipment system at the design stage or online operation, which is of great significance for improving the reliability of electromagnetic equipment system driven by power electronic converter.

The application discloses an implementation method for reducing the density of a QC-LDPC code generation matrix, and comprises QC_LDPC code check matrix full rank condition generation matrix solving, QC-LDPC code check matrix non-full rank condition generation matrix solving and density optimization, and a QC_LDPC code encoding process. The application solves the problem of high density of the existing QC-LDPC code generation matrix and existence of optimization space.

This application relates to the field of compilers, and in particular to a method for dynamically allocating caller-saved register storage space. Applied to the register allocation stage, it includes the following steps: obtaining the set of caller-saved registers that need to be saved at the current call point; obtaining the required storage space size N for the current call point based on the set of caller-saved registers; allocating a contiguous storage space of size N for this call by adjusting the stack pointer before generating the save instruction; writing the values ​​of the caller-saved registers that need to be saved at the current call point into the contiguous storage space of size N; executing the function call instruction; after the function call returns, restoring the values ​​of each caller-saved register written in the contiguous storage space of size N to the corresponding caller-saved register; and restoring the stack pointer to release the contiguous storage space of size N. This invention can solve the problems of stack space waste, high complexity, and susceptibility to errors.

This invention relates to a method and system for defending against backdoor attacks in federated learning, belonging to the field of information security. The method first performs data preprocessing operations on the terminal before executing local training, converting the data from the time domain to the frequency domain and designing a low-pass filter to filter high-frequency signals introduced by backdoor samples. Second, malicious uploads and updates are detected on the server side, the cosine similarity between the pre-global model and the local model is calculated, and an appropriate threshold is set to filter maliciously uploaded local model updates. Finally, a global aggregation operation is performed on the remaining non-malicious uploads and updates to obtain an updated global model, and differential privacy technology is used to perturb the obtained global model. This invention fully considers the scenario where backdoor attacks occur in different locations, mitigating backdoor attacks in federated learning without affecting the model's performance on benign data, thus solving the problem of backdoor attack defense in federated learning.

This invention discloses a method and system for processing transmit and receive data in an MSK spread spectrum system. The spread spectrum sequence d is obtained through a spread spectrum module. n The modulation sequence b is obtained through the BPSK modulation module. n The MSK modulated signal I-channel SigI is obtained through the MSK modulation module. n and Q road SigQ n The MSK signal demodulation module is used to obtain the demodulated D signal. k The despreading module is used to obtain the despreading soft information Ds. m The method and system described above further simplify the MSK spread spectrum system by obtaining the received information bits through the BPSK demodulation module. While ensuring the performance of the MSK spread spectrum system, the implementation complexity of the MSK spread spectrum system transceiver end is reduced by the phase interleaving change law of the IQ path.

This invention relates to the field of motor control technology, specifically to a method and system for mitigating open-circuit faults in a three-phase induction motor. The method includes: obtaining a speed setpoint and the actual speed to form a speed deviation; inputting the speed deviation into a composite speed controller in a closed-loop V / f control structure to generate a frequency adjustment quantity; determining a target frequency command based on the frequency adjustment quantity and pole number conversion relationship, and generating a stator voltage amplitude command under a constant V / f ratio; obtaining the synchronous electrical angle through integration and generating a modulation signal; performing pulse width modulation based on the modulation signal to drive the three-phase inverter to output three-phase drive voltage; and when a stator phase open circuit causes a double-frequency disturbance in the dq coordinate system, using a resonant adjustment branch for tracking compensation to reduce speed fluctuations and electromagnetic torque pulsation, maintaining continuous motor rotation. This invention solves the problem of high control system complexity in existing induction motors due to reliance on independent fault detection and complex fault-tolerant switching mechanisms.

The invention discloses a fault self-healing reconnection method based on SRIO communication between an FPGA and a DSP, and belongs to the technical field of high-speed serial communication and embedded system reliability. And starting a link monitoring module at the FPGA end, and carrying out joint monitoring on the port initialization state, the link initialization state, the port error state and the initialization timeout condition of the SRIO link. When it is detected that the link is interrupted or has an error or the DSP initialization completion mark is not received within the preset time, the FPGA generates a reset trigger signal and sends the reset trigger signal to the DSP, and the DSP is triggered to execute SRIO initialization again. And after the DSP finishes initialization, resetting the SRIO modules at the FPGA end through a conventional interface, so that the SRIO modules at the two ends recover a consistent initialization state, and automatic reconstruction of a link is realized. According to the invention, double-end cooperative reset is realized only through the existing interface, the problems of single-end reset and false normal of a link are effectively solved, and the circuit has the advantages of simple structure and high reliability.