The invention discloses a noise adding signal synchronization clock extraction device based on an FPGA (field programmable gate array), belonging to the field of communication control. The noise adding signal synchronization clock extraction device comprises an AD (analog-digital) sampling circuit, a data acquisition module, an FIR (finite impulse response) low-pass filter module, a level judgment module, an edge detection module, a common-frequency clock generation module and a phase adjusting module, wherein the data acquisition module, the FIR (finite impulse response) low-pass filter module, the level judgment module, the edge detection module, the common-frequency clock generation module and the phase adjusting module are realized in the FPGA. According to the noise adding signal synchronization clock extraction device based on the FPGA, both data acquisition and data processing are realized by hardware, and the advantage of hardware acceleration is brought into full play; and on an FPGA platform, a verilog language is used for programming, a system is modularized, a 150-order FIR low-pass filter is designed, the rising and falling edges of a filtered signal are detected, a cycle of a synchronized signal is obtained, then the synchronized signal is extracted by a synchronizing phase, and the advantages of good noise resistance, high speed and high precision of the system are achieved.