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1 results about "SystemC" patented technology

SystemC is a set of C++ classes and macros which provide an event-driven simulation interface (see also discrete event simulation). These facilities enable a designer to simulate concurrent processes, each described using plain C++ syntax. SystemC processes can communicate in a simulated real-time environment, using signals of all the datatypes offered by C++, some additional ones offered by the SystemC library, as well as user defined. In certain respects, SystemC deliberately mimics the hardware description languages VHDL and Verilog, but is more aptly described as a system-level modeling language.

Design method of deep learning accelerator vector processing unit based on SystemC

PendingCN122088401ACAD circuit designArchitecture with single central processing unitSystemCBurst transmission
The invention belongs to the technical field of deep learning accelerators, and particularly relates to a design method of a deep learning accelerator vector processing unit based on SystemC. Comprising the following steps: constructing a uniform vector processing unit by using a SystemC transaction-level model to replace pooling and normalization modules accelerated by a traditional deep learning algorithm; the interior of the vector processing unit comprises a reconfigurable dynamic configuration so as to realize various data processing modes of a pooling operator, a normalization operator, a pixel summation operator and an up-sampling operator; the enhanced multi-dimensional DMA engine is used for carrying out directional data slicing and moving on the input three-dimensional data cube in different dimensions according to the configuration parameters; according to the method, the problems of hardware islands, low resource utilization rate, inflexible data transfer and the like existing in the original discrete design are solved, and the universality, the energy efficiency ratio and the execution efficiency of the accelerator are remarkably improved.
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