Multi-core processor satisfying SystemC syntax

A multi-core processor, processor core technology, applied in the architecture with multiple processing units, electrical digital data processing, special data processing applications, etc.

Active Publication Date: 2010-01-27
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] In order to overcome the defects of existing multi-core processors that are difficult to debug and do not supp...

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  • Multi-core processor satisfying SystemC syntax
  • Multi-core processor satisfying SystemC syntax
  • Multi-core processor satisfying SystemC syntax

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Embodiment Construction

[0054] A multi-core processor meeting the syntax requirements of SystemC provided by the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0055] Multi-core processors optimized for SystemC hope to adopt SystemC as a multi-core software development language. SystemC is an extended library of C++. In 1999, companies such as Cadence, Synopsys, and ARM in the EDA industry jointly organized the development of a C++-based EDA language, thus giving birth to SystemC. In 2006, SystemC officially became the IEEE standard, becoming the third natural language after VHDL and Verilog supported by all EDA software.

[0056] SystemC can provide higher design efficiency and a more effective design process, which can help solve the explosive complexity, market pressure, cost rise and other problems faced by the integrated circuit industry.

[0057] The SystemC language itself is an extension of C++. Therefore, althoug...

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Abstract

The invention discloses a multi-core processor satisfying SystemC, which comprises an array formed by a plurality of exchanging units for exchanging data through connection, and a plurality of processing units connected with the exchanging units, used for processing data and comprising local resource units, wherein the processing units are connected to other processing units by an exchanging unit adapter and an exchanging unit array through the local resource units, and the local resource units comprise one or more of an event processing cell block of the SystemC, a first-in-first-out queue cell block of the SystemC and a mutual exclusion and semaphore cell block of the SystemC. Through the multi-core processor, the mapping supporting a SystemC syntax unit to resources in a chip is achieved so that the local resources can be applied to the resource sharing and the synchronization between any plurality of processing units and between the processing unites and peripherals.

Description

technical field [0001] The present invention relates to a multi-core processor, more specifically, the present invention relates to a multi-core processor meeting the syntax requirements of SystemC. Background technique [0002] In recent years, multi-core processor technology has been booming. The main reasons are as follows: first, design requirements; the cost of silicon is getting lower and lower, and the integration level is getting higher and higher, and the regular structure of multi-core can use more silicon area simply and effectively; second, business Requirements: Multimedia services are becoming more and more complex, requiring platform flexibility and processing performance to be higher and higher, while also requiring power consumption to be kept within the allowable range. Multi-core processors can potentially provide the highest performance-to-power ratio and are available for higher Performance calculation and flexibility; third, time to market (Time to mar...

Claims

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Application Information

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IPC IPC(8): G06F15/80G06F15/163G06F17/50G06F9/52
Inventor 陈曦黄毅刘祥张金龙刘玉东
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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