First-in first-out queue unit set of multi-core processor satisfying SystemC grammar

A first-in-first-out queue and unit group technology, which is applied to the architecture with multiple processing units, electrical digital data processing, special data processing applications, etc., can solve problems such as not supporting parallel languages ​​and difficulty in debugging multi-core processors

Inactive Publication Date: 2008-12-24
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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  • Abstract
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Problems solved by technology

[0008] In order to overcome the defects that existing multi-core processors are difficult to debug and do not support parallel languages, the present invention proposes a first-in-first-out queue unit group of multi-core processors that meets SystemC syntax requirements

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  • First-in first-out queue unit set of multi-core processor satisfying SystemC grammar
  • First-in first-out queue unit set of multi-core processor satisfying SystemC grammar
  • First-in first-out queue unit set of multi-core processor satisfying SystemC grammar

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Embodiment Construction

[0052] A multi-core processor meeting the syntax requirements of SystemC provided by the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0053] Multi-core processors optimized for SystemC hope to adopt SystemC as a multi-core software development language. SystemC is an extended library of C++. In 1999, companies such as Cadence, Synopsys, and ARM in the EDA industry jointly organized the development of a C++-based EDA language, thus giving birth to SystemC. In 2006, SystemC officially became the IEEE standard, becoming the third natural language after VHDL and Verilog supported by all EDA software.

[0054] SystemC can provide higher design efficiency and a more effective design process, which can help solve the explosive complexity, market pressure, cost rise and other problems faced by the integrated circuit industry.

[0055] The SystemC language itself is an extension of C++. Therefore, althoug...

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Abstract

The invention provides a first-in-first-out cohort group which can meet systemC gramma. The cohort group comprises a plurality of first-in-first-out cohort units. The first-in-first-out cohort units output data, write an event signal and data and read the event signal for a corresponding event handling unit group, and comprise a logic circuit which is realized according to the function code of sc_fifo (name, size), sc_fifo(size), sc_fifo.read(), sc_fifo.nb_read(), sc_fifo.write(), sc_fifo.nb_write(), sc_fifo.num_available() and sc_fifo.num_free() of the systemC grammar. The logistic circuit allows the mapping algorithm of a software development tool to reset a plurality of first-in-first-out cohort units in different processing units, so as to jointly complete the function defined by sc_fifo grammar unit. The first-in-first-out cohort group supports the mapping from sc_fifo, a SystemC grammar unit, to chip internal resource, and allows the first-in-first-out cohort to be used for the resource sharing and synchronization among a plutlity of processing units, and between the processing unit and peripherals.

Description

technical field [0001] The invention relates to a multi-core processor, more specifically, the invention relates to a first-in-first-out queue unit group of the multi-core processor meeting the syntax requirements of SystemC. Background technique [0002] In recent years, multi-core processor technology has been booming. The main reasons are as follows: first, design requirements; the cost of silicon is getting lower and lower, and the integration level is getting higher and higher, and the regular structure of multi-core can use more silicon area simply and effectively; second, business Requirements: Multimedia services are becoming more and more complex, requiring platform flexibility and processing performance to be higher and higher, while also requiring power consumption to be kept within the allowable range. Multi-core processors can potentially provide the highest performance-to-power ratio and are available for higher Performance calculation and flexibility; third, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50G06F15/80G06F15/163
Inventor 陈曦黄毅刘祥张金龙任菲
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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