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Data type conversion-based hardware simulator validation data extraction system

A hardware emulation, data type technology, applied in the detection of faulty computer hardware, faulty hardware testing methods, etc., can solve the problems of the progress of hardware emulator verification, the low efficiency of data extraction, and the impact of verification efficiency, etc. Simple, versatile, and fast

Active Publication Date: 2016-06-08
BEIJING MXTRONICS CORP +1
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Problems solved by technology

At this time, the design of the data extraction system connected between the two simulators has a great influence on the verification efficiency
At present, commonly used verification data extraction systems usually use software emulators or hardware emulators as their own. The execution process of this data extraction system is relatively complicated, resulting in low data extraction efficiency, and has a large impact on the progress of verification based on hardware emulators. influences

Method used

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  • Data type conversion-based hardware simulator validation data extraction system

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Embodiment

[0034] When using a hardware emulator to verify the system chip with the AMBA bus as the internal interconnection bus, it is necessary to extract the data transmitted on the AMBA bus and compare it with the result set in the software emulator. Among them, the simulation accuracy of the AMBA bus in the unit under test is cycle-accurate, and the maximum length of one transmission is 8 words. The preset results in the software simulator are written in SystemC language, and the simulation accuracy of the software simulator is transaction-level accuracy, using 32-bit The wide transaction interface communicates with the system.

[0035] When using a hardware emulator verification data extraction system based on data type conversion described in the present invention to extract verification data, the SystemVerilog unit configuration module and the SystemC unit configuration module are firstly configured. For the SystemVerilog unit configuration module, the data volume threshold for r...

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Abstract

The invention provides a data type conversion-based hardware simulator validation data extraction system. The system comprises a SystemVerilog unit and a SystemC unit, wherein the SystemVerilog is used for receiving input data sent from an external hardware simulator, checking the input data, packing the data into a data package and then sending the data package to the SystemC unit; and the SystemC unit is used for 6 data types defined in SystemVerilog into 6 data types defined in SystemVerilog according to a one-to-one corresponding manner, sending the data package to a software simulator according to the simulation precision of the software simulator, extracting the running result of a tested unit running on the hardware simulator with relatively high efficiency, and comparing the running result with a structure preset in the software simulator on a workstation so as to realize the determination of the running result of the tested unit. The method has the advantages of being flexible in data package, high in simulation speed and flexible in software simulator interface.

Description

technical field [0001] The invention relates to a hardware emulator (Emulator) verification data extraction system based on data type conversion, and belongs to the technical field of hardware acceleration simulation verification. [0002] The system extracts data from the unit under test (DUT) running in the hardware emulator, transmits it to the software simulator (Simulator) running in the workstation (Workstation), and compares it with the preset results. Background technique [0003] With the continuous development of electronic design automation technology and microelectronics manufacturing technology, the design complexity of VLSI is constantly increasing, and correspondingly, the complexity of its functional verification is also greatly increasing. Taking a System on a Chip (SoC) as an example, the functional verification process usually takes more than 70% of the entire SoC development cycle. [0004] In order to improve the efficiency of functional verification, a...

Claims

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Application Information

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IPC IPC(8): G06F11/22
CPCG06F11/2273
Inventor 周海洋朱蕴中付方发于立新
Owner BEIJING MXTRONICS CORP
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