4 results about "Software emulation" patented technology

This application relates to the technical field of voltage regulation function testing for power banks. It discloses a voltage regulation function simulation testing system and method. This application constructs a voltage regulation function simulation testing system including a simulation clock and a simulation cycle counter. At the software level, it directly simulates the passage of time and the accumulation of charge-discharge cycles during long-term battery use based on user-configured test parameters. The core algorithm layer uses simulation time and / or the number of simulated full-charge cycles to simulate the charging voltage of the power bank over time and the accumulation of charge-discharge cycles, thus completing the voltage regulation function simulation test of the power bank. This method of completing the voltage regulation function simulation test of a power bank through software simulation algorithms greatly reduces the physical testing time required without changing the physical testing environment or replacing the tested object. This significantly shortens the testing cycle while ensuring the test results accurately reflect real-world usage scenarios and have high reliability.

The application discloses a software simulation environment building method, device, medium and program product, and relates to the field of software development. The software simulation environment building method comprises the following steps: obtaining a network resource arrangement instruction; arranging target managed resources according to the network resource arrangement instruction to obtain a target environment network topology; configuring a node image file according to the target environment network topology to obtain a network topology to be instantiated; and performing code testing and verification according to target test code, the network topology to be instantiated and topology node usage state data. The technical scheme of the embodiment of the application can improve the building efficiency of a software development simulation environment and break the strong dependence of simulation environment building and instantiation on manpower.

The application relates to a spacecraft intelligent software virtual simulation test scene intelligent generation method, and belongs to the technical field of spacecraft software testing and simulation, which comprises the following steps: an IR structure with rich semantics is defined in advance; through a preset structured prompt word, a large language model LLM is called to recognize and extract task targets, entities, behaviors, environments, constraints and disturbance elements in natural language instructions; the LLM analyzes the extracted elements into nodes, node attributes and time sequence relationships, logical relationships and hierarchical relationships between the nodes in the predefined IR structure, generates a structured IR; a generated IR JSON file is loaded, and according to a preconfigured conversion rule library of the IR structure to a scene description language, the structured IR is converted into an executable simulation script; a simulation engine analyzes and executes the script, and instantiates a specific and high-fidelity test scene. The problems of low automation, high professional threshold and poor scalability in the simulation test of spacecraft intelligent software are solved.

This application relates to a software and hardware co-verification method, apparatus, electronic device, and medium for a VPU. The method includes: automatically generating multiple test cases according to preset constraints using a control script, each test case containing configuration data and video source data; inputting the test cases into a C model to generate a reference bitstream; inputting the test cases into a field-programmable gate array (FPGA) to generate a hardware bitstream; if the reference bitstream and the hardware bitstream are inconsistent, the test case is considered a failed test case; and executing the failed test case back in a software simulation environment to generate a simulation bitstream for in-depth debugging based on the simulation bitstream.