587results about "Processor architectures/configuration" patented technology

The present disclosure relates to a model deployment method and device, electronic equipment, storage medium and product. The method comprises: obtaining an image saliency segmentation model; the image saliency segmentation model is used for saliency segmentation of an input image, the image saliency segmentation model comprises a preset activation function, the output value of the preset activation function is in a preset range, the maximum value of the preset range is a first preset value; converting the model format of the image saliency segmentation model into a target model format supported by a target chip; deploying the image saliency segmentation model in the target model format on the target chip. The present disclosure can limit the size of the output value of the preset activation function, thereby improving the accuracy of the image saliency segmentation model. In addition, by converting the model format of the image saliency segmentation model into the target model format, the image saliency segmentation model can be efficiently run on the target chip, thereby improving the inference efficiency and inference performance of the image saliency segmentation model.

A training optimization system implements algorithmic solutions to solve the conjoined problem of accelerator architecture search and model partitioning for distributed training. The system makes the multi-dimensional optimization space of architecture search and device placement tractable by reducing the number of accelerator architectures explored through area-based heuristics and employing a novel integer linear program (ILP), the size of which is dependent only on the number of operators. The ILP scheduling optimization also explores the partitioning of operators across cores, known as intra-operator parallelism. Despite the vast space, the ILP described herein requires significantly less time to perform the optimizations across all explored accelerator configurations. Based on the optimal backward and forward pass latencies, the system leverages a novel dynamic programming (DP) approach to determine the device placement and model partitioning scheme.

Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a graphics operation, where the graphics operation is associated with data in a data block. The apparatus may also determine whether a value for at least some data in the data block is identical to a value for at least some other data in the data block. Further, the apparatus may refrain from executing the at least some data in the data block based on the value for the at least some data in the data block being identical to the value for the at least some other data in the data block.

A multi-die parallel processor semiconductor package includes a first base IC die including a first plurality of virtual compute dies 3D stacked on top of the first base IC die. A first subset of a parallel processing pipeline logic is positioned at the first plurality of virtual compute dies. Additionally, a second subset of the parallel processing pipeline logic is positioned at the first base IC die. The multi-die parallel processor semiconductor package also includes a second base IC die including a second plurality of virtual compute dies 3D stacked on top of the second base IC die. An active bridge chip communicably couples a first interconnect structure of the first base IC die to a first interconnect structure of the second base IC die.

The application provides a virtual reality device, a method and a storage medium, and belongs to the technical field of virtual reality. The virtual reality device provided by the application is provided with a plurality of cameras and a plurality of processing chips connected through a bus, and each processing chip is connected with part of the plurality of cameras, so that the plurality of processing chips share the virtual reality display task, the performance requirement of a single processing chip is low, and the cost can be effectively reduced.

The present application aims to automate the screening of image data. An information processing apparatus includes a conversion unit that generates a plurality of graph structures by converting a plurality of image data included in an image data set; a determination unit that determines whether the content of one image data corresponding to one of the graph structures is duplicated with the content of other image data corresponding to other graph structures by comparing the one graph structure with the other graph structures; and a deletion unit that deletes one of the one image data and the other image data from the image data set in a case where it is determined that the content of the one image data is duplicated with the content of the other image data.

Embodiments of the present disclosure relate to methods and apparatuses for determining visibility. Described herein is a method of determining visibility of predefined content in a display displaying dynamic background content. The method can comprise, after determining that the predefined content is to be overlaid on the dynamic background content for presentation in the display, obtaining at least one image representing visual information displayed on the display; and performing computer vision based processing based on the obtained at least one image to determine the visibility of the predefined content in the display.

This application provides a target tracking method and apparatus, to improve overall performance of the target tracking apparatus. The target tracking apparatus may include an image sensor, a controller, an image signal processor, and an event processor. A processing capability of the image signal processor is different from a processing capability of the event processor. The image sensor is configured to: capture a first raw (RAW) image, and send the first raw image to the controller. The controller is configured to: determine a motion distance, in two adjacent frames of raw images, of a target object in the first raw image, where the first raw image is a next frame of image of the two adjacent frames of raw images; determine a target processor from the image signal processor and the event processor based on the motion distance, where a processing capability of the target processor matches the motion distance; and perform target tracking on the target object based on the first raw image by using the target processor.

The present application belongs to the technical field of endoscope and image processing, and in particular to an endoscope image anti-shake method based on motion vector compensation, comprising the following steps: collecting a sequence of continuous video frames, performing stability screening on the initial feature point set, eliminating unstable feature points located in the edge region, high light reflection region and low contrast region of the image to form a reliable feature point set, performing robust estimation processing on the original motion vector set based on the matched feature points in the reliable feature point set to generate a stabilized output frame, wherein the remapping adopts a bilinear interpolation algorithm; by constructing a closed-loop anti-shake system taking local feature motion vectors as input, spatio-temporal domain joint filtering as core and sub-pixel remapping as output, high-precision separation and compensation of high-frequency micro-shaking in endoscope imaging are realized without introducing additional mechanical structures.

This invention belongs to the field of sensor spectral measurement technology and relates to an adaptive integration time method for CMOS linear array sensors, including: 1. signal feature extraction; 2. inter-frame variation trend prediction; 3. adaptive adjustment based on lookup table; 4. saturation protection and boundary processing. This invention constructs an automated closed-loop control system that can compensate for light intensity changes caused by factors such as light source aging, optical path loss, and power supply fluctuations in real time, ensuring that the output signal remains stable within the optimal range under various operating conditions and long-term operation, fundamentally improving the reliability and accuracy of measurement.

The present disclosure provides a graphics processing method, apparatus and system, a computing device, and a storage medium. The method is executed by a topology splitting module in a target graphics processing core, and comprises: acquiring a graphics drawing command, the graphics drawing command indicating that a graphic having a specified topology type is to be drawn; on the basis of the graphics drawing command, acquiring vertex index data required for drawing the graphic; on the basis of the specified topology type, dividing the vertex index data into primitive packets according to index order, to determine a primitive packet to be processed by the target graphics processing core, and inserting a corresponding synchronization marker; transmitting the primitive packet to be processed by the target graphics processing core and the corresponding synchronization marker to a geometry processing pipeline module in the target graphics processing core for processing, to obtain a geometry processing result having the synchronization marker, wherein the geometry processing result having the synchronization marker is processed by a pixel processing pipeline module in the target graphics processing core to obtain a visual graphic.

The application provides a verification method and related device for a graphics processor, comprising: abstracting, by an interface abstraction layer, original interface access for a target graphics processor into a function call for a virtual firmware execution module, wherein the virtual firmware execution module is a function level modeling of a control processor subsystem in the target graphics processor; the virtual firmware execution module generates a standard transaction sequence according to the function call, so that the virtual firmware execution module and / or the target image processor executes the standard transaction sequence; a consistency monitoring module obtains actual data corresponding to a plurality of checkpoints respectively, wherein the plurality of checkpoints correspond to a whole flow of the interface abstraction layer, the virtual firmware execution module and the target image processor; the consistency monitoring module compares the actual data corresponding to the plurality of checkpoints respectively with expected data corresponding to the plurality of checkpoints respectively one by one, and generates a verification report for the target graphics processor. In the verification process, no firmware instruction is relied on.

The present invention relates to an image processing device and method of a mobile device. The image processing device of a mobile device comprises: a memory storing image data; a processor for recording first image data of a linear address map method on the memory; and a converter for receiving the first image data to return second image data of a tile address map method.

Techniques for scanning physical media on physical items and providing information about those physical items are provided. In one technique, a digital image that is generated by a mobile device and that indicates a list of ingredients in an item is identified. Text that contains the list of ingredients is identified within the digital image. It is determined whether a particular ingredient in the list of ingredients satisfies one or more criteria. In response to determining that the particular ingredient satisfies the one or more criteria, the digital image is modified by causing a portion, of the text within the digital image, that corresponds to the particular ingredient, to be highlighted while the digital image is displayed on a screen of the mobile device. In a related technique, the mobile device performs all the steps, whereas in another technique, a remote server performs one or more of the steps.

The invention is entitled "Data processing system". The invention discloses a data processing system comprising a plurality of processing units which can be configured as different partitions of processing units. The system comprises a multicast communication network for routing cache communications within a partition of processing units. A cache controller of one of the processing units within the partition can be configured as a master cache controller for a set of caches within the partition. The master cache controller can operate to issue a request to all of the caches in the combination of caches simultaneously over the multicast communication network. The multicast communication network is configured to combine response signals from the different processing units within the partition to provide a combined response signal to the master cache controller representing an overall request-response state of the caches to which the request was issued.

This disclosure relates to methods and apparatus for graphics processing. Aspects of this disclosure can define a portion of a display area, wherein this portion of the display area is determined based on the display content of the display area. Furthermore, aspects of this disclosure can communicate display information corresponding to the defined portion of the display area. Additionally, aspects of this disclosure can update the display information corresponding to the defined portion of the display area. Aspects of this disclosure can also communicate updated display information corresponding to the defined portion of the display area. Aspects of this disclosure can also render at least some display content of the display area corresponding to the defined portion of the display area. In some aspects, updating display information can be based on the rendered display content of the display area.

A visual attention-based ray tracing method includes: determining a central position of a specific scene during generation of a first image by rendering the specific scene at a first resolution; and performing selective rendering repeatedly on candidate pixels existing between sampling pixels through adaptive adjusting of a threshold due to a distance from the central position during generation of a second image by rendering the first image at a second resolution higher than the first resolution.

This application relates to the fields of computer vision and video processing technology, and discloses a method, system, device, and medium for processing illegally recorded videos based on neural networks. The method includes: constructing and training a screen corner detection neural network, and loading the trained screen corner detection neural network onto a GPU; sequentially and continuously reading each frame of the video stream, processing the frame into an RGB image of a preset size, and transmitting it to the GPU; using the screen corner detection neural network in the GPU to predict the image, obtaining the predicted corner coordinates, and transmitting them to a CPU; performing coordinate transformation and temporal smoothing processing on the predicted corner coordinates in the CPU, and performing perspective transformation on the corresponding frame based on the processed predicted corner coordinates to obtain a distortion-corrected image; and sequentially and continuously outputting each frame of the video stream with the distortion-corrected image. The method of this application achieves fully automatic, real-time, and high-precision distortion correction of the image, with strong robustness.

An adaptive parsing method for remote sensing image data from hyperspectral satellites is presented, belonging to the field of hyperspectral satellites. It addresses the shortcomings of existing technologies that cannot dynamically sense and adapt to different resolutions and stitching rules in different modes, leading to logical image reconstruction errors. The method includes: receiving remote sensing image data streams and assigning corresponding branches; parsing the coupling relationship between auxiliary data and image data, and determining the data format; for uncompressed visible light data, configuring image parameters and generating logical images using a temporal stitching model; for compressed visible light data, caching and batch writing in blocks, calculating the position in the cache area, and completing image block stitching; for infrared data, splitting single-line physical data into dual-focal-plane logical lines, synchronously parsing and independently outputting focal-plane images and auxiliary data; performing deduplication storage on auxiliary data; asynchronous parallel processing of multiple modules; and outputting multi-spectral TIFF image files and deduplicated auxiliary data. This method is applicable to the development and testing of hyperspectral satellites.

The present application relates to the technical field of computer vision, and discloses a loop closure detection method, an apparatus, a device, and a storage medium. The method comprises: determining a candidate key frame subset on the basis of an original image and a loop closure detection key frame database; when the candidate key frame subset is not empty, respectively determining a target image set for constructing a key frame and an original visual image; determining a matching point cloud pair by means of the target image set and the original visual image on the basis of a dense reconstruction thread, and calculating a similarity error of the matching point cloud pair; and performing loop closure detection on the basis of the similarity error. By means of said method, after a candidate key frame subset is determined, whether the candidate key frame subset is empty is determined; if so, it indicates that no loop closure is present, and if not, a dense reconstruction thread is created, and a valid matching point cloud pair is determined on the basis of the dense reconstruction thread; and then, loop closure detection is performed using an image pair corresponding to the similarity error, thereby effectively improving the accuracy of loop closure detection, improving SLAM tracking accuracy.

The application provides a large-scale dynamic flood risk map efficient ultra-low delay visualization method and system, which comprises the following steps: based on unstructured initial grid data, a plurality of static rendering fragments are generated; based on the flood evolution state, each static rendering fragment is divided into sub fragments, and the dynamic hydraulic result data of each static rendering fragment is obtained by performing streaming calculation on each calculation sub fragment; based on the viewport state information of the client, the push priority of each static rendering fragment is determined; and the dynamic hydraulic result data is pushed to the client according to the push priority, so that the client performs incremental rendering on the dynamic hydraulic result data based on the static rendering fragment, effectively breaks through the performance bottleneck of large-scale unstructured grid data rendering, breaks through the time sequence barrier of calculation and visualization, realizes the whole-process ultra-low delay visualization from model calculation to front-end display, and provides real-time, smooth and high-usable decision support for flood control emergency command scenes.

The application belongs to the technical field of computer architecture design, and discloses a unified accelerator design method and accelerator for diversified graph computing applications, which comprises the following steps: by comparing and analyzing the field-specific execution model of classical graph computing applications, observing the common data flow abstraction of different graph computing applications, establishing a graph computing execution model based on a sparse matrix, and abstracting the common part of the graph computing algorithm; based on the sparse matrix execution model, by analyzing the common hardware features of classical graph computing applications such as graph traversal, graph mining and graph learning, a field general chip architecture for graph computing is constructed, and general and efficient support for complex real-world scenarios is realized; by proposing a graph computing instruction set for a "scalar-vector-graph" heterogeneous core, the programmability of the graph computing chip is improved.

A graphics processing apparatus includes a memory device and a display engine coupled to the memory device. The display engine is configured to apply dither on a region of an image and modify a first pixel of an image stored in the memory based on pseudo-random noise to reduce color banding impressions. The pseudo-random noise is based on one or more the local brightness estimation (1706) and eventually one or more prior noise levels. The display engine determines the local brightness estimation based on an average brightness of a pixel region surrounding the first pixel and the first pixel (1704). In some examples, the display engine is configured to bound the pseudo-random noise based on a noise applied to a pixel in a same position as that of the first pixel in a prior frame within a same scene (1710).

A system and method for error detection are disclosed. The method includes receiving, by a graphics processing circuit, sensor data; generating, by the graphics processing circuit, first frame data based on the sensor data; receiving, by a machine learning model of an inference circuit, second frame data generated based on the first frame data; generating, by the machine learning model, identification data associated with the second frame data; detecting, by an inspection circuit, a difference between the sensor data and the identification data; and sending, by the inspection circuit, an error signal.

The application discloses a device for acquiring a mathematical model for eliminating residual image of infrared image and a use method thereof, which comprises a black body, a lens, a baffle, a signal processing board and an interface board connected in sequence; the lens is directed to the black body and collects infrared rays emitted and / or reflected by the black body; the baffle is an infrared shutter; the signal processing board is used for controlling the lens and the baffle to work according to instructions from a computer; and the interface board is used for connecting the signal processing board with the computer through a network port, sending data to the computer and accepting instructions from the computer. In use, data acquisition is firstly performed; then a decay function is fitted; and finally the fitted decay function is verified, which specifically comprises multiple experimental verification, chip working temperature influence verification and adaptability verification at different temperatures. The application can better adapt to residual image characteristics, increase accuracy, reduce noise interference on fitting, enhance robustness, reduce redundant calculation, and effectively improve processing speed on the premise of ensuring residual image elimination effect.

A computer program product interacts with machine-readable mediums with instructions for automated launch detection and recognition. It captures a video of a specified region using detectors on a vehicle. Raw image frames from the video undergo pre-processing, followed by feeding through anomalous clutter tracker pipeline, exceedance detection pipeline using global clutter suppression pipeline and an optical flow pipeline. Image windows are generated by rejecting clutter using exceedance pixel locations to create image chips of the target and local background that are run through a convolutional neural network, classifying them as launches or background clutter. A Kalman filter is applied to at least one frame detection list to generate a launch detection list and causes the launch to be detected.