10 results about "Texture memory" patented technology

The application provides a texture memory bank read access optimization system and optimization method, conflict detection is performed on generated 16-way texture addresses, texture addresses accessing the same texture block are composed into address groups, a plurality of address groups are obtained, a conflict flag of each address group and an effective texel mark bit in the group are generated, and an access request and the conflict flag are sent to a corresponding storage unit Bank in parallel according to each address group; when each storage unit Bank receives the access request, corresponding texture block data is returned, and a data assembly module reads corresponding texel data from the corresponding texture block data in parallel according to the effective texel mark bit in each address group. The application performs feature comparison conflict detection on texture addresses in parallel, groups the texture storage unit Bank, and then outputs in parallel, without preprocessing, and is not coupled with other parts in the texture unit, and is easy to implement; and the design mode of the pipeline is adopted, and the execution efficiency is high.

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for sampler feedback for texture space shading. A processor may assign each shading element in a set of shading elements associated with a geometry unit to a corresponding shading element group in a set of shading element groups. The processor may identify whether each shading element is a visible shading element. The processor may calculate a group offset value for each shading element group in the set of shading element groups based on a number of visible shading elements in the set of shading elements. The processor may calculate an element offset value for each shading element based on a number of visible shading elements. The processor may allocate, based on the element offset value and the group offset value, texture memory to the visible shading elements.

The application belongs to the technical field of neural network simulation and analog, and particularly relates to a large-scale cortex pulse neural network asynchronous parallel simulation algorithm based on GPU. The application utilizes the advantages of multi-thread and texture memory of a computing graphics card, combines the general form of a biological brain receiving external stimulation and the general connection mode between neurons in the cortex, designs an asynchronous parallel algorithm framework of GPU and CPU, GPU is responsible for parallel evolution of neuron dynamics equations and block parallel calculation of isotropic connection in a local network, CPU is responsible for processing anisotropic long-range connection, and different neuron dynamics equations and plasticity learning rules can be compatible. Compared with the prior art, the application can effectively improve simulation speed, provides a tool for simulating a biological brain cortex in a single computing node, and is suitable for a single node multi-graphics card and a multi-node multi-graphics card distributed operation model.

The present invention provides a parallel analysis method for watershed flow direction and cumulative flow using the D8 algorithm in a CUDA architecture. The method comprises: constructing a read and storage model for watershed DEM raster data based on GPU texture memory; setting parallel grids and thread blocks based on GPU global memory, mapping threads to DEM raster cells, and obtaining the current thread identification number; each thread continuously picking the elevation values of the center grid and adjacent grids of the DEM raster data according to the read and storage model; calculating the maximum distance-weighted drop based on the elevation values of the center grid and adjacent grids, and determining the flow direction of the center grid based on the maximum distance-weighted drop; constructing a flow direction grid cell based on the flow direction of the center grid, mapping threads to flow direction grid cells, and reading thread identification numbers and flow directions; and each thread performing serial flow calculations according to the flow direction to obtain a cumulative flow matrix. The present invention proposes a parallel method for fast computation of the D8 algorithm in a CUDA environment, solving the problems of raster pixel access and computation conflicts in parallel computation of the D8 parallel algorithm.

The present invention relates to a large-scale heat map rendering method based on WebGL, which includes: a heat point smooth rendering step: constructing a model to be rendered and a variety of resources required for the model to be rendered, rendering the model to be rendered in a heat map overlay rendering pipeline using a point drawing mode, performing a gradient smoothing process on the heat value of the heat point based on a preset smoothing function, and caching the smoothing result of the heat point in a shared texture memory; a heat point shading rendering step: rendering the smoothing result of the heat point based on a gradient color band texture map in a heat map shading rendering pipeline, and caching the shading result of the heat point in a shared texture memory; a user terminal rendering step: transferring the shading overlay result of the heat point in the form of a texture to the user terminal rendering pipeline for rendering processing, and outputting the final heat map processing result to a user display page. The present invention also relates to a large-scale heat map rendering system, medium and device based on WebGL.

This disclosure provides systems, devices, apparatuses, and methods, including computer programs encoded on a storage medium, for sampler feedback for texture space shading. The processor may assign each shading element of the set of shading elements associated with the geometry unit to a corresponding group of shading elements of the set of groups of shading elements. The processor may identify whether each coloring element is a visible coloring element. The processor may calculate a group offset value for each of the set of pigmented elements based on a number of visible pigmented elements of the set of pigmented elements. The processor may calculate an element offset value for each colored element based on the number of visible colored elements. The processor may assign a texture memory to the visible colored element based on the element offset value and the set of offset values.

The invention provides a texture prefetching device and method in a drawing processing system, the texture prefetching device is suitable for a drawing processing system with a texture memory, and the texture prefetching device comprises a first first-in first-out memory, a second FIFO memory, a main grid device, an auxiliary grid device and a cache data memory. The cache data memory is coupled between the first FIFO memory and the texture memory. The main rasterizer is used for converting target coordinates of a first pixel in a primitive into a cache entry of a first integer texel and a label according to target coordinates and texture coordinates of a plurality of vertexes of the primitive. The auxiliary rasterizer is coupled to the second FIFO memory and is used for converting target coordinates of N second pixels in the primitive into a plurality of cache entries, a plurality of tags and a plurality of memory addresses of a plurality of second integer texels according to target coordinates and texture coordinates of the vertex of the primitive, and N is a multiple of 4.

A texture prefetching apparatus in a graphics processing system having a texture memory is disclosed, comprising a first FIFO memory, a second FIFO memory, a main rasterizer, an auxiliary rasterizer and a cache data memory. The cache data memory is coupled between the first FIFO memory and the texture memory. The main rasterizer converts destination coordinates of a first pixel in a primitive into a cache entry and a tag for a first integer texel according to texture coordinates and destination coordinates of multiple vertices of the primitive. The auxiliary rasterizer coupled to the second FIFO memory converts destination coordinates of N second pixels in the primitive into multiple cache entries, multiple tags and multiple memory addresses for multiple second integer texels according to the texture coordinates and the destination coordinates of the multiple vertices, where N is a multiple of 4.

The invention provides a texture memory bank read access optimization system and optimization method. The method comprises the following steps: carrying out conflict detection on generated 16 paths of texture addresses, forming an address group by the texture addresses accessing the same texture block to obtain a plurality of address groups, generating a conflict flag bit of each address group and an intra-group effective texel flag bit, and according to each address group, selecting the effective texel flag bit from the conflict flag bit and the intra-group effective texel flag bit; sending an access request and a conflict flag bit to the corresponding storage unit Bank in parallel; and when each storage unit Bank receives an access request, returning corresponding texture block data, and reading corresponding texel data from the corresponding texture block data in parallel by the data assembly module according to the intra-group effective texel flag bit of each address group. According to the method, feature comparison conflict detection is carried out on texture addresses in parallel, grouping is carried out according to the texture storage unit Bank, then parallel output is carried out, preprocessing is not needed, coupling with other parts in the texture unit is avoided, and implementation is easy; by adopting an assembly line design mode, the execution efficiency is high.

The disclosed computer-implemented method may include receiving a texture memory that represents a rendering of a display frame and includes a color value for each of a plurality of pixels, and receiving a coverage bitmap that represents a foreground object of the display frame with respect to the plurality of pixels. The method may also include reprojecting the texture memory using the coverage bitmap, and displaying the reprojected texture memory on the display. Various other methods, systems, and computer-readable media are also disclosed.