6 results about "Texture memory" patented technology

The application provides a texture memory bank read access optimization system and optimization method, conflict detection is performed on generated 16-way texture addresses, texture addresses accessing the same texture block are composed into address groups, a plurality of address groups are obtained, a conflict flag of each address group and an effective texel mark bit in the group are generated, and an access request and the conflict flag are sent to a corresponding storage unit Bank in parallel according to each address group; when each storage unit Bank receives the access request, corresponding texture block data is returned, and a data assembly module reads corresponding texel data from the corresponding texture block data in parallel according to the effective texel mark bit in each address group. The application performs feature comparison conflict detection on texture addresses in parallel, groups the texture storage unit Bank, and then outputs in parallel, without preprocessing, and is not coupled with other parts in the texture unit, and is easy to implement; and the design mode of the pipeline is adopted, and the execution efficiency is high.

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for sampler feedback for texture space shading. A processor may assign each shading element in a set of shading elements associated with a geometry unit to a corresponding shading element group in a set of shading element groups. The processor may identify whether each shading element is a visible shading element. The processor may calculate a group offset value for each shading element group in the set of shading element groups based on a number of visible shading elements in the set of shading elements. The processor may calculate an element offset value for each shading element based on a number of visible shading elements. The processor may allocate, based on the element offset value and the group offset value, texture memory to the visible shading elements.

The application belongs to the technical field of neural network simulation and analog, and particularly relates to a large-scale cortex pulse neural network asynchronous parallel simulation algorithm based on GPU. The application utilizes the advantages of multi-thread and texture memory of a computing graphics card, combines the general form of a biological brain receiving external stimulation and the general connection mode between neurons in the cortex, designs an asynchronous parallel algorithm framework of GPU and CPU, GPU is responsible for parallel evolution of neuron dynamics equations and block parallel calculation of isotropic connection in a local network, CPU is responsible for processing anisotropic long-range connection, and different neuron dynamics equations and plasticity learning rules can be compatible. Compared with the prior art, the application can effectively improve simulation speed, provides a tool for simulating a biological brain cortex in a single computing node, and is suitable for a single node multi-graphics card and a multi-node multi-graphics card distributed operation model.

This disclosure provides systems, devices, apparatuses, and methods, including computer programs encoded on a storage medium, for sampler feedback for texture space shading. The processor may assign each shading element of the set of shading elements associated with the geometry unit to a corresponding group of shading elements of the set of groups of shading elements. The processor may identify whether each coloring element is a visible coloring element. The processor may calculate a group offset value for each of the set of pigmented elements based on a number of visible pigmented elements of the set of pigmented elements. The processor may calculate an element offset value for each colored element based on the number of visible colored elements. The processor may assign a texture memory to the visible colored element based on the element offset value and the set of offset values.

The invention provides a texture memory bank read access optimization system and optimization method. The method comprises the following steps: carrying out conflict detection on generated 16 paths of texture addresses, forming an address group by the texture addresses accessing the same texture block to obtain a plurality of address groups, generating a conflict flag bit of each address group and an intra-group effective texel flag bit, and according to each address group, selecting the effective texel flag bit from the conflict flag bit and the intra-group effective texel flag bit; sending an access request and a conflict flag bit to the corresponding storage unit Bank in parallel; and when each storage unit Bank receives an access request, returning corresponding texture block data, and reading corresponding texel data from the corresponding texture block data in parallel by the data assembly module according to the intra-group effective texel flag bit of each address group. According to the method, feature comparison conflict detection is carried out on texture addresses in parallel, grouping is carried out according to the texture storage unit Bank, then parallel output is carried out, preprocessing is not needed, coupling with other parts in the texture unit is avoided, and implementation is easy; by adopting an assembly line design mode, the execution efficiency is high.

The disclosed computer-implemented method may include receiving a texture memory that represents a rendering of a display frame and includes a color value for each of a plurality of pixels, and receiving a coverage bitmap that represents a foreground object of the display frame with respect to the plurality of pixels. The method may also include reprojecting the texture memory using the coverage bitmap, and displaying the reprojected texture memory on the display. Various other methods, systems, and computer-readable media are also disclosed.