Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

145 results about "Machine instruction" patented technology

A machine instruction consists of several bytes in memory that tells the processor to perform one machine operation. The processor looks at machine instructions in main memory one after another, and performs one machine operation for each machine instruction. The collection of machine instructions in main memory is called a machine language program.

Route planning method and system for corner optimization

The invention discloses a path planning method and system for corner optimization. The method and system are used for cutter radius compensation and machining instruction smooth transition of a three-dimensional path of a numerical control machine tool. The method comprises the steps that a machining instruction is pre-read, and a path point location is analyzed; calculating a path direction vector and a normal vector, and determining a path plane equation; calculating a plane included angle and an intersection direction vector through a normal vector; generating a compensation curve by translating along the perpendicular direction of the intersecting line by taking the radius of the cutter as a constraint; and generating a smooth control instruction through curve subdivision and inserting the instruction into an instruction queue. The problem that three-dimensional path corner transition is not smooth is solved, the machining precision and efficiency are remarkably improved, and the method is suitable for a numerical control machine tool for complex curved surface machining.
Owner:NANJING LANHAO INTELLIGENT TECH CO LTD

Code compiling method and device based on P4 assembler, assembler and medium

The invention provides a code compiling method and device based on a P4 assembler, the assembler and a medium. The code compiling method comprises the steps that a to-be-processed assembly code file is obtained; splitting and compiling the assembly code file to obtain a plurality of code segment compiling results; according to the auxiliary information, by taking Parser components, Mat components and Deparser components contained in the Ingress unit and the Egress unit as classification types, classifying the code segment compiling results to obtain code segment groups; linking the P4 table item data and the machine instruction code contained in the code segment group, and endowing a link result with a global instruction identifier and code segment header information to obtain a code segment binary code; and generating a firmware file based on the code segment binary code. The compiling process of the network processor can be simplified, so that the development efficiency is improved.
Owner:YIHUA TECHNOLOGY (BEIJING) CO LTD

Task processing method and apparatus, electronic device, computer-readable storage medium, and computer program product

A task processing method performed by an electronic device includes generating, based on task prompt information corresponding to a target task in a service scenario, a system interaction parameter corresponding to the target task. The task prompt information describes the target task in a form of natural language, and the system interaction parameter describes the target task in a form of machine instructions. The method further includes invoking a task system of the target task to process the system interaction parameter, and determining a processing result corresponding to the target task based on output information of the task system for the system interaction parameter.
Owner:TENCENT TECHNOLOGY (SHENZHEN) CO LTD

Optimizing data flow and display in an electronic medical records (EMR) system

A Health Value Analytics (HVA) system includes an electronic medical record (EMR) / HVA access device in the form of comprising machine instructions for facilitating a physician's workflow. A processor at a physician's work terminal executes the machine instructions to connect the terminal with a HVA server and / or an EMR server. The processor sends a medical information request for a patient and information related to characteristics and parameters of the terminal, to one or both the HVA server and the EMR server. The processor receives, in response, an EMR page generated and adapted by the EMR server for display on the terminal. The EMR page displays an electronic medical record of the patient, and one or more HVA data objects generated by the HVA server, after the EMR server adapts the EMR page based on mode information that includes characteristics of the terminal.
Owner:HEALTHCARE VALUE ANALYTICS LLC

Experimental scheme execution method and system based on large language model

The invention discloses an experiment scheme execution method and system based on a large language model, and relates to the technical field of scheme design, and the experiment scheme execution method based on the large language model comprises the steps: obtaining multi-modal information input by a user, recognizing the intention of the user, and triggering a workflow; verifying whether the experiment information corresponding to the user intention is complete or not according to the intelligent agent, and if yes, integrating and outputting an initial experiment scheme through a large language model; according to the knowledge base, performing knowledge retrieval on the initial experiment scheme, and combining the retrieved reference content with the initial experiment scheme to obtain a candidate experiment scheme; performing user real-time interaction based on the candidate experiment scheme to obtain a modification opinion input by a user, obtaining real experiment environment information, and modifying the candidate experiment scheme according to the modification opinion to obtain an executable experiment scheme; and compiling the executable experiment scheme into a machine instruction format to drive equipment to execute the executable experiment scheme. According to the method, the suitability of the biological wet experiment scheme is improved.
Owner:PEKING UNIV SHENZHEN GRADUATE SCHOOL

Design method and device for on-orbit accompanying measurement and control communication machine state machine model

The invention discloses a design method for an on-orbit accompanying measurement and control communication machine state machine model, and the method comprises the steps: constructing a data model of a measurement and control communication machine state machine, and enabling the data model to be used for calling data externally; constructing a context model of the state machine of the measurement and control communication machine based on the data model, and constructing a logic architecture of the state machine of the measurement and control communication machine based on scene service data; based on the logic architecture, the context model obtains an executable extended state machine and updates the feature attributes; obtaining a simulation model through periodic continuation based on the state machine capable of executing expansion and the context model, wherein the simulation model is used for processing uplink and downlink remote control and telemetering, voice and distance measurement service data of satellite communication, responding to a communication machine instruction set of the state machine of the measurement and control communication machine and outputting communication machine product telemetering; universal configuration is implemented based on the communicator instruction set and the communicator product telemetry.
Owner:SHANGHAI SPACEFLIGHT INST OF TT&C & TELECOMM

ALU operation fusion processing module and method suitable for neural network

The invention discloses an ALU operation fusion processing module and method suitable for a neural network, and the module comprises a control unit which is used for receiving and decoding a machine instruction, managing the execution processes of internal and external circulation and microinstruction circulation, and generating a control signal of each stage of a microinstruction assembly line; the microinstruction buffer area is used for storing a microinstruction sequence pre-generated by the neural network compiler; the register file is used for storing source operands and results of ALU operation; each entry of the register file is composed of a valid bit, a tag bit and a data bit; the ALU computing core adopts an SIMD (Single Instruction Multiple Data) architecture and comprises a plurality of paths of parallel arithmetic logic function units; the Load / Store unit is used for processing data exchange between a register file and a local buffer area; and the data selection interface is used for selecting a data source or a target buffer area according to the storage tag field of the microinstruction. According to the method, the high efficiency and the flexibility of the ALU in the neural network hardware accelerator can be effectively considered.
Owner:ZHEJIANG UNIV

Parameterization instruction selection method and related device

A parameterized instruction selection method is applied to optimizing a compiling process executed by a compiler. According to the parameterized instruction selection method, a corresponding machine instruction set is generated for instructions in a to-be-compiled code in advance during compiling, so that one or more corresponding machine instructions which can be selected by each instruction in the code during compiling are indicated on the basis of the machine instruction set; according to the method, the compiler does not select a default machine instruction for an instruction in a code any more, the compiler is guided to select different machine instruction combinations in the compiling process, so that multiple different target files are obtained, finally, the target file with the optimal execution performance is selected by executing the multiple target files, the flexibility of the instruction selection process is improved, and the user experience is improved. And compiling to obtain the target file with higher execution performance.
Owner:HUAWEI TECH CO LTD

Convolution modeling and learning system for predicting geometric shape accuracy of 3D printed products

A system, method, and computer-readable medium having machine instructions provides for predicting geometric shape accuracy of 3D printed products. Such a prediction may involve developing a model of an object and determining ways in which an actually-manufactured 3D object corresponding to the model differs in real life. These differences correspond to shape deviations. Shape deviations may be process dependent and / or path dependent, and different layers of the object as well as the manufacturing process to make the different layers may introduce shape deviations in layers of the object. By developing a transfer functions of the manufacturing process and associated interlayer effects of the layers and then appropriately offsetting inputs to the manufacturing process, the shape deviations may be ameliorated.
Owner:UNIV OF SOUTHERN CALIFORNIA

Binary vulnerability retrieval and positioning method and system based on high-dimensional vulnerability characterization

The invention relates to the field of code vulnerability detection, in particular to a binary vulnerability retrieval and positioning method and system based on high-dimensional vulnerability characterization, and the method comprises the steps: firstly inputting a binary file, analyzing the structural information of the binary file, and analyzing a machine instruction; extracting binary file function information, generating a cross-platform basic block IR instruction sequence, constructing a control flow graph, and constructing a data dependency graph; splicing the program dependency graph feature vector and the basic block IR instruction sequence feature vector, and performing multi-modal feature fusion to generate a comprehensive high-dimensional vulnerability representation vector; and finally, inputting the high-dimensional vulnerability representation vector into an index for searching to obtain a plurality of nearest neighbor indexes and distances, converting the distances into similarity, filtering according to a similarity threshold to obtain a most similar vulnerability vector, and obtaining vulnerability information and vulnerability positions corresponding to the vulnerability vector. The problems that traditional binary vulnerability detection cross-platform and compiler optimization detection fails and the result reliability is low are solved.
Owner:HUANENG POWER INT INC +1

Cross-platform binary code block layered semantic similarity detection method and related device

The invention discloses a cross-platform binary code block hierarchical semantic similarity detection method and a related device, and belongs to the field of code vulnerability detection.The cross-platform binary code block hierarchical semantic similarity detection method comprises the following steps that structural information of a binary file is analyzed, a machine instruction is analyzed through a hybrid disassembling engine, a basic block is extracted from the structural information of the binary file, and the basic block is extracted from the binary file; constructing a control flow graph, a data dependency graph and a function call graph; extracting instruction level semantics, basic block level semantics and function level semantics from the instruction sequence, the basic block, the control flow graph, the data dependency graph and the function call graph; according to the instruction-level semantics, the basic-block-level semantics and the function-level semantics, constructing instruction-level features, basic-block-level features and function-level features; and carrying out hierarchical similarity detection on the instruction-level features, the basic block-level features and the function-level features. The method and the related device can solve the problems of low detection efficiency and poor accuracy when a traditional vulnerability detection method is used for detecting vulnerabilities.
Owner:HUANENG POWER INT INC +1

Man-machine instruction automatic generation external control system based on physical isolation perception

PendingCN121806677AauditableOperational behavior is traceableProgramme controlComputer controlClosed loopMachine instruction
The invention discloses a man-machine instruction automatic generation external control system and method based on physical isolation perception. The system comprises an external execution body, a display sensing module, an artificial intelligence decision module and an input execution module. The local independent proxy device operates independently of the controlled system, acquires a screen display signal of the controlled system in one direction through an external display acquisition link, generates a control instruction based on acquired interface information, acts on the controlled system through a standard man-machine input interface, and constructs a closed-loop verification mechanism taking the screen display signal as a judgment basis. The information acquisition constraint, the judgment constraint and the execution authenticity constraint are followed, and verifiable confirmation of a control instruction execution result is realized. The system supports multi-mode triggering and external physical equipment extension control, solves the problems of insufficient safety, limited compatibility and poor verification reliability in the prior art, and is suitable for application scenes with high safety requirements.
Owner:宋飞

Vulnerability detection method and system based on code block characteristics

The invention relates to the field of code vulnerability detection, in particular to a vulnerability detection method and system based on code block features. The method comprises the steps that firstly, a binary file is analyzed, and a machine instruction is analyzed through a hybrid disassembling engine; secondly, performing static linear scanning on the extracted binary file instruction, constructing a control flow graph, dividing basic blocks, extracting an operation code sequence in the basic blocks, and constructing a cross-basic-block data dependency graph and a system calling sequence called by the basic blocks; secondly, using an LSH algorithm to realize rapid filtering, performing similarity comparison on extracted basic block features and vulnerability feature library features, realizing coarse-grained matching, and screening out a matching candidate set; feature fusion is carried out on the candidate set basic block operation code sequence, the basic block data dependency graph and the system calling sequence called by the basic block, GNN fine-grained matching is carried out on the fused features, and vulnerability detection is carried out. The problems that traditional binary vulnerability detection is poor in adaptability and low in result reliability are solved.
Owner:HUANENG POWER INT INC +1

Laboratory automation system based on artificial intelligence technology

The invention belongs to the technical field of laboratory automation, and particularly relates to a laboratory automation system based on an artificial intelligence technology. The system comprises an intelligent man-machine interaction module which is used for interacting with a user and obtaining input information; the intelligent analysis module is used for processing the obtained input information, converting the information into a standardized machine instruction and providing an optimization suggestion for a user experiment scheme through a knowledge base; the information sensing module is used for sensing the space positioning of the biological experiment instrument in the operation space so that the mechanical arm can conduct grabbing movement and experiment operation; and the experiment execution module is used for automatically completing an experiment process through a mechanical arm. The invention has the characteristics of high flexibility and low operation threshold.
Owner:HANGZHOU MOXUN INTELLIGENT TECHNOLOGY CO LTD

Sort and merge instructions for general-purpose processors

A list sort instruction is provided to perform a sort and / or merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of a computing environment. The execution includes sorting a plurality of input lists to obtain one or more sorted output lists as output.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Parameterization instruction selection method and related apparatus

A parameterization instruction selection method, applied to optimizing a compilation process executed by a compiler. In the parameterization instruction selection method, during compiling, corresponding machine instruction sets are pre-generated for instructions in a code to be compiled, and one or more corresponding machine instructions that can be selected by each instruction in the code during compiling are indicated on the basis of the machine instruction sets, so that a compiler does not select a default machine instruction for the instruction in the code any more, and the compiler is guided to select different machine instruction combinations during compiling, so as to obtain a plurality of different target files; finally, a target file having optimal execution performance is selected by executing the plurality of target files. Thus, the flexibility of an instruction selection process is improved, and the target file having higher execution performance is obtained by means of compiling.
Owner:HUAWEI TECH CO LTD

Quantum virtual machine for simulation of a quantum processing system

Quantum operations can be simulated on a classical processing system using a quantum virtual machine (QVM). The QVM receives a quantum virtual state including a virtual wavefunction of n qubits. The virtual wavefunction is represented by probability amplitudes stored in a memory location of the classical processing system. The QVM simulates a received quantum operation by determining a set of virtual partial wavefunctions, accessing probability amplitudes for the virtual partial wavefunctions, and executing the quantum operation on the sub-bitstrings. The QVM can measure the result of the quantum operation, add noise, share the virtual wavefunction, or generate efficient machine instructions when simulating the quantum operation.
Owner:RIGETTI & CO INC

Method, computer system and computer program product for transaction start / end instructions

A method for executing a machine instruction in a data processing environment, the method comprising: - obtaining, by a processor, a machine instruction for specifying a transaction start operation, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction for specifying a transaction start operation comprising: ◯ an operation code; and ◯ a control field for specifying one or more controls to be used in a transactional execution, comprising at least a base field and a displacement field; and - an execution, by the processor, of the machine instruction, the execution comprising: ◯ determining from a field of the statement whether a transaction to be initiated by the begin transaction statement is a restricted transaction or an unrestricted transaction; ◯ initiating a restricted transaction on the basis that the field is a value, where the restricted transaction has one or more constraints associated with it, where the one or more constraints are not associated with any unrestricted transaction, and setting a condition code to a value indicating successful execution of the machine instruction; and ◯ on the basis that the field is another value, specifying a location for storing diagnostic information in an aborted unconstrained transaction, initiating the unconstrained transaction, and setting a condition code to the value indicating successful execution of the machine instruction, wherein the field indicates an unrestricted transaction, and wherein, based on the base field having a value, contents of a register indicated by the base field are combined with contents of the displacement field to create a first operand address, the first operand address indicating a location of a transaction diagnostic block usable for storing the diagnostic information upon abort.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Instruction extension compiling method and device, electronic equipment and storage medium

The invention provides an instruction extension compiling method which comprises the steps that a single built-in function is declared, the built-in function comprises at least one function configuration form parameter, and the value domain of the function configuration form parameter covers a plurality of machine instruction function variants; a variant mapping rule base is constructed, a mapping relation between function configuration form parameter values and function variant identifiers is stored, and a single built-in function is mapped to a plurality of function variant identifiers through different values of the function configuration form parameters; in response to source code calling, generating an intermediate representation node carrying a specific function configuration parameter value; and converting the function configuration parameter values in the intermediate representation nodes into target function variant identifiers in real time based on the mapping rule base, and dynamically generating corresponding machine instruction function variants. According to the method, the number of built-in functions and definition complexity can be effectively reduced, so that the development efficiency of the extension instruction and the flexibility of a compiling system are remarkably improved.
Owner:YIZHU TECH (HANGZHOU) CO LTD

Blockchain Incorporated System for Verifying Ingredients in Agricultural Products and Byproducts

A blockchain incorporated system for verifying ingredients in products includes a processor and a non-transient computer-readable storage medium having machine instructions encoded thereon. The processor executes the machine instructions to generate and maintain a blockchain directory that includes verification documents for the products and for product ingredients, and a hash structure with hashes that correlate to the verification documents. The processor provides through the hash structure, a single point of access to the verification documents. The hash structure includes batch hashes that correlate to multiples of the products and an ingredients hashes that correlate to individual ingredients of the products. The processor receives a scan of a batch hash applied to a product and based on the scan, provides access to the multiples of the products and corresponding individual ingredients for each of the individual ingredients of the products.
Owner:RESEARCH BLOCKS TECHNOLOGIES INC DBA AMNI INC

Method for reading and writing PLC device, electronic device and medium

The invention discloses a method for reading and writing PLC equipment, electronic equipment and a medium, and relates to the technical field of semiconductor manufacturing, and the method comprises the steps: responding to an access signal of the PLC equipment, and determining a communication parameter of the PLC equipment; reading and storing the process data stored in the PLC equipment; analyzing the process data to generate display data so as to control a display interface of the upper computer to display the process data; receiving an operation instruction; converting the operation instruction into a machine instruction which can be identified by the PLC equipment; and sending the machine instruction to the PLC equipment according to the communication parameters of the PLC equipment. The method has the characteristics and advantages that the accessed multi-brand and multi-type PLC equipment is automatically identified, the data of the multi-brand and multi-type PLC equipment is read and written in real time, and the automation level of a centralized control scene of a production line is improved.
Owner:浙江晟霖益嘉科技有限公司

Real-time compiling method and device, equipment and storage medium

The invention discloses a real-time compiling method and device, equipment and a storage medium, belongs to the field of data processing, and can solve the problem that a program cannot be compiled on a target platform in real time. The method comprises the following steps: converting source codes in a character stream into a symbol set through a lexical analysis state machine; processing the grammar symbols in the symbol set through an analysis engine to generate corresponding intermediate representations; the intermediate representation is processed through an assembly generator and a node distributor, a binary file corresponding to a target platform is obtained, and the binary file at least comprises a first machine instruction corresponding to the target platform; and compiling the dynamic code through a real-time compiling engine to obtain a second machine instruction corresponding to the target platform, and putting the second machine instruction into a dynamic loading library to load and run the second machine instruction.
Owner:CHINA TELECOM CLOUD TECH CO LTD

Systems and methods for detecting malicious code in a file

Discloses are systems and method for detecting malicious code in a file. The system receives at least one file. The system analyzes the at least one file, during which offsets from a beginning of the at least one file are detected for data that is similar to code that assembles strings in memory from data included in machine instructions. The system performs emulation of the machine instructions included in the code according to the detected offsets, further comprising: checking an effect of each respective machine instruction of the machine instructions on a control flow, and extracting strings from virtual memory if the respective machine instruction affects the control flow. The system analyzes extracted strings, during which malicious code is detected using malicious code detection rules.
Owner:AO KASPERSKY LAB

Code processing device, processor, code processing method, and decoding method

The invention discloses a code processing device, a processor, a code processing method and a decoding method, and belongs to the technical field of computers. The code processing device comprises an input module used for obtaining a code file, and the code file comprises machine codes of a plurality of instructions; the processing module is used for determining a target instruction from the multiple instructions; and the processor is used for compressing the machine code of the target instruction into a compressed code, storing the compressed code into the storage space and generating a machine instruction, and the machine instruction is used for reading the compressed code from the storage space and restoring the compressed code into the machine code of the target instruction. In this way, the code area in the code file is reduced, and meanwhile stable operation of the instruction is guaranteed.
Owner:BEIJING ESWIN COMPUTING TECH CO LTD

Pipeline prefabrication processing method, system and equipment

The invention provides a pipeline prefabrication machining method, system and equipment, and relates to the field of pipeline machining.The machining method comprises the steps that three-dimensional coordinate information of a pipeline is obtained based on a construction axonometric map of a nuclear power site; and based on the three-dimensional coordinate information, forming a three-dimensional model of the pipeline by using a parameterized modeling mode of aided design software. And based on the three-dimensional model, an engineering file capable of being recognized and machined by the pipe bending machine is output, and a pipeline machining instruction is compiled and generated for machining of the pipe bending machine. The problems of low secondary design efficiency, low automatic production degree and the like of the nuclear power site pipeline can be solved, the digitization degree of the whole pipeline machining process is improved, and the pipeline production efficiency is improved.
Owner:CHINA NUCLEAR IND FIFTH CONSTR CO LTD

Multi-tool-bit numerical control machine tool system supporting RTCP function and control method thereof

The invention relates to a multi-tool-bit numerical control machine tool system supporting an RTCP function, and the system is configured to store and manage at least two groups of independent RTCP parameter sets, and each group of RTCP parameter sets is associated with an independent tool bit motion unit; according to the machining instruction, RTCP operation is executed for each set of tool bit movement unit so as to generate independent movement control instructions which guarantee that the center point of a tool moves along the programming track; and the motion control instruction is issued to the corresponding tool bit motion unit so as to drive at least two tool bits to perform machining in the RTCP mode at the same time. The invention further relates to an RTCP control method for the multi-tool-bit numerical control machine tool. By the adoption of the multi-tool-bit numerical control machine tool system supporting the RTCP function and the control method of the multi-tool-bit numerical control machine tool system, machining of multiple tool bits in the RTCP mode is achieved, and the machining efficiency is remarkably improved. And a multi-four-axis and multi-five-axis machine tool structure is supported, and certain flexibility is achieved.
Owner:SHANGHAI WEIHONG ELECTRONICS TECH +1

Method for generating bytecode, method for generating machine code, and device

PCT designated stageWO2026138155A1Machine instructionSource code
The embodiments of the present specification provide a method for generating a bytecode, a method for generating a machine code, and a device. The method for generating a bytecode comprises: obtaining a target source code, and applying a first process to the target source code, the first process comprising: replacing a target statement used for an integer operation in the target source code with a preset objective function; on the basis of the target source code after the first processing, generating a target bytecode, the target bytecode comprising a bytecode instruction generated on the basis of a preset function, and the bytecode instruction instructing to perform the integer operation corresponding to the target statement by means of a preset machine instruction sequence, and to perform an overflow check for the integer operation.
Owner:ANT BLOCKCHAIN TECHNOLOGY (SHANGHAI) CO LTD

The system and process for compiling source code

Embodiments of the present disclosure relate to systems and processes for compiling source code. According to one aspect, a method for compiling source code into computer executable code using a compilation tool includes: receiving the source code as input to the compilation tool; translating the source code into target code comprising machine instructions executable by a processor; then introducing additional instructions selected from illegal instructions and no-operation instructions between the machine instructions of the target code to obtain executable code; and then delivering the executable code as output of the compilation tool.
Owner:STMICROELECTRONICS (GRAND OUEST) SAS

A runtime hang detection and localization method and apparatus for parallel programs

The application provides a runtime suspension detection and positioning method and device for parallel programs, and applies to the technical field of large-scale computing. The method comprises the following steps: constructing a program counter value queue of each target execution unit at each sampling time; recording a stagnation program counter value of a target execution unit in a stagnation state; clustering the stagnation program counter value of the target execution unit to determine a suspended target execution unit; based on a machine instruction corresponding to the stagnation program counter value of the suspended target execution unit, obtaining source file and line number information corresponding to the stagnation program counter value through debugging information; and when the machine code corresponding to the stagnation program counter value of the suspended target execution unit is a call instruction, obtaining function call information. In this way, non-intrusive and low-load monitoring of parallel programs is realized, normal synchronization waiting and abnormal suspension processes are effectively distinguished, and problems are positioned to source code lines.
Owner:COMP NETWORK INFORMATION CENT CHINESE ACADEMY OF SCI

Instruction-level program debugging method and device and computer program product

According to the instruction-level program debugging method and device and the computer program product provided by the embodiment of the invention, the tracking log entry is generated by acquiring the execution data information of the machine instruction, and the key register value and the memory access information before and after each instruction is executed are recorded; any instruction execution point can be accurately traced back in the replay process, then the first tracking log entry is preprocessed into a structured instruction tracking log entry, and machine instructions of a target program are executed one by one through a preset instruction level simulator based on an instruction sequence of a uniform format and an analyzable structure, so that the replay efficiency of the target program is improved. The execution of the instruction is accurately simulated, the instruction-level replay operation of the program state is realized, the dependency on the external environment in the debugging process is greatly reduced based on simulator replay, debugging can be performed in a controlled and isolated environment, any execution path of the program can be replayed, the target program does not need to be run again, and the debugging efficiency is improved. And debugging of occasional and difficult-to-reproduce problems is greatly facilitated.
Owner:BEIJING BOXIAOTONG TECH CO LTD