426 results about "Digital input" patented technology

Method and device(s) for supporting performance of machine learning based CFR and DPD on multiple digital input signals relating to different frequency bands, respectively, in order to signal condition said signals before power amplification and subsequent transmission in said frequency bands by a wireless communication network. The device(s) obtain said multiple digital input signals as complex valued signals. The device(s) perform feature construction that takes said multiple digital input signals as input and provides constructed feature signals according to predefined constructed feature types as output. Said predefined constructed feature types relate to at least the following per complex valued sample of the obtained complex valued multiple digital input signals the real part of the sample, the imaginary part of the sample and at least one of the absolute value of the sample and the phase of the sample.

An image processor for a medical observation device includes a color conversion function, The image processor is configured to retrieve an input pixel of a digital input color image and a location of the input pixel in the input color image, and apply the color conversion function to the input pixel to generate an output pixel in a digital output color image. The color conversion function depends on the location of the input pixel.

A signal processing method includes: receiving, by a signal input, a digital input signal from a device under test; capturing, by a measurement circuit, at least one IQ measurement set based on the received input signal, wherein the at least one IQ measurement set comprises a plurality of IQ measurement points; determining, by an analysis circuit, a total noise of the digital input signal over frequency based on the at least one IQ measurement set; determining, by the analysis circuit, an instrument noise over frequency, wherein the instrument noise corresponds to noise generated by the measurement instrument; and determining, by the analysis circuit, a ratio of the instrument noise and the total noise over frequency, thereby obtaining a frequency-dependent scaling factor. Further, a measurement instrument is described.

The invention belongs to the field of analog integrated circuit design, and particularly relates to a miniaturized high-precision non-binary R-2R DAC with digital correction. Non-binary characteristics are introduced by setting resistance values of bridge resistors RBm and RBm + 1, so that an LSB section is a binary weight section, and ISB and MSB are non-binary weight sections; therefore, the width-to-length ratios of the MOS tubes of the switches SWm + 1-SWm + i + j and SW1 are equal and do not need to be increased proportionally, the non-binary characteristic is further introduced by setting the switch on-resistance, the selection of the unit resistance R only needs to meet the matching precision of the LSB section, and the area of the switch resistor array is greatly reduced. Static errors in the ISB segment and the MSB segment are respectively corrected by using an OEM correction technology, only digital code redundancy between adjacent segments of the LSB segment, the ISB segment and the MSB segment needs to be obtained through measurement, redundant digital codes are removed by adjusting digital input codes of corresponding segments, and the m + n + k-1 bit binary DAC is obtained through calibration, so that the memory of a digital calibration algorithm is efficient, and the algorithm complexity is effectively reduced. According to the invention, the area of the DAC is obviously reduced while high precision is realized.

The invention discloses an ODAC implementation system and method based on a five-segment thermo-optical phase modulator, and relates to the technical field of optical communication, and the method comprises the following steps: obtaining single-mode laser input, dividing the single-mode laser input into two paths through a multi-mode interference device beam splitter, and transmitting the single-mode laser input into an upper arm and a lower arm of a Mach-Zehnder modulator; the current is adjusted through the thermo-optic phase modulator to control the temperature, the refractive index is changed to introduce phase delay, and the phase difference of two arms of the Mach-Zehnder modulator is calibrated; on the basis of a five-segment thermo-optical modulator, hierarchical amplitude modulation is carried out on beam splitting light according to digital input, a phase space is constructed by utilizing weight combination, and a linear optimal discrete state is screened; the modulated light is combined by a multi-mode interference device beam combiner, and digital-analog mapping output of light intensity is carried out; a detector installed at an output port of the five-segment thermo-optical phase modulator is used for monitoring output optical power in real time, the output optical power is fed back to a control circuit to calculate errors, thermo-optical modulation current is dynamically adjusted to compensate offset point drift, and optical digital analog conversion is achieved.

In one embodiment, a method includes, by an electronic device, receiving a digital input indicating a type of movement. Streaming sensor data corresponding to movements of a first user can be accessed from one or more sensors of one or more wearable devices on the first user. Displacement data corresponding to the movements of the first user can be generated based on the streaming sensor data and the indicated type of movement. One or more repetitions represented in one or more corresponding segments of the displacement data can be identified based on the displacement data. The displacement data corresponding to each identified repetition may substantially match a predetermined movement signature associated with the type of movement. One or more performance metrics can be calculated for one or more of the identified repetitions. Instructions can be provided for presenting a user interface including information referencing the performance metrics.

A time-interleaved current-based digital-to-analog converter (current DAC) cell includes first input circuitry configured to receive a digital input signal, a first biasing voltage, a first clock, and a second clock. The first clock and the second clock having a phase offset from one another and having a common period. The current DAC also includes a first gate configured to, responsive to an ‘ON’ state of the first clock, pass the digital input signal to a second gate, the second gate being configured to, responsive to an ‘OFF’ state of the second clock, output a first DAC cell activation signal. The current DAC further includes first output circuitry configured to, responsive to the first DAC cell activation signal, output a first analog current signal based on (i) the digital input signal and (ii) the first biasing voltage.

Certain aspects of the present disclosure provide techniques and apparatus for digital-to-analog conversion. An example apparatus generally includes a digital-to-analog converter (DAC), an incremental analog-to-digital converter (IADC) having a first input coupled to a first output of the DAC, and a controller coupled to the DAC and the IADC. The controller is configured to determine a direct current (DC) offset associated with the DAC using the IADC and control a mission-mode digital input signal of the DAC based on the DC offset.

To provide native hardware support for complex operations such as a beam search operation, an integrated circuit device can be implemented with multiple computational circuit blocks coupled in series to form a pipeline. Each computational circuit block includes an arithmetic logic unit (ALU) circuit having a first numeric input, a second numeric input, a primary result output, and a secondary output. The ALU circuit is programmable to perform an arithmetic operation on the first numeric input and the second numeric input to generate the primary result output, and provide one of the first numeric input or the second numeric input to the secondary output, which is fed back to the ALU circuit.

There is disclosed a system and a method of pairing and mapping an input device with a game client software. The method comprises an input device transmitting one or more bitmaps identifying analog and digital input schemes for the input device. The game client software, thereafter, can respond to inputs from the input device in the form identified by the one or more bitmaps.

Aspects of the present disclosure include receiving a digital input signal having an identified value, determining a number of a plurality of converters, determining, based on the identified value and the number, a minimum number of one or more minimum output configurations, parsing the digital input into a plurality of individual bits, and transmitting the plurality of individual bits to the plurality of converters based on an output configuration of the one or more minimum output configurations.

A portable electronic device comprising a microcontroller, a secure element, and at least one peripheral component controlled by the secure element, wherein the secure element is connected to the microcontroller through a first serial data link and is connected to the peripheral component through at least one second serial data link. At least one digital input of the peripheral component is connected to at least one digital input / output of the microcontroller and the secure element is configured to send to the microcontroller, via the first data link, control commands of said digital input / output of the microcontroller such that it provides a specified signal on the digital input of the peripheral component.

The invention relates to the technical field of industrial control, and discloses a data analysis processing controller. The controller comprises a cabinet, an aviation plug front panel and a cabinet VPX backboard. External 24V direct current is connected with a cabinet VPX backboard through the power supply filtering module and is reduced to 12V direct current through the power supply module. A main control module, a digital quantity input / output module, an analog quantity input / output module and two reserved slot positions are integrated on a VPX backboard of the case, and all the modules are inserted into the standard slot positions through VPX connectors. The main control module is communicated with the function module through an RS232 bus and is integrated with a gigabit Ethernet, an RS485 interface and a CAN (Controller Area Network) interface; the digital quantity module adopts a dual-channel optical coupler isolation and self-checking technology, and the analog quantity module realizes dynamic fault switching through redundant output and controllable voltage superposition. Internal cable connection is eliminated through a VPX framework, the reliability, expansibility and real-time response capability of the system are remarkably improved by combining multi-stage power supply filtering and cold conduction and heat dissipation design, and the system is suitable for ship distance adjusting devices and other complex industrial environments.

Methods and apparatus for performing crest factor reduction (CFR) to adjust the output power of a digital-to-analog converter (DAC) are described. An example method includes applying CFR to a digital input signal to generate a crest factor reduced signal. Applying CFR includes: (a) adjusting an amplitude of a real component of the digital input signal based on a first threshold while maintaining a phase of the digital input signal; and (b) adjusting the amplitude of the imaginary component of the digital input signal based on a second threshold while maintaining the phase of the digital input signal. The crest factor reduced signal is converted to an analog signal via a DAC.

A complementary current-steering digital-to-analog converter (DAC) including a p-type DAC as well as an n-type DAC is shown. The p-type DAC has p-type current sources, and the n-type DAC has n-type current sources. The p-type current sources are coupled to a first input terminal or a second input terminal of a transimpedance amplifier (TIA) according to a digital input of the complementary current-steering DAC. The n-type current sources are coupled to the first input terminal or the second input terminal of the TIA according to the digital input of the complementary current-steering digital-to-analog converter.

Provided is a robot control device that makes it possible to perform high-level operations on a robot from an external device. The robot control device for controlling a robot, comprises: a digital input / output interface for transmitting / receiving digital data to / from an external device; a program generation unit which generates an action command for the robot in accordance with command identification data included in digital data inputted via the digital input / output interface; and a program execution unit which executes the generated action command.

This disclosure describes systems, methods, and devices for analyzing and providing suggestions for handwritten math characters entered on a device A method may include receiving first handwritten strokes digitally entered on the device by a user; inputting the first handwritten strokes into a machine learning model; classifying, by the machine learning model, the first handwritten strokes as first mathematical characters; causing the device to present, based on the classifying, a selectable indication of the first handwritten strokes; receiving a first user selection of the selectable indication; causing the device to present, based on the first user selection, one or more selectable suggestions for second mathematical characters to follow the first mathematical characters; receiving a second user selection of a first suggestion of the one or more selectable suggestions; causing the device to present, based on the second user selection, synthesized second handwritten strokes representing the second mathematical characters.

A system and method providing automated voice-based healthcare plan delivery. The system interfaces with the patient through a voice-controlled personal assistant appliance via the internet. Some embodiments are implemented as voice applications or skills within the eco-system of an existing voice-controlled personal assistant device / appliance (hereinafter VCPAD). The system and method allow a clinician to create, digitally input, and modify a healthcare plan for a patient using a simple computer / web interface and without the need of any software development or computer programming skills, and allows a patient to interface with and query that healthcare plan using a largely conventional voice-controlled digital assistant appliance simply and efficiently to extract information about his / her individual healthcare plan in the patient's own language.

The present disclosure relates to a circuit and method for calibrating a digital-to-analog converter. A digital-to-analog converter (DAC) calibration system includes a DAC configured to convert a digital input to an analog input, a detector configured to measure analog outputs of the plurality of DAC unit cells and combine the analog outputs to generate a total analog output signal, and a calibration engine. The calibration engine is configured to calibrate the DAC.

This invention relates to the field of integrated circuit I / O interface design technology. It discloses a dual-mode (digital-analog) input / output interface circuit based on low-voltage devices adapting to high-voltage power supplies, aiming to solve the problems of low-voltage process chips being unable to directly adapt to high-voltage power supplies and limited I / O functionality. The interface circuit includes a digital output module, a digital input module, an analog I / O module, and a mode summary and ESD circuit. Through external configuration signals, the circuit can switch between digital input, digital output, analog I / O, and power-down modes. The digital output module incorporates a dual-mode high-voltage adaptation mechanism, utilizing a voltage divider resistor series and a common-gate protection transistor to ensure the safety of low-voltage devices under high voltage. The digital input module employs non-overlapping control to eliminate dynamic power consumption. A full-mode high-impedance isolation design ensures the reliability of mode switching. This invention achieves safe adaptation of standard low-voltage CMOS devices to high-voltage power supplies and integrates dual-mode functionality, offering advantages such as high integration, low power consumption, high reliability, and strong process compatibility.

An example digital-to-analog converter (DAC) circuit may comprise a plurality of single-bit DAC elements, an encoder circuit, and a multiplexer circuit. The encoder circuit may be configured to generate a control signal, where a number of asserted bits in the control signal is based at least in part on a digital input signal and an asserted bit pattern of the control signal is based at least in part on a random signal. The multiplexer circuit may be configured to modify the control signal to generate a noise-corrected control signal having a noise-corrected bit pattern. The noise-corrected bit pattern may direct a first asserted bit of the noise-corrected control signal to activate a first single-bit DAC element and a second asserted bit of the noise-corrected control signal to activate a second single-bit DAC element, where the first single-bit DAC element and the second single-bit DAC element having respective errors that at least partially cancel.

Grip for a writing or digital input instrument (left-handed)

The invention discloses a compressor distributed control protection circuit and a compressor control system. The compressor distributed control protection circuit comprises a main control module, a detection input module and a control output module, the main control module is electrically connected with the detection input module and the control output module, the main control module is used for receiving a detection signal of the detection input module and sending a control signal to the control output module, and the main control module is connected with a compressor; the detection input module specifically comprises a high-voltage phase sequence detection unit, an analog quantity input unit and a digital quantity input unit; the control output module specifically comprises an analog quantity output unit. According to the scheme, the burden of an external upper computer is greatly relieved, a traditional wiring mode is simplified, the cost is reduced, and monitoring and recording are facilitated.

This invention discloses a gateway domain control system for vehicles, comprising: coordinating and controlling a data storage module, power management module, system monitoring module, data communication module, time synchronization module, temperature detection module, digital input / output module, system safety module, actuator drive module, and ADC acquisition module in a vehicle gateway domain controller based on a SOC module, thereby realizing the control of the vehicle gateway domain; through the close cooperation of each module, the stability, security, flexibility, and intelligence level of the vehicle gateway domain control are improved, adapting to the complex and diverse application needs of modern vehicles.

The invention provides a micro injection pump and a control method. The micro injection pump and the control method are used for at least solving the technical problem of digital input in the prior art. A micro injection pump comprises a control chip, a first digital key and a second digital key, the first digital key transmits a first signal to the control chip after being triggered, the second digital key transmits a second signal to the control chip after being triggered, and the first digital key and the second digital key are triggered for a plurality of times in turn in a certain time. Or the same number key is triggered at least once within a certain time, at least eight combined signals can be transmitted to the control chip, and in a first operation interface of the micro injection pump, the first signal, the second signal and the remaining eight combined signals respectively and correspondingly input numbers to the system. On the premise that the number of the keys is not changed, the direction keys are replaced by the number keys, so that the number input efficiency is higher.

To provide a digital input module that can switch voltage for contact detection with a simple configuration.SOLUTION: In a digital input module, when voltage for contact detection is applied to an external input terminal to which an external resistor is connected in parallel with an external device, contact detection is performed on the basis of dark current flowing in external wiring. A first power supply unit for applying the voltage for contact detection is configured to be capable of switching the voltage for contact detection on the basis of a setting signal.SELECTED DRAWING: Figure 1

This application discloses a differential transmitter circuit, chip, and electronic device. The differential transmitter circuit includes: a single-slip differential drive enhancement circuit, including a single-ended digital input terminal (IN) and a first differential output terminal (IN_P, IN_N), used to convert the input single-ended digital signal into a pair of differential signals; a differential drive circuit, connected to the first differential output terminal (IN_P, IN_N), including a second differential output terminal (OUT_P, OUT_N), used to convert the differential signals into differential output voltages; wherein, the single-slip differential drive enhancement circuit includes a transmission gate (Tran) and an inverter, used to generate the differential signals with a phase difference of 180° and timing matching. The embodiments of this application aim to solve the technical problems of slow response speed, poor common-mode stability, high power consumption, and insufficient noise suppression capability in the prior art when transmitter circuits are used in LVDS interface applications.

The invention relates to a ship operation and monitoring system integrated arrangement method and an operation table. The method comprises the following steps: determining the installation position of a camera, dividing a monitoring area, and centrally configuring a PLC control system and monitoring rear-end equipment on an operation platform; each monitoring area is provided with a signal switching module with a digital quantity and industrial Ethernet interface; the camera collects equipment operation pictures, and the state sensor collects operation parameters; after the switching module processes the information, a control signal is transmitted to the PLC control system, and a video instruction is transmitted to the hard disk video recorder NVR through the optical fiber transceiver and the industrial switch; and the PLC control system is combined with the picture and parameter regulation and control equipment, and the PLC control system and the monitoring rear-end equipment adopt double-path independent power supply. The operating platform comprises an operating system and a monitoring system, a frame body is arranged in the operating system, core equipment is arranged in a layered manner, and front-end equipment of the monitoring system is arranged corresponding to standby equipment; according to the method and the operating platform, space is saved, interference resistance is enhanced, power supply is reliable, regulation and control accuracy is improved, the method and the operating platform are adaptive to severe ship environments, and efficient and stable operation of equipment is guaranteed.

The application relates to a GaN transistor driving circuit. It is used for a driven GaN transistor, and comprises upper and lower transistor circuits and upper and lower transistor control circuits. The upper and lower transistor circuits comprise upper and lower transistors, the upper and lower transistors are GaN transistors, the drain of the upper transistor is connected with a power voltage VCC, the gate is connected with a digital input VIN, the source is connected with the drain of the lower transistor, and is connected with the gate of the driven GaN transistor as the output of the GaN transistor driving circuit; the gate of the lower transistor is connected with the upper and lower transistor control circuits; the upper and lower transistor control circuits control the lower transistor by using a bus voltage VD, the power voltage VCC and the digital input VIN, so that the output of the GaN transistor driving circuit is in phase with the digital input VIN, the upper and lower transistor control circuits comprise transistors, the transistors are GaN transistors, and are turned on when the gate is applied with a voltage higher than a threshold voltage.

The invention relates to a digital filter circuit for calculating an exponential variance of a signal, a corresponding system on chip and a method of operation. A digital signal processing method includes: applying a first infinite impulse response filtering operation to a digital input signal to produce a first filtered signal; performing a mathematical transformation on a combination of the digital input signal and the first filtered signal to produce a transformed signal; applying a second infinite impulse response filtering operation to the transformed signal to produce a second filtered signal; performing a scaling operation on the second filtered signal to generate a scaled signal; and combining the second filtered signal and the scaled signal to produce a digital output signal indicative of a statistical characteristic of the digital input signal.