830 results about "Digital input" patented technology

Disclosed herein are methods, systems, and computer-readable media for regenerating a region of an image with a machine learning model based on a text input. Disclosed embodiments involve accessing a digital input image. Disclosed embodiments involve generating a masked image by removing a masked region from the input image. Disclosed embodiments involve accessing a text input corresponding to an image enhancement prompt. Disclosed embodiments include providing at least one of the input image, the masked region, or the text input to a machine learning model configured to generate an enhanced image. Disclosed embodiments involve generating, with the machine learning model, the enhanced image based on at least one of the input image, the masked region, or the text input.

Signal processing is applied to a digital input audio signal. An analog audio output signal is provided based on the digital input audio signal via a switching converter circuit driven by a PWM signal. The analog audio output signal is sensed to generate an analog feedback signal. The applied signal processing includes: producing a digital error signal indicative of a difference between the digital input audio signal and a digital word signal; applying digital-to-analog conversion to the digital error signal to produce an analog replica of the digital error signal; producing an analog difference signal indicative of a difference between the analog replica of the digital error signal and the analog feedback signal; applying analog-to-digital conversion to the analog difference signal to produce the digital word signal; applying digital filtering to the digital word signal to produce a filtered digital word signal that generates the PWM signal.

A system and method for in-memory image processing. In some embodiments, a system includes a memory, a first neuron processing circuit, and a second neuron processing circuit. The first neuron processing circuit may be connected to a first plurality of bit lines of the memory, and the second neuron processing circuit may be connected to a second plurality of bit lines of the memory. The first neuron processing circuit may include a plurality of configurable processing circuits, each of the configurable processing circuits including: an artificial neuron for calculating the sign of a weighted sum of a plurality of single-bit digital input signals at respective inputs of the artificial neuron, and a plurality of multiplexers, each having an output connected to a respective input of the inputs of the artificial neuron.

Method and apparatus for skew error measurement and correction in a digital-to-analog converter (DAC) using a time-to-digital converter (TDC). A DAC includes a main DAC and a TDC. The main DAC includes a plurality of DAC cells. The main DAC is configured to generate an analog output signal based on digital input data. The TDC is coupled to an output of the main DAC and configured to measure a timing error of the main DAC. The timing error may be measured on a DAC cell basis or a subset of DAC cells basis.

Method and device(s) for supporting performance of machine learning based CFR and DPD on multiple digital input signals relating to different frequency bands, respectively, in order to signal condition said signals before power amplification and subsequent transmission in said frequency bands by a wireless communication network. The device(s) obtain said multiple digital input signals as complex valued signals. The device(s) perform feature construction that takes said multiple digital input signals as input and provides constructed feature signals according to predefined constructed feature types as output. Said predefined constructed feature types relate to at least the following per complex valued sample of the obtained complex valued multiple digital input signals the real part of the sample, the imaginary part of the sample and at least one of the absolute value of the sample and the phase of the sample.

An organic interface converting data into tangible 3D shapes using programmable materials. It includes an interaction point with multiple surfaces and a projection module, all coordinated by a computing device for data transmission and reception. Data streams carry computer-readable code interpreted by the projection module to reorient surfaces, thereby materializing the data in three-dimensional space. The interface allows tactile input via human touch generating electrical currents that alter surface properties like position and smoothness. It also responds to audible frequencies and can receive data from secondary computing devices. Using a computing device, users can create 3D objects through data transmission to these responsive surfaces. The interface supports user interactions through touch, voice commands, and digital inputs from devices such as smartphones or tablets. Users have the flexibility to adjust the interface's resolution and response rate to tailor their interaction experience.

The present invention discloses a system for entangling multiple root keys with multiple arbitrary user-defined and self-generated input data using a Physically Unclonable Function (PUF) and a proposed digital algorithmic system. The key innovation lies in the combination of a PUF-based dynamically measurable entropy source and the proposed invention, enabling the generation of multiple true random keys. These keys serve as a secure foundation for establishing cryptographic channels, allowing the creation of isolated secure channels for different stakeholders and applications. The ability to create isolated secure channels with multiple root keys enables the establishment of multiple roots of trust, enhancing the integrity and security of cryptographic operations. The invention finds applications in various domains, such as FIDO authentications, point-to-point encryptions, crypto wallets, and encryption key management systems.

The present invention discloses a system for entangling multiple root keys with multiple arbitrary user-defined and self-generated input data using a Physically Unclonable Function (PUF) and a proposed digital algorithmic system. The key innovation lies in the combination of a PUF-based dynamically measurable entropy source and the proposed invention, enabling the generation of multiple true random keys. These keys serve as a secure foundation for establishing cryptographic channels, allowing the creation of isolated secure channels for different stakeholders and applications. The ability to create isolated secure channels with multiple root keys enables the establishment of multiple roots of trust, enhancing the integrity and security of cryptographic operations. The invention finds applications in various domains, such as FIDO authentications, point-to-point encryptions, crypto wallets, and encryption key management systems.

An apparatus and configuring scheme where a capacitive input circuit can be programmed to perform different logic functions by adjusting the switching threshold of the capacitive input circuit. Digital inputs are received by respective capacitors on first terminals of those capacitors. The second terminals of the capacitors are connected to a summing node. A pull-up and pull-down device are coupled to the summing node. The pull-up and pull-down devices are controlled separately. During a reset phase, the pull-up and / or pull-down devices are turned on or off in a sequence, and inputs to the capacitors are set to condition the voltage on node n1. As such, a threshold for the capacitive input circuit is set. After the reset phase, an evaluation phase follows. In the evaluation phase, the output of the capacitive input circuit is determined based on the inputs and the logic function configured during the reset phase.

Aspects of the subject disclosure may include, for example, receiving a plurality of modulated optical wavelengths generated from digital input data and unmodulated optical wavelengths. The one or more of the plurality of modulated optical wavelengths undergo an optical operation and are converted into one or more electrical signals. The optical operation increases a signal to noise ratio (SNR) of the one or more electrical signals to exceed an SNR threshold. Additionally, the one or more electrical signals are processed to produce digital output data. Other embodiments are disclosed.

A signal processing method for selectively removing noise from a digital input signal is provided. The method includes the steps of, for example, receiving, by a signal input, a digital input signal of a device under test, determining, by an analysis circuit, a DUT noise contribution to noise of the digital input signal, wherein the DUT noise contribution is associated with noise originating from the device under test, reducing, by the analysis circuit, a noise level of the digital input signal to a noise level of the DUT noise contribution determined, thereby obtaining a noise-reduced output signal, and providing the noise-reduced output signal to a measurement application for further processing. A signal processing system for carrying out the method or others is also provided.

According to some aspects of the disclosure, a crossbar circuit may include a plurality of bit lines intersecting with a plurality of word lines, a plurality of cross-point devices, and a plurality of switches connected to the plurality of word lines. Each of the plurality of cross-point devices is connected to at least one of the word lines and at least one of bit lines and may include a resistive random-access memory (RRAM) device. Each of the switches is selectively connected to ground or a reference voltage. A digital input may be provided to a cross-point device of the crossbar circuit by selectively connecting a word line connected to the cross-point device to ground or the reference voltage.

An image processor for a medical observation device includes a color conversion function, The image processor is configured to retrieve an input pixel of a digital input color image and a location of the input pixel in the input color image, and apply the color conversion function to the input pixel to generate an output pixel in a digital output color image. The color conversion function depends on the location of the input pixel.

The invention discloses a serial-port-based digital input and output control method and device and a storage medium, and relates to the technical field of electronic digital data processing.The serial-port-based digital input and output control method comprises the steps that if it is detected that a main board serial port is connected into a daughter card, serial port clock frequency multiplication is determined in response to programming interface calling; assembling the data to be transmitted into a communication instruction corresponding to the current frame; and transmitting the communication instruction to the daughter card through the serial port based on the baud rate determined by the serial port clock frequency multiplication. Therefore, the technical effect of reducing serial port data transmission delay so as to realize high-speed digital input and output expansion is realized.

A signal processing apparatus includes a plurality of time-interleaving digital-to-analog converters each configured to sample a digital input signal at a preset sub-DAC sample frequency, and to generate an analog sub-DAC output signal. The signal processing apparatus includes analog multiplexer that samples the plurality of sub-DAC output signals at a preset multiplexer clock frequency and generates a multiplexer output signal. The signal processing apparatus further includes a local ADC that receives the multiplexer output signal and generate a digital feedback signal. The signal processing apparatus further includes a digital compensation engine that receives the digital feedback signal from the local ADC and determine one or more distortion compensation parameters. The signal processing apparatus further includes a digital pre-processing stage that receives the one or more distortion compensation parameters from the digital compensation engine and performs distortion compensation pre-processing on the digital input signal.

A signal processing method includes: receiving, by a signal input, a digital input signal from a device under test; capturing, by a measurement circuit, at least one IQ measurement set based on the received input signal, wherein the at least one IQ measurement set comprises a plurality of IQ measurement points; determining, by an analysis circuit, a total noise of the digital input signal over frequency based on the at least one IQ measurement set; determining, by the analysis circuit, an instrument noise over frequency, wherein the instrument noise corresponds to noise generated by the measurement instrument; and determining, by the analysis circuit, a ratio of the instrument noise and the total noise over frequency, thereby obtaining a frequency-dependent scaling factor. Further, a measurement instrument is described.

The invention belongs to the field of analog integrated circuit design, and particularly relates to a miniaturized high-precision non-binary R-2R DAC with digital correction. Non-binary characteristics are introduced by setting resistance values of bridge resistors RBm and RBm + 1, so that an LSB section is a binary weight section, and ISB and MSB are non-binary weight sections; therefore, the width-to-length ratios of the MOS tubes of the switches SWm + 1-SWm + i + j and SW1 are equal and do not need to be increased proportionally, the non-binary characteristic is further introduced by setting the switch on-resistance, the selection of the unit resistance R only needs to meet the matching precision of the LSB section, and the area of the switch resistor array is greatly reduced. Static errors in the ISB segment and the MSB segment are respectively corrected by using an OEM correction technology, only digital code redundancy between adjacent segments of the LSB segment, the ISB segment and the MSB segment needs to be obtained through measurement, redundant digital codes are removed by adjusting digital input codes of corresponding segments, and the m + n + k-1 bit binary DAC is obtained through calibration, so that the memory of a digital calibration algorithm is efficient, and the algorithm complexity is effectively reduced. According to the invention, the area of the DAC is obviously reduced while high precision is realized.

The invention discloses a digital-to-analog converter and a calibration method and a calibration system thereof. The digital-to-analog converter comprises: a DAC circuit for providing an analog output current according to a digital input signal; the analog signal circuit is connected with the DAC circuit and used for converting analog output current into analog output voltage, and the digital-to-analog converter is further used for providing calibration current for a connection path of the DAC circuit and the analog signal circuit through the analog calibration circuit under the condition that quantization errors exist in the analog output voltage. And carrying out arithmetic logic operation on the error calibration coefficient and the digital input signal to adjust the analog output current of the DAC circuit. According to the digital-to-analog converter, the quantization error of the digital-to-analog converter is calibrated by adopting a mode of combining digital domain calibration in the analog calibration circuit and the DAC circuit, a large number of switches and resistors do not need to be arranged in the analog calibration circuit, and the area and the cost of the circuit are reduced while the circuit precision is improved.

The invention discloses an ODAC implementation system and method based on a five-segment thermo-optical phase modulator, and relates to the technical field of optical communication, and the method comprises the following steps: obtaining single-mode laser input, dividing the single-mode laser input into two paths through a multi-mode interference device beam splitter, and transmitting the single-mode laser input into an upper arm and a lower arm of a Mach-Zehnder modulator; the current is adjusted through the thermo-optic phase modulator to control the temperature, the refractive index is changed to introduce phase delay, and the phase difference of two arms of the Mach-Zehnder modulator is calibrated; on the basis of a five-segment thermo-optical modulator, hierarchical amplitude modulation is carried out on beam splitting light according to digital input, a phase space is constructed by utilizing weight combination, and a linear optimal discrete state is screened; the modulated light is combined by a multi-mode interference device beam combiner, and digital-analog mapping output of light intensity is carried out; a detector installed at an output port of the five-segment thermo-optical phase modulator is used for monitoring output optical power in real time, the output optical power is fed back to a control circuit to calculate errors, thermo-optical modulation current is dynamically adjusted to compensate offset point drift, and optical digital analog conversion is achieved.

To provide a control device, a vehicle refrigeration system, and a refrigeration vehicle capable of using many kinds of power supply devices as a power supply for refrigeration while suppressing the increase of the size of a communication circuit of the control device and the scale of communication software.SOLUTION: The present invention relates to a control device that is provided in a vehicle refrigeration system having a refrigeration device, and performs supply control of power supplied to the refrigeration device from a power supply device connected to the refrigeration device. The control device includes: a main connection circuit that has a communication connection terminal for a predetermined communication method, and when the power supply device is connected to the communication connection terminal, transmits and receives a control signal related to the supply control of power via the communication connection terminal; and an auxiliary connection circuit that has a digital output terminal and a digital input terminal, and when the power supply device is connected to the digital output terminal and the digital input terminal, outputs a digital signal indicating an operating state of the refrigeration device from the digital output terminal and takes in a digital signal specifying the operating state of the refrigeration device at the digital input terminal.SELECTED DRAWING: Figure 2

The invention discloses a multi-mode input and output circuit and a control method and device. The circuit comprises an embedded control circuit, and a selection input circuit, an input AD conversion circuit, an output DA conversion circuit and a selection output circuit which are respectively connected with the embedded control circuit, the selection input circuit is configured to sample and convert an acquired current analog voltage input signal or a current analog current input signal into a first analog voltage input signal according to a first control instruction of the embedded control circuit, convert the first analog voltage input signal into a first digital input signal through the input AD conversion circuit, and then input the first digital input signal into the embedded control circuit; and the selection output circuit is configured to convert the current digital output signal output by the embedded control circuit into a corresponding second analog voltage output signal or a second analog current output signal through the output DA conversion circuit according to a second control instruction of the embedded control circuit and then output the second analog voltage output signal or the second analog current output signal. The space of an electronic product is saved; and the flexibility is improved.

The invention discloses a multipath digital quantity input signal acquisition module circuit, relates to a fire detection system, and aims to solve the problems that a signal input and output circuit of an existing acquisition module is easily interfered by an external circuit and is poor in reliability. According to the invention, a power conversion circuit converts 220V alternating current into power supply voltage of an MCU control circuit and working voltage of a signal input circuit; the signal input circuit is used for acquiring a module switch key state and detector alarm information and outputting an acquisition signal; the signal input circuit is provided with multiple paths of input and output signals, and each path of input and output signals work independently; and the MCU control circuit is used for receiving the acquisition signal output by the signal input circuit and controlling power supply output and an alarm indicating lamp according to the acquisition signal. The beneficial effects are that each input signal acquisition circuit works independently through an optocoupler, the reliability is high, and the anti-interference capability is strong.

In one embodiment, a method includes, by an electronic device, receiving a digital input indicating a type of movement. Streaming sensor data corresponding to movements of a first user can be accessed from one or more sensors of one or more wearable devices on the first user. Displacement data corresponding to the movements of the first user can be generated based on the streaming sensor data and the indicated type of movement. One or more repetitions represented in one or more corresponding segments of the displacement data can be identified based on the displacement data. The displacement data corresponding to each identified repetition may substantially match a predetermined movement signature associated with the type of movement. One or more performance metrics can be calculated for one or more of the identified repetitions. Instructions can be provided for presenting a user interface including information referencing the performance metrics.

A biological computing platform may include a multielectrode array (MEA) connected to a computing device. The MEA may include a 2D grid of excitation sites, biological neurons disposed on the MEA, a processing device to apply a plurality of impulses at excitation sites having coordinates on the 2D grid, and one or more sensors to measure electrical signals output by one or more of the biological neurons at coordinates of the 2D grid, wherein the processing device is to receive the electrical signals from the one or more sensors and generate a representation of the electrical signals. The computing device may be programmed to receive a digital input signal, convert the digital input signal into instructions for the plurality of impulses, send the instructions to the MEA, receive the representation of the electrical signals from the MEA, and process the representation of the electrical signals.

A time-interleaved current-based digital-to-analog converter (current DAC) cell includes first input circuitry configured to receive a digital input signal, a first biasing voltage, a first clock, and a second clock. The first clock and the second clock having a phase offset from one another and having a common period. The current DAC also includes a first gate configured to, responsive to an ‘ON’ state of the first clock, pass the digital input signal to a second gate, the second gate being configured to, responsive to an ‘OFF’ state of the second clock, output a first DAC cell activation signal. The current DAC further includes first output circuitry configured to, responsive to the first DAC cell activation signal, output a first analog current signal based on (i) the digital input signal and (ii) the first biasing voltage.

A digital server power supply for digitally displaying real-time power and load efficiency through a high-precision sensor, a microcontroller, a communication module and a digital display device comprises a digital input circuit, a digital control logic module, a CRPS standard compatible module and a power consumption monitoring circuit. The digital input circuit comprises a switchable AC / DC module, a switchable DC / DC module and an input detection and identification circuit, an input path is switched through the digital control logic module, and the digital control logic module comprises a switching circuit and a power supply controller. The CRPS standard compatible module comprises a standard input interface, a standard slot, a standard communication interface and a standard DC / DC converter, and the power consumption monitoring circuit is connected with the power supply controller and is used for monitoring real-time power and load efficiency of the digital server power supply and outputting a monitoring result to the LCD display screen through data processing so as to realize man-machine interaction.

The invention discloses a method and a system for improving chip parallel test DUT (Device Under Test) number, and belongs to the technical field of chip test. Comprising the following steps: performing peripheral circuit relay analysis according to a chip test schematic diagram; obtaining the number of digital input and output channels according to the digital board card configuration resources of the automatic test equipment; and according to the channel resources of the power board card of the automatic test equipment and the obtained number of the digital input and output channels, calculating to obtain the number of the tested chips of the parallel test. Compared with the prior art, the method has the beneficial effects that the whole test time is greatly shortened by optimizing the simultaneous test number of the tested chips, so that the test efficiency of the automatic test equipment is improved; due to the improvement of the test efficiency, the same number of chips can be tested in a shorter time, so that the use time and the labor cost of test equipment are reduced, and the batch test cost of the chips is further reduced.

The invention discloses a high-frequency digital phase-locked amplifier based on a parallel digital algorithm and a control method. The amplifier comprises an analog-to-digital converter module, a serial-to-parallel module, an N parallel frequency measurement module, an N parallel phase-locked loop module and an N parallel input coherent demodulation module. The method comprises the following steps: acquiring an analog input signal and a reference signal, and sampling; performing serial-parallel conversion processing on the sampled digital input signal and the digital reference signal; performing frequency measurement on the N parallel digital reference signals to obtain reference signal frequency measurement information; performing phase locking adjustment on the N parallel digital reference signals to obtain frequency information and phase information; and performing demodulation processing on the N parallel digital input signals to obtain amplitude information, phase information and XY component information of the digital input signals. The embodiment of the invention can reduce the rate of the data flow and improve the throughput of the data information, thereby improving the bandwidth of the phase-locked amplification system. The invention can be widely applied to the technical field of phase-locked amplification.

Certain aspects of the present disclosure provide techniques and apparatus for digital-to-analog conversion. An example apparatus generally includes a digital-to-analog converter (DAC), an incremental analog-to-digital converter (IADC) having a first input coupled to a first output of the DAC, and a controller coupled to the DAC and the IADC. The controller is configured to determine a direct current (DC) offset associated with the DAC using the IADC and control a mission-mode digital input signal of the DAC based on the DC offset.

A system an analog to digital converter (ADC) operatively connected to receive an analog input signal from an input line and to output a digital input signal. A processor is operatively connected to receive the digital input signal from the ADC and to output a digital control signal for controlling a physical system based on the digital input signal. A digital to analog converter (DAC) is operatively connected to receive a copy of the digital input signal put out from the processor, and to output an analog output signal indicative of the copy of the digital input signal put out from the processor. Comparison logic is operatively connected to receive the analog input signal from the input line, to receive the analog output signal from the DAC, and to output an error signal in response to a mismatch between the analog input signal and the analog output signal.