116results about "Digitally weighted transducing elements" patented technology

The present invention provides for methods and systems for digitally processing an audio signal. Specifically, the present invention provides for a headliner speaker system that is configured to digitally process an audio signal in a manner such that studio-quality sound that can be reproduced.

The present invention provides for methods and systems for digitally processing an audio signal. In various embodiments, a method comprises receiving a profile comprising a plurality of filter equalizing coefficients, configuring a plurality of filters of a graphic equalizer with the plurality of filter equalizing coefficients from the profile, receiving a first signal for processing, adjusting the plurality of filters using a first gain, equalizing the first signal using the plurality of filters of the graphic equalizer, outputting the first signal, receiving a second signal for processing, adjusting the plurality of filters, previously configured with the filter equalizing coefficients from the profile, using a second gain, equalizing the second plurality of frequencies of the second signal with the plurality of filters of the graphic equalizer, and outputting the second signal.

The present invention(s) provides for methods and systems for digitally processing a ringtone. In various embodiments, a method comprises generating a profile comprising a plurality of filter equalizing coefficients, configuring a plurality of filters of a graphic equalizer using the plurality of filter equalizing coefficients from the profile, receiving a ringtone for processing, adjusting the plurality of filters using a first gain, equalizing the ringtone using the plurality of filters of the graphic equalizer, and outputting the equalized ringtone.

A digital pulse-width-modulation (PWM) generator comprising: an n bit digital magnitude comparator having first and second n bit inputs and an output indicative of the relative values of the signals applied at the first and second inputs; a first n bit digital up / down counter having a count direction input coupled to receive a sign bit of a digital unary input signal, an n bit parallel binary count output connected to the first n bit input of the magnitude comparator, and a clock input; a second n bit counter having a clock input coupled to receive a constant rate clock signal and an n bit parallel binary count output connected to the second n bit input of the magnitude comparator; an AND gate having a first input coupled to receive the constant rate clock signal in frequency divided form and a second input coupled to receive a magnitude portion of the digital unary input signal, and further having an output connected to the clock input of the first counter; and wherein the comparator continually generates an output signal indicative of the relative magnitudes of the counts of the first and second counters, whereby said output signal is a PWM output signal with an average value representing a ramp voltage having a slope determined by magnitude portion of the digital unary input signal with a direction of a slope of the output signal being determined by the polarity of the sign bit.

A digital / analog conversion apparatus for converting a digital signal into an analog signal. The digital / analog conversion apparatus can generate a high-quality analog signal, even when elements configuring the digital / analog conversion apparatus have variance, with high resolution and a small circuit size. The data conversion apparatus is provided with a first data converter for reducing the number of bits of an input signal, a second data converter for converting the format of the first output signal, and a third data converter for conversion into a code which corresponds to the history of the output from the second data converter.

A semiconductor die with an integrated electronic circuit, configured so as to be mounted in a housing with a capacitive transducer e.g. a microphone. A first circuit is configured to receive an input signal from the transducer at an input node and to provide an output signal at a pad of the semiconductor die. The integrated electronic circuit comprises an active switch device with a control input, coupled to a pad of the semiconductor die, to operatively engage or disengage a second circuit interconnected with the first circuit so as to operate the integrated electronic circuit in a mode selected by the control input. That is, a programmable or controllable transducer. The second circuit is interconnected with the first circuit so as to be separate from the input node. Thereby less noise is induced, a more precise control of the circuit is obtainable and more advanced control options are possible.

A digital / analog conversion apparatus to convert a digital signal into an analog signal. The digital / analog conversion apparatus can generate a high-quality analog signal, even when elements configuring the digital / analog conversion apparatus have variance, with high resolution and a small circuit size. The data conversion apparatus is provided with a first data converter to reduce the number of bits of an input signal, a second data converter to convert the format of the first output signal, and a third data converter for conversion into a code which corresponds to the history of the output from the second data converter.