253 results about "Digital interface" patented technology

The disclosed embodiments include computer-implemented systems and processes that generate and provision, in real time, directed digital content based on decomposed structured messaging data. For example, an apparatus may receive a plurality of messages that characterize first data exchanges initiated between a first counterparty and second counterparties during a first temporal interval. Each of the messages includes elements of message data associated with a real-time payment requested from the first counterparty by a corresponding one of the second counterparties. Based on the elements of message data, that apparatus may predict an occurrence of a second exchange of data that involves the first counterparty during a second temporal interval, and may transmit notification data that includes product data characterizing an available product associated with the predicted occurrence of the second data exchange to a device operable by the first counterparty for presentation within a digital interface.

The invention relates to the technical field of high-speed digital interfaces, and discloses a JESD204B multi-device deterministic delay synchronization system and method based on dynamic clock phase compensation, and the system comprises a main node which generates and dynamically distributes clock signals, and constructs a dynamic clock tree structure; the slave equipment is used for realizing cascade error elimination through a distributed compensation mechanism; the dynamic phase compensation engine adopts a hybrid phase detection framework and is combined with a digital-to-time converter (TDC) and an analog phase-locked loop (PLL); and the environment parameter compensation module is used for collecting temperature, voltage and operation time in real time, and calculating phase compensation quantity through a formula that delta phi = alpha * (T-T0) + beta * (V-V0) + gamma * delta t. On the aspect of synchronization precision, the phase error of a single device can be smaller than or equal to + / -200ps, the strict scene requirement is effectively met, the environment adaptability is high, the defects of traditional fixed compensation can be overcome, cascade error accumulation can be efficiently restrained through distributed compensation of slave devices, and on the aspect of real-time performance, an online calibration module can conduct real-time calibration without interrupting services.

The disclosed exemplary embodiments include computer-implemented systems, devices, apparatuses, and processes that dynamically implement and manage consent and permissioning protocols using container-based applications. By way of example, a device may receive a request for an element of data that includes a first digital token associated with an executed application program. The device may load a second digital token from a portion of the memory that is inaccessible to the executed application program, and when the first digital token is consistent with the second digital token, the device may present, within a digital interface, an interface element that confirms a verification of a digital signature associated with the data element.

The virtually divided input trackpad disclosed herein is designed to provide enhanced ergonomic user interaction with digital interfaces. The virtually divided input trackpad comprises two virtually separated functional areas, each of which may be dedicated to distinct functionalities such as object movement and object rotation. This arrangement allows for simultaneous two-handed operation, offering users an intuitive, efficient, and accessible way of controlling digital environments, which is especially beneficial for users with specific accessibility needs.

A digital pre-processing chip is disclosed. The digital pre-processing chip comprises an analog interface for transmitting and receiving analog signals to and from a plurality of analog Radio Frequency (RF) chips, and a digital interface for transmitting and receiving digital signals to and from a baseband chip. The digital pre-processing chip further comprises a plurality of Analog-to-Digital Converters (ADCs) for converting a plurality of analog signals received via the analog interface to a plurality of RX digital signals, and a plurality of Digital-to-Analog Converters (DACs) for converting a plurality of TX digital signals to a plurality of analog signals to be transmitted to the plurality of analog RF chips via the analog interface. The digital pre-processing chip further comprises pre-processing circuitry configured to pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface. The pre-processing circuitry is further configured to pre-process a digital signal received via the digital interface to form the plurality of TX digital signals to be transmitted to the plurality of DACs.

A circuit simulation method partitions circuits into linear and nonlinear subcircuits, obtains frequency responses of the linear portion, and applies causality-enforcing corrections to eliminate non-physical artifacts from band-limited data. The corrected responses enable construction of equivalent circuit models using voltage / current sources with passive elements, where source values update via convolution with port histories. This approach improves simulation accuracy and stability compared to direct frequency-inverse methods while maintaining compatibility with standard platforms including SPICE, PSCAD, and Simulink. Applications include power system transients, RF circuits, and high-speed digital interfaces.

The invention discloses a high-precision integrated temperature and humidity sensor and a construction method. The sensor comprises an MEMS humidity capacitance sensor, a CMOS integrated temperature sensor, an analog-to-digital converter, a calibration configuration information storage array and a digital interface. Wherein the MEMS humidity capacitance sensor and the CMOS integrated temperature sensor are respectively connected with the analog-to-digital converter, and voltage signals of the MEMS humidity capacitance sensor and the CMOS integrated temperature sensor are converted into digital signals; the analog-to-digital converter transmits the digital signal to the calibration configuration information storage array for data processing and linearization processing, and transmits the data to the SDAamp through a digital interface; in SCL; wherein the MEMS humidity capacitance sensor comprises a capacitance pole plate, a protection ring and a heating resistor; the capacitor plates adopt an interdigital capacitor structure and have a regular octagonal part in overlook observation, and meanwhile, the upper and lower electrode plates and the polyimide PI material layer between the two electrode plates form the interdigital capacitor structure.

The disclosed exemplary embodiments include computer-implemented processes that manage report and reconciliation workflow through a virtualization of robotic process automation (RPA) techniques. In some examples, an apparatus obtains reporting data that characterizes a status of an obligation during a first temporal interval, and perform operations that request, through a first digital interface of a first application, payment data that characterizes the status of the obligation during a second temporal interval. The reporting data may include information generated during a programmatic chatbot session. Based on the payment data, the apparatus modifies a portion of the reporting data to reflect the status of the obligation during the second temporal interval, and transmits a notification indicative of the modified portion of the reporting data to the first computing system.

The invention relates to the technical field of high-speed digital interface design, and discloses an ECRC parallel verification system and method for a PCIe receiving end, and the system comprises a plurality of ECRC verification modules and a distribution control module. The plurality of ECRC check modules are arranged in parallel, and the maximum processable bit widths are gradually reduced step by step; each ECRC verification module is used for executing ECRC verification with variable bit width; and the distribution control module is used for distributing the at least two TLP data packets to different ECRC verification modules for parallel verification according to the bit width information of the TLP data packets. According to the method and the device, resource redundancy is reduced through dynamic bit width adjustment, parallel verification of a plurality of TLPs can be completed in a single beat, meanwhile, the TLP is supported to be subjected to cross-beat processing, the performance requirement of high-speed communication can be met, and the area overhead can be greatly reduced.

Generally discussed herein are systems, apparatuses, and methods for generating a Controller Pilot Data Link Communication (CPDLC) digital message. This can include: a digital interface system configured to receive input from one of a pilot or an air traffic controller. The digital interface system can optionally include: a digital message generator configured to receive the input and decode an intent of the input within an aviation context. The digital message generator can be configured to determine a sample response based upon the intent. This can further include: a compliance system configured to review the sample response for a potential error. If cleared by the review of the compliance system, the digital interface system issues the sample response as the CPDLC digital message.

A computing device to improve intelligibility in an individual with speech dysarthria. The computing device accesses recorded speech of an individual with a speech dysarthria condition. The computing device accesses a pre-trained language improvement model. The pre-trained language improvement model identifies one or more exercises to be performed by the individual with speech dysarthria to improve intelligibility of the individual, the one or more exercises identified by the pre-trained language improvement model based upon an analysis of the recorded speech by the pre-trained language improvement model. A digital interface presents the one or more exercises to be performed by the individual.

The invention discloses an electric meter sampling filter chip and system integrated with a programmable anti-aliasing filter, and relates to the field of electric energy metering chips, the electric meter sampling filter chip comprises a programmable anti-aliasing filter module, a digital control and interface module and a cooperative control unit, through binary weighted control of a switched capacitor array, the cut-off frequency can be dynamically adjusted within the range of 1 kHz to 100 kHz, and the cut-off frequency can be adjusted within the range of 1 kHz to 100 kHz. Switching of a Bessel mode, a Butterworth mode and a Chebyshev mode is physically achieved by reconstructing a feedback network, a programmable AAF, an ADC, control logic and a digital interface are integrated into a single chip, and the number of external elements such as an RC network and an operational amplifier is reduced; aDC sampling data is analyzed through FFT, the signal-to-noise ratio is calculated in real time, the filter mode is automatically switched, a hardware interrupt pin triggers notification after configuration is completed, MCU polling is replaced, and frequency response is ensured to be accurate and controllable through laser trimming of a switched capacitor array.

The invention discloses endoscope host equipment with multiple matched handles, which comprises an interface module and a signal processing system, the interface module is constructed as an MXM interface and is used for receiving image data acquired by a handle image sensor, and the interface module comprises a digital interface and an analog interface which are respectively used for connecting a digital signal line and an analog signal line. The signal processing system is connected to the interface module and comprises an analog-to-digital converter, a synchronous FIFO module, a row cache module and an output port. Wherein the analog-to-digital converter is connected to the analog interface and is used for receiving an analog signal and converting the analog signal into a digital signal; the synchronous FIFO module is connected to the analog-to-digital converter and the digital interface and is used for receiving digital signals and realizing data buffering; the line cache module is connected to the synchronous FIFO module and is used for rearranging the image data to form the image data in the RAWData format and caching the image data; and the output port is connected to the line cache module and is used for outputting the digital signal.

A gesture-based control system utilizes real-time camera input and artificial intelligence to interpret user hand gestures for controlling a digital interface. The system includes a camera and processor configured to analyze image data using machine learning models trained on a diverse set of stored hand gesture representations. Gestures are recognized based on positional attributes, handedness, and motion vectors, and are mapped to input commands such as swipe left, right, up, or down. The system is designed for simplicity, using natural, intuitive gestures, such as swiping, thumbs up, thumbs down, and the “OK” sign, requiring no memorization or complex training. These familiar motions enable touch-free navigation and interaction with digital content, including support for hierarchical menu structures. The system can operate with or without visual gesture feedback. Methods and non-transitory computer-readable media are also disclosed for performing gesture detection and command execution.

The present inventive concepts comprise a connected, intelligent transfer switch system that permits remote metering, monitoring and control of energy sources connected to a device both by hardwired and wireless connection, and the method for operating this system is disclosed. The inventive concepts represent a significant improvement upon existing transfer switch systems by incorporating advanced monitoring and control capabilities of all energy resources connected to a building, such as fossil-fuel powered generators, battery storage systems, solar photovoltaic arrays, wind turbines, utility grid connections, controllable loads, or other technologies which generate, store or consume energy. The inventive concepts further provide means for flexible and intelligent operation of these resources through a dedicated network communication connection which enables advanced operational decision-making to determine optimal switching actions and real-time interaction through user-facing digital interfaces.

Interface and mode selection for digital action execution is provided. For example, a system loads a script library embedded in an electronic resource. The system determines a historic level of engagement between a client computing device and one or more digital assistants. The system selects, based on a first property of the client computing device and the historic level of engagement, a type of digital interface. The system generates, based on the type of digital interface, a digital interface with the call-to-action. The system determines, responsive to an instruction to execute the call-to-action, a mode of execution. The system selects a digital assistant and a second client device to execute the call-to-action. The system transmits the call-to-action to the second client device for execution.

The invention relates to a system 10 for conducting a sales mechanism over the internet in accordance with an embodiment of the invention. The system 10 comprises a sales platform 18 for vendors of items such as a real estate property, sales facilitators 16 to administer the sales mechanism, and buyers (also referred to as bidders 14) to interact for selling and buying the items offered for sale. The description to follow will refer to a particular application of the sales mechanism for offering for sale a real estate property; however, the sales mechanism may be utilised for offering for sale any tangible or intangible item that is able to be sold.

The invention discloses a point cloud digital service system and method based on digital twinning, and belongs to the field of digital twinning, and the system comprises an entity model construction module, a fusion updating module, a semantic segmentation labeling module, a digital interface construction module and a feedback optimization module. By constructing the user interaction behavior portrait and the service calling feature vector, accurate modeling of different user use preferences and model operation modes is realized, a point cloud processing algorithm can be differentially optimized according to individual requirements, and the processing precision and the user experience are remarkably improved. A federated learning mechanism is introduced, each edge device completes training and parameter updating of a point cloud processing model locally, only the model weight difference is uploaded, and original user data is not involved, so that cross-terminal joint optimization is realized while privacy security is guaranteed.

A LED matrix driving system has a micro controller with a first digital interface for providing a data write transaction pack and a monolithic integrated circuit switch device including a first terminal for receiving a power supply voltage, M scan terminals, a second digital interface and M power switches. The M scan terminals are respectively coupled to M scan lines of the LED matrix. The second digital interface is connected the first digital interface to receive the date write transaction pack. The date write transaction pack has M switch control codes for determining M switch control signals. The M power switches are connected to the M scan terminals respectively. In response to the M switch control signals, the M power switches are controlled to be turned on successively to control the LEDs of the M scan lines ON successively row by row.

The invention discloses a high-integration-level miniaturized TMR magnetic field sensor and a use method thereof, relates to the technical field of electrical equipment measurement, and solves the problems that most existing TMR sensors in the prior art are discrete devices, the system integration level is low, and the noise immunity and the stability are not high in an electric power environment with high-frequency signals and strong electromagnetic interference. The TMR magneto-sensitive unit, the signal conditioning circuit and the analog / digital interface are highly integrated in the same package, and the size of the sensor is remarkably reduced while high sensitivity and broadband response are kept. Besides, by optimizing the magnetoelectric structure design and the signal chain topology, background noise and bias drift are reduced, the measurement precision is improved, and the method is particularly suitable for high-density layout, complex electromagnetic environments and high-bandwidth measurement scenes. According to the invention, a better current measurement solution is provided for novel power systems such as a smart power grid, a modular power electronic device and a distributed energy system.

A motion-sensing personalized airflow device is provided. The device is comprised of a heating and / or cooling element and a mount that allows a motor to articulate the element. The device is also comprised of a sensor that detects movement to direct airflow appropriately to maintain comfort levels based on a user's specific location within a room. Furthermore, the device may be equipped with a removable fragrance insert, which can be housed in a compartment to emit scents. Control over the device is facilitated through various physical or digital interfaces, allowing adjustments to fan speed, temperature, and motion sensitivity.

A drive-thru system is provided on golf courses and / or communities where riders of golf carts or similar vehicles can drive into and through a structure including food, beverages and / or merchandise for purchase. The system comprises a structure such as a shack with a drive-thru lane. The structure may include shelves, refrigerated coolers, vending machines, service counters and / or automated delivery systems on one or both sides of the drive-thru lane. Golfers can drive into the structure in their golf cart, and select items manually or through digital interfaces and automated systems. Safety features prevent cart collisions, while automated ordering and payment systems streamline transactions.

Aspects relate to mechanisms for dynamically selecting an RF interface between an RF subsystem (e.g., including an RFFE) and a modem subsystem. A wireless device (e.g., a UE) may include both an analog interface and a digital interface and may dynamically switch between the analog interface and the digital interface based on at least a throughput state of the modem subsystem.

A Fully Analog STate-Space Compute-In-Memory (FAST-CIM) architecture implements cascaded CIM arrays that maintain continuous analog signal flow throughout neural network computations. Sequential data patches are processed through cascaded CIM arrays, where a feedforward CIM array performs initial vector-matrix multiplication using analog computations within memory cells, and the analog output flows directly through a gain circuit to a recurrent CIM array without digital conversion. The gain circuit converts analog current signals to voltage signals, enabling direct analog connection between the cascaded arrays. The recurrent CIM array executes State-Space Model (SSM) computations, processing the cascaded analog signals along with previous state information maintained by a State Write and Propagate (SWAP) circuit that stores states using capacitive elements. The cascaded array configuration eliminates analog-to-digital and digital-to-analog converters between processing stages, achieving reduced power consumption and latency compared to conventional implementations that require digital interfaces between CIM arrays.

The invention relates to a single clock display driver. Aspects of the specification provide a circuit (100). In at least some examples, a circuit includes a driver (104A). The driver includes a phase locked loop (108A) and a digital interface (105A). The phase-locked loop is configured to receive a first clock signal and provide a second clock signal based on the first clock signal. The digital interface is configured to receive a first clock signal, receive data from a data frame at successive rising and falling edge transitions of the first clock signal, extract a portion of the data frame addressed to the driver from the data frame, and provide a remaining portion of the data frame after the portion of the extracted data frame addressed to the driver.

A noise suppression circuit is provided. The noise suppression circuit is provided between a transmission interface and a receiving interface. In particular, the transmission interface includes a digital interface, a power transmission interface, or a combination thereof. The noise suppression circuit includes a first noise suppression component and a second noise suppression component. The second noise suppression component is connected to the first noise suppression component through a phase adjusting component. Some signals on the transmission interface are transmitted to the receiving interface through the first noise suppression component, the phase adjusting component and the second noise suppression component. As a result, interference from the transmission interface to the receiving interface is suppressed.

The present invention relates to the field of direct current (DC) transmission control technology, and discloses a device and method for inter-station communication in a series multi-terminal DC incomplete pole converter station. The device comprises: a first pole control host module, a first digital interface selection module, and a first optical communication maintenance interface module, configured at the first pole of a first incomplete pole converter station; a second pole control host module, a second digital interface selection module, and a second optical communication maintenance interface module, configured at the second pole of the first incomplete pole converter station; a third pole control host module, a third digital interface selection module, and a third optical communication maintenance interface module, configured at the first pole of the second incomplete pole converter station; and a fourth pole control host module, a fourth digital interface selection module, and a fourth optical communication maintenance interface module, configured at the second pole of the second incomplete pole converter station. The present invention can achieve high-capacity and rapid communication between pole control hosts of two incomplete pole converter stations in a series multi-terminal ultra-high voltage DC system.

The utility model relates to the technical field of integrated circuit testing, and particularly discloses an integrated circuit experiment testing device which comprises a shell. A microcontroller, and a digital oscilloscope, a function generator, a digital logic analyzer, a pattern generator, a virtual digital I / O interface, a front PCB panel and a plurality of test interfaces which are electrically connected with the microcontroller are arranged in the shell; the front end of the shell is provided with a voltage acquisition interface, a current acquisition interface, a display screen and a plurality of voltage output ports which are electrically connected with the front PCB panel, the bottom of the shell is provided with an air inlet, a cooling fan is arranged above the air inlet, and the middle part of the shell is provided with a middle air outlet. According to the utility model, a plurality of instruments and meters are integrated to carry out experimental testing, so that the device is convenient to operate and overhaul, smaller in size and small in occupied space, meets the requirement of carrying out rapid testing in a limited space, and is suitable for design, simulation, manufacturing and testing of integrated circuits and related experimental teaching and scientific research activities.

A system and a method for data protection assessment using threat modelling and adaptive optimization is disclosed. The system (100) comprising a processor (105) and memory (110) with instructions to receive a data access request (345) from entities (120) via authenticated digital interface (125) including structured and unstructured data categories (350), metadata parameters (355), initiating contextual analysis to establish baseline compliance parameters (360). The system analyses data category and metadata using adaptive classification logic and correlation metrics across stored data lineage, distinguishing privacy -critical from non- sensitive data. Threat modelling (130) evaluates correlations among privacy attributes (365), metadata, operational parameters, and regulatory requirements to identify vulnerabilities (375) and exposure points. A composite risk index (135) is derived, forming a structured risk profile (140) with quantified scores (380). Compliance recommendations (150) are generated, safeguard parameters (155) are derived, authorization validated by a compliance authority (160), and a compliance trace (388) is recorded.

A semiconductor device and a communication method between semiconductor devices are provided. The semiconductor device includes a plurality of pins, semiconductor components and a scalable digital interface circuit. The pins are divided into a plurality of data sending groups and plurality of data receiving groups. The semiconductor components provide output data and receive input data. The scalable digital interface circuit is coupled to the data sending groups, the data receiving groups and semiconductor components, wherein the scalable digital interface circuit reorganizes the output data into parallel transmission data to send the parallel transmission data to an external semiconductor device by parallel transmission, and receives parallel reception data from the external semiconductor device by parallel transmission to reorganize the parallel reception data into the input data.