8 results about "Software simulator" patented technology

The invention discloses a method and system for verifying an RISC-V processor and a computer readable storage medium. The method comprises the following steps: analyzing an RISC-V official manual and a micro-architecture user manual, and generating a static instruction-resource mapping table; and generating a first test instruction sequence for each instruction in the static instruction-resource mapping table, executing the first test instruction sequence by using an RISC-V processor simulation model constructed by a software simulator, and dynamically calibrating the static instruction-resource mapping table in the execution process. And traversing the instruction and resource mapping relationship in the calibrated static instruction-resource mapping table, analyzing RISC-V processor verification logic, and if a conflict is found, outputting a conflict report so as to complete defect repair before RTL code writing. According to the application, hardware behaviors can be accurately associated, the problem of disjunction of semantics and micro-architecture is solved, and conflict prediction in an architecture design stage and end-to-end automatic verification from instruction semantics to micro-architecture behaviors are realized.

The application relates to the technical field of low-voltage intelligent power distribution, and provides a virtual development platform for source network load storage interaction of a transformer area, which comprises a computer, a transformer area intelligent fusion terminal, and the computer is in communication connection with the transformer area intelligent fusion terminal; the computer comprises a main frame module and a software simulator module, and the transformer area intelligent fusion terminal comprises a virtual working condition service module, a data center module and an acquisition module; the whole simulation development platform is formed by using the semi-physical mode, the physical transformer area intelligent fusion terminal and the virtual transformer area equipment, and the high development cost accompanied by full virtual simulation and the high equipment cost of full physical simulation are avoided.

The invention discloses a user interface testing method, system and device and a medium, and relates to the technical field of computer testing, and the method comprises the steps that to-be-tested embedded software in a testing request is loaded and operated in a preset software simulator; driving the preset test script to execute a test operation through the preset programmed interface, traversing the user interface and capturing a test image; comparing the test image with a reference image of a corresponding version in a preset reference image library through a structural similarity index algorithm and based on the software version information to obtain a similarity score; if the similarity score is smaller than a preset score threshold value, performing optical character recognition on the difference image, and obtaining text content and corresponding position coordinate information in the difference image; and verifying the position coordinate information based on a preset image layout integrity rule to obtain a defect type of the difference image, and generating a diagnosis report containing the defect type and the position coordinate information. And efficient testing is realized.

The application belongs to the technical field of integrated circuits, and particularly relates to a software and hardware joint simulation platform for processor chip architecture verification. The software and hardware joint simulation platform is an architecture crossing hardware and software; the software part comprises a scheduling module, a submission module, an acquisition module, an execution task table and four annular lock-free queues; the hardware part comprises a data packet preprocessing module, a signal conversion module and two queues. The simulation platform adopts a parallel simulation form of a software simulator and hardware FPGA, simplifies a traditional development process, and allows a hardware core module to directly and cooperatively simulate a software simulated processor chip. The software simulated processor chip can directly provide a real test environment for the hardware core and has rapid simulation capability, thereby improving the integration efficiency of a newly developed or iterated hardware core module in an existing large-scale processor chip.

This invention relates to the field of computer simulation technology, specifically to a simulation system for simulating a communication baseband system. The system includes: a communication software simulator that generates a virtual operating system in which the communication software under test runs; a communication algorithm simulator that incorporates a virtual accelerator chip for performing calculations on the tasks to be processed by the communication software under test; and a driver adaptation module connected to both the communication software simulator and the communication algorithm simulator. The advantage is that during the process of the communication software simulator and the communication algorithm simulator outputting corresponding data to the other end, the system automatically acquires the corresponding data and converts it between parameter definitions and register definitions before transmitting it to the other end for processing. This process is automatically handled by the driver adaptation module, which automatically acquires the definitions and generates the corresponding interfaces, eliminating the need for additional code and reducing development costs.

A method is provided for identifying a data transfer mismatch between a sender and a receiver from among units of a software simulator of a hardware processor. The simulator runs the plurality of the units which communicate with each other via First-In First-Outs (FIFOs). The method counts amounts of data the sender writes to the FIFOs and the receiver reads from the FIFOs for a given data transfer. The method avoids blocking during FIFO reading and writing operations by (i) reading dummy data by the receiver, even if the FIFOs are empty, when the receiver tries reading from the FIFOs, and (ii) discarding written data if the FIFOs are full, when the sender tries writing to the FIFOs. The method identifies mismatches in the amount of data the sender writes to the FIFOs versus the amount of data the receiver reads from the FIFOs for the given data transfer.

The invention relates to a deep learning acceleration core, in particular to a front-end simulation system and method for the deep learning acceleration core, and a decoding module, which decodes an external test set according to different requirements of software and hardware platforms; the hardware field recovery module is used for determining a hardware simulation starting point according to parameters input by a user, and recovering a hardware simulation field to an initialized state when full-process simulation needs to be carried out; when simulation needs to be started from the synchronization point of the sync instruction, a hardware simulation site is recovered to a position close to the sync instruction; the hardware simulation result output module is used for outputting the type of the current instruction and the corresponding program counting PC to a screen in real time when hardware simulation is carried out, and outputting a hardware simulation result; the software simulator and the result processing module are used for carrying out parameter configuration on the software simulator and outputting a software simulation result; according to the technical scheme provided by the invention, the defects of low efficiency and difficulty in quickly positioning error instructions in the prior art can be effectively overcome.

Systems, devices, software, and methods of the present invention enable frequency-based signal power analyses in software suitable for signal with either stationary or non-stationary spectrums. The methods that may be used throughout various systems including transmitters receivers, repeater, controllers, monitors, etc. and in software simulators to enable various signal power calculations and analyses, such as frequency spectrum analysis, throughout operating systems and that may be consistently applied in system design and operation simulations in a wide range of applications, such as medical data analysis, interference and spectrum monitoring or clearance, object tracking, transmission channel and noise analyses, radiated power analysis, signal boundary interference, satellite downlink signal identification, pulsed radar monitoring, audio detection and identification, lidar systems, sonar systems, medically active decision sensors to monitor but not limited to; EEG, ECG, pulse rate, inhaled gases, hazardous material and chemically charged environment, etc.