53 results about "Software debugging" patented technology

Methods, systems, and computer-readable storage media for a software debugging system that leverages a LLM in combination with an entity matching model to propose solutions for mitigating errors. In some examples, the LLM is used to generate embeddings that are used to identify two or more matched historical errors. The matched historical errors are potential matches to a current error that needs to be resolved. The entity matching model is used to determine a matched historical error from the two or more matched historical errors. The LLM is also used to generate a proposed solution to the current error based on a historical solution to the matched historical error. The proposed solution can be executed to resolve the current error.

The invention provides a power distribution automation terminal debugging system and method based on an IEC104 protocol, and the method comprises the steps: inputting an IP address, a port number and a channel address of a device as parameters after a manufacturer selection module selects a manufacturer name, transmitting IEC104 message data information through a message communication module, a message sending module and a message receiving module, and transmitting the IEC104 message data information to a power distribution automation terminal. An IEC104 message is analyzed through a man-machine interaction interface, the original message and the message meaning represented by each byte of each original message are displayed through the man-machine interaction interface, finally, an information value in the analyzed IEC104 message corresponds to a substation point table, and real-time feedback and display of data are achieved. And meanwhile, a debugging log is recorded. And the method is adaptive to a plurality of manufacturers, so that the same software is used to debug terminal equipment of different manufacturers. The problem that multiple sets of software are used when a user debugs multiple manufacturer devices is solved, and the daily working efficiency is improved.

A non-transitory computer readable medium is provided comprising instructions that when executed on a processor load a software program into a software debugger for execution on an emulated processor representing a processor portion of a system on chip (SoC), load a hardware design into a hardware simulator representing a programmable gate array portion of the SoC, coordinate execution of software debugger and hardware simulator to simulate operation of the SoC, communicate data between the software debugger and the hardware simulator, and display computed results and current values.

The invention provides a computer network security software debugging method and system, and the method comprises the steps: setting a plurality of test nodes of a source program in target network security software, and positioning a key test node based on the execution state of each test node; constructing a target search domain when the source program is tested through the program context information of the key test node; determining a plurality of abnormal program slices in the source program based on the static control flow diagram and the dynamic control flow diagram of the program code in the target search domain; determining the test overhead of each program slice according to the test coverage information of each program slice and the path complexity when the source program executes the test data; determining the constraint level of each program slice according to all the test overhead and the membership relationship among the program slices; and debugging each program slice through the constraint level of each program slice. According to the scheme, on the basis of the constraint level of each program slice, the problem code line can be accurately pointed in the network security software debugging process.

The invention discloses an embedded SoC-level real-time monitoring and analyzing device. The embedded SoC-level real-time monitoring and analyzing device is composed of a bus comparator, a system event counter and a control register set. The bus comparator collects access signals of an address bus, a data bus and an instruction bus in real time, compares the access signals with a preset matching rule, generates a trigger signal for driving the event state register to record and output an interrupt signal or a debugging signal during matching, and takes the trigger signal as an input event of the system event counter; the system event counter monitors various events generated in the operation process, and when the monitoring result is equal to a preset reference value, a trigger signal is generated; and the control register group configures the matching condition of the bus comparator, sets the counting mode of the system event counter, and reads the comparison state, the event counting result and related monitoring information through the bus interface. According to the method, a configurable event capture mechanism and multiple counting modes are introduced in a hardware level, so that the dependence on software debugging is reduced, and the real-time performance of monitoring and analysis is improved.

The invention provides an automatic test method and system for heterogeneous process verification and system software debugging, and relates to the technical field of software debugging, and the method comprises the steps: collecting and producing holographic monitoring data, and carrying out semantic annotation through a preset ontology model; a multi-head attention mechanism and a graph neural network are adopted to train an ontology model, and associated features of process parameters, equipment states and defect types are extracted; constructing an initial knowledge graph based on the features, and calculating a node weight relationship by using causal reasoning to generate a dynamic weight matrix; and in combination with real-time process data, features are extracted and fused through a deep residual network, and defect risk assessment and early warning are realized. Through dynamic updating and feature fusion of the knowledge graph, the accuracy and automation degree of heterogeneous process verification are improved, and intelligent early warning of process quality is realized.

Methods, systems, and computer-readable storage media for a software debugging system that leverages a LLM in combination with an entity matching model to propose solutions for mitigating errors. In some examples, the LLM is used to generate embeddings that are used to identify two or more matched historical errors. The matched historical errors are potential matches to a current error that needs to be resolved. The entity matching model is used to determine a matched historical error from the two or more matched historical errors. The LLM is also used to generate a proposed solution to the current error based on a historical solution to the matched historical error. The proposed solution can be executed to resolve the current error.

The embodiment of the invention provides a software debugging method and device, electronic equipment and a readable medium, and relates to the technical field of computers, in the method, based on a current instruction of debugged software, a target instruction corresponding to a next instruction address of the current instruction is determined. And replacing the target instruction with the breakpoint instruction, and after the current instruction is executed, executing the breakpoint instruction to trigger breakpoint abnormity. And in response to the breakpoint exception, pausing the execution operation on the debugged software. And displaying a debugging interaction interface corresponding to the debugged software. Therefore, after the current instruction is executed, the execution operation on the debugged software can be paused, and the debugging interaction interface is displayed, so that single-step debugging on the debugged software is realized. When the scheme is used, aiming at the debugged software adaptive to different processor architectures, the breakpoint instruction supported by the architecture adaptive to the debugged software is adopted, so that single-step debugging aiming at the debugged software can be realized, and the universality of the software debugging method is ensured.

The invention discloses an automatic variability analysis method for a configurable software system, which relates to the technical field of software debugging and analysis, and comprises the following steps of: importing and analyzing a source code, constructing a code attribute graph, and dividing nodes in the code attribute graph into command nodes or statement nodes; analyzing the command node, constructing a feature expression and determining an existence condition; searching all initial nodes and respectively carrying out depth traversal; during traversal, searching the nearest command node in the front nodes as a father node for the current node; updating existence conditions of the current nodes of different types; analyzing and searching seed nodes and seed statements thereof; performing slice analysis on the seed statement, searching an associated program statement, and obtaining a corresponding statement node to obtain a node group; and logic and operation of existence conditions are carried out on all nodes in the node group, a feature interaction expression is finally obtained, and the possible internal feature interaction combination condition in the configurable software system can be efficiently reflected.

This application relates to a software debugging method, apparatus, electronic device, and storage medium for vehicles. The autonomous driving system includes a debugging function switch. The method includes: detecting the actual state of the debugging function switch and the type of the module to be debugged; when the debugging function switch is detected to be in the on state, compressing the debugging data of the module to be debugged according to a preset compression rule to obtain the current compressed data of the module to be debugged; determining the target transmission method of the current compressed data based on the type of the module to be debugged, and transmitting the current compressed data to a target debugging device according to the target transmission method, so that the target debugging device can re-debug the module to be debugged based on the current compressed data. This application can achieve the calibration and debugging of autonomous driving software modules through a developed application without adding additional hardware, thereby improving the efficiency of autonomous driving software development.

The embodiment of the invention discloses a data sampling processing method of a DSP (Digital Signal Processor) chip, a computer program product and terminal equipment. The data sampling processing method of the DSP chip comprises the following steps: controlling the DSP chip to run software to be debugged; in the running process of the to-be-debugged software, running data of the DSP chip in the multiple sampling periods are collected, and the running data in the multiple sampling periods are cached; wherein the plurality of sampling periods are sequentially arranged according to a time sequence, and the operation data of any sampling period are synchronously collected for a plurality of indexes; under the condition that the sending requirement is met, packaging the operation data in a plurality of sampling periods into a data frame, and sending the data frame to an upper computer; wherein the sending requirement comprises that the data volume of the packaged operation data in the plurality of sampling periods is smaller than or equal to the maximum effective data volume of single frame transmission corresponding to the sending mode. According to the method and the device, the technical problem that the DSP software debugging effect is affected due to the fact that the DSP chip data sampling effect is poor in the prior art is solved.

The application relates to the technical field of vehicle terminal software debugging, in particular to a test method and device based on DDS communication, test equipment and a storage medium, wherein the method comprises the following steps: obtaining a test request of a tested device; running a test script according to the test request, starting a simulation client or a simulation server by using the test script, calling a data distribution service (DDS) by using the simulation client or the simulation server to communicate with the tested device, and simulating the calling of a target service function on the tested device; if it is detected that an execution result of the target service function on the tested device meets preset qualified conditions, it is determined that the DDS communication test of the tested device is qualified, otherwise, it is determined that the DDS communication test of the tested device is unqualified. Therefore, the problems of application limitations and the like caused by the fact that, in the related art, a traditional communication test equipment is improved but cannot realize the communication test of cross-domain equipment based on the DDS communication are solved.

The invention provides a software debugging method and device, equipment, a storage medium and a program product, and relates to the field of computers. The method comprises the following steps: the electronic equipment can judge whether a debugging operation condition is met at the current moment; if satisfied, the electronic device may generate a run signal. The electronic device may wake up the first program module in response to the run signal. The awakened first program module quits the to-be-operated state and enters the operation state. The electronic equipment can obtain the second program module when the first program module finishes running. The second program module can be a program module following the first program module in the target program. The electronic device can set the state of the second program module as a to-be-run state. According to the method, the debugging flexibility of the program module of the target program is improved.

The application provides a computer network security software debugging method and system. A plurality of test nodes of a source program in target network security software are set, a key test node is located based on an execution state at each test node, and a target search domain when the source program is tested is constructed by program context information of the key test node. A plurality of program slices with abnormalities in the source program are determined based on a static control flow graph and a dynamic control flow graph of program code in the target search domain. Test overhead of each program slice is determined according to test coverage information of each program slice and path complexity when the source program is tested. Constraint levels of each program slice are determined according to all test overhead and membership between each program slice. Each program slice is debugged through the constraint level of each program slice. The above scheme can accurately point to a problem code line in a network security software debugging process based on constraint levels of each program slice.

The invention discloses an embedded USMART serial port debugging method and system, and the method comprises the steps: obtaining a to-be-recognized function and parameters inputted by a user, and carrying out the information extraction of the to-be-recognized function, so as to obtain a first function name corresponding to the to-be-recognized function; performing byte comparison on the first function name and a plurality of second function names stored in a preset to-be-tested database one by one so as to match a target function name; extracting a function corresponding to the target function name from the database to be tested, and performing in-parameter compliance check on the function to obtain a pointer of the function; transmitting a parameter input by the user to a function pointed by the pointer to extract a return value executed by the function; and feeding back a returned value of function execution obtained by debugging and a debugging process to the terminal. According to the embedded USMART serial port debugging method and system, transplantation of programs on different chips is achieved, repeated work is reduced, and the software debugging efficiency and quality are improved.

The invention belongs to the technical field of software debugging, and particularly relates to a software debugging method, a controller, an upper computer and a system. The software debugging method comprises the following steps: receiving a trigger source-action pair; when the trigger source-action pair contains the self-defined trigger source-action pair, temporarily storing the self-defined trigger source-action pair in the random access memory; the user-defined trigger source-action pair comprises a user-defined trigger condition and a user-defined action type, and correspondingly comprises a user-defined trigger condition code and a user-defined action code; when a trigger condition in the trigger source is established, executing a corresponding action code; and feeding back an execution result. The software debugging system comprises a controller and an upper computer, and the upper computer is connected with the controller through a communication interface except for a JTAG interface. The method gets rid of dependence on a JTAG interface, covers troubleshooting of a whole life cycle, and adapts to troubleshooting requirements of endless new fault problems by dynamically loading a user-defined trigger source-action pair.

The embodiment of the invention discloses a multi-clock domain chip debugging method and device, electronic equipment, a medium and a program, and the method comprises the steps: monitoring the current data state of debugging data of each target to-be-debugged chip in real time; under the condition that it is determined that the debugging data meet at least one piece of cross debugging signal triggering configuration information according to the current data state of each piece of debugging data, the debugging data of a target clock domain are sent to an upper computer for software debugging; wherein the cross debugging signal triggering configuration information is generated by debugging output data configuration of a plurality of different clock domains. According to the technical scheme of the embodiment of the invention, asynchronous capture of debugging signals of multiple clock domains can be supported, so that the debugging efficiency of a multi-clock domain chip is improved.

This invention discloses an embedded SoC-level real-time monitoring and analysis device, comprising a bus comparator, a system event counter, and a control register set. The bus comparator acquires access signals from the address bus, data bus, and instruction bus in real time and compares them with preset matching rules. Upon matching, it generates a trigger signal to drive the event status register to record, output interrupt signals, or debug signals, and serves as the input event for the system event counter. The system event counter monitors various events generated during operation, and generates a trigger signal when the monitoring result equals a preset reference value. The control register set configures the matching conditions of the bus comparator, sets the counting mode of the system event counter, and reads the comparison status, event counting results, and related monitoring information through the bus interface. This invention introduces a configurable event capture mechanism and multiple counting modes at the hardware level, reducing reliance on software debugging and improving the real-time performance of monitoring and analysis.

This invention provides an interactive software debugging and automatic repair method based on a large language model, addressing the problems of traditional software debugging relying on manual operation and being time-consuming, as well as the low repair accuracy caused by the lack of a dynamic operating environment in existing static automatic program repair technologies. The method first triggers a program exception by executing a reproduction command and captures the original crash stack information; then, it uses a large model to extract a simplified core function call sequence; subsequently, it constructs a closed-loop debugging mechanism, controlling the large model to generate hypotheses about the root cause of the defect and executing debugger probe commands, iteratively revising the hypotheses based on the dynamic information obtained by the debugger until the defective code is accurately located; finally, it combines the debugging context with the large model to complete root cause analysis and automatically generate and verify executable repair patches. This invention alleviates the "illusion" of large model inference by continuously capturing the underlying dynamic operating state, significantly improving the automation and accuracy of defect repair.

The invention provides a software debugging method, and belongs to the technical field of software debugging, and the software debugging method comprises the steps: transmitting a debugging parameter to an intelligent driving domain controller through a release template function; receiving debugging data transmitted by the intelligent driving domain controller by using a subscription template function; and displaying the change of the debugging data. The unified packaging mechanism is called through the publishing template function and the subscribing template function, rapid data publishing and subscribing are achieved, and debugging data can be issued in real time while the controller is observed online.

The invention provides a software debugging method and device and a computer program product, and relates to the field of computer software development. The software debugging method comprises the steps of determining a current call stack corresponding to a currently executed function block based on a stack entering instruction added at a starting position of the function block; judging whether a target breakpoint is triggered or not according to the current call stack and the target breakpoint information; wherein the target breakpoint is used for debugging a software program; and if the target breakpoint is triggered, running the software program according to the operation state of the target breakpoint. According to the software debugging method, whether the breakpoint needs to be triggered or not is checked in periodic running of the program, and the breakpoint is triggered under specific conditions, so that intervention of a debugger on a real-time task is reduced, and the influence of debugging on task scheduling is reduced to a great extent.

The present application belongs to the technical field of software debugging, and relates to a virtual debugging method for an ultrasonic roll welding machine, which comprises the following steps: three-dimensional model establishment, digital twin construction, virtual control design, glass conveying simulation, alignment state simulation, down-pressing test and roll welding process test. The virtual debugging method can take into account the various parameters involved in glass conveying, glass alignment, roll welding wheel down-pressing and roll welding process, and realizes virtual debugging of the ultrasonic roll welding machine in the form of joint simulation. Through the establishment of digital twins, true simulation is carried out, and theoretical analysis and finite element method analysis are carried out, which not only ensures real-time performance but also achieves high accuracy.

The invention belongs to the technical field of communication, and particularly relates to a debugging system based on SCA waveform development. According to the method, the user logic implementation code is extracted from the framework code of the user component and independently compiled to form the application program, and single-step debugging is performed through the software debugger, so that developers can freely perform single-step debugging on the user logic implementation code in the debugging process, limitation of an external library is avoided, and the debugging efficiency is improved. And moreover, the convenience and efficiency of SCA waveform transplantation and component development and debugging are improved, so that developers can better debug and verify the functions of the components.

The invention relates to the technical field of software debugging, in particular to a small game debugging method and device and electronic equipment, and is used for solving the problem of how to efficiently debug. The method comprises the following steps: running a script of software to be debugged through a target kernel under the condition that communication connection with second electronic equipment running an integrated development environment is established through a public network room service server; the server receives first information sent by an integrated development environment through a public network room service server; analyzing the first information to obtain a debugging result corresponding to the service identifier; and debugging information carrying the to-be-debugged result is sent to the integrated development environment through the public network room service server.

The present application relates to the technical field of database software debugging, more particularly to a database configuration parameter optimization method and system based on a large language model and deep reinforcement learning.The present application comprises: step one, obtaining the optimization source information of the target database software; step two, processing the optimization source information through a large language model; then using the question and answer method, obtaining the recommended parameter value returned by the large language model and arranging it into a parameter binary table; step three, testing the target database software according to the parameter binary table to obtain an initial transition data sequence; step four, training a DDPG for demonstration model based on the initial transition data sequence; after the DDPG for demonstration model converges, outputting the final parameter value.The present application integrates expert experience into the process of reinforcement learning, providing a feasible solution to reduce the cost of optimization and improve the accuracy of optimization as much as possible.

A non-transitory computer readable medium is provided comprising instructions that when executed on a processor load a software program into a software debugger for execution on an emulated processor representing a processor portion of a system on chip (SoC), load a hardware design into a hardware simulator representing a programmable gate array portion of the SoC, coordinate execution of software debugger and hardware simulator to simulate operation of the SoC, communicate data between the software debugger and the hardware simulator, and display computed results and current values.

An operating method of a software debugging benchmark system includes: monitoring pull requests (PRs) created in a project and identifying, in a PR identified by the monitoring, a commit that adds a source code change and test code; determining whether the commit is a potential failure benchmark component by applying predetermined criteria to the commit; based on determining that the commit is a potential failure benchmark component, verifying, in a virtual environment, whether the commit has fixed an actual failure; and based on the verifying, storing a failure PR corresponding to the commit in a database as a failure detection test and failure fix commit.

The invention relates to a software code debugging technology, discloses a method for software debugging by using a code template technology, and aims to solve the problems that a software debugging tool supports too few programming languages and is not uniform in debugging means. Code templates are respectively adapted to different high-level languages for debugging, so that the supported programming languages are dozens of types, a unified debugging means is provided for the debugging of each programming language, breakpoints can be lowered, detailed code tracks can be output, so that collapse, crash and logic errors can be easily and accurately positioned, different assignments of variables can be completely recorded, code resource management can be tracked, and the debugging efficiency is improved. According to the method, time consumption statistics can be conducted on each line of codes, a unified debugging means can be provided for a single-chip microcomputer, an operating system kernel, a driver, an embedded type and the like through serial port terminals, numerous programming languages are supported, a unified debugging means is provided for debugging of the programming languages, and the software debugging technology is enriched.

The invention relates to the technical field of vehicle control, and provides an embedded software debugging method and device, electronic equipment and a storage medium. According to the method, under the condition that a debugging device is connected with a microcontroller unit of a vehicle, communication connection with debugging equipment is established through a wireless network, and embedded software to be debugged is arranged in the microcontroller unit; receiving a debugging request which is sent by debugging equipment and aims at the embedded software, and analyzing the debugging request to obtain a debugging protocol instruction message; according to the method, debugging personnel can directly send the debugging request to the debugging device through the debugging equipment at the far end to debug the embedded software, the method is not limited by the environment where the microcontroller unit of the vehicle is located, and the debugging efficiency is improved. Therefore, the debugging of the embedded software in the microcontroller unit is not limited by the environment any more.

A processor automatic test control platform, control method, and operation method are described. The processor automatic test control platform comprises a host computer and a chip function test board. The host computer includes screen-controlled processor full-function batch automatic test host computer software, debugger connection software C-SkyDebugServer, and download debugging software CDK. The chip function test board includes a single-chip microcomputer, the processor to be tested, and an FPGA. This invention overcomes processor memory limitations, enabling complex full-function batch automatic testing, effectively reducing time costs and significantly improving testing efficiency. It can also be extended to other processors with limited memory, demonstrating its strong practicality.