1027 results about "Test point" patented technology

The invention provides a titanium plate performance analysis method and system, and relates to the technical field of metal material detection.The method comprises the steps that an optical scanner is adopted to establish a three-dimensional structure on the surface of a titanium plate, and test areas are divided; synchronously acquiring stress, hardness and conductivity data of a test point by using a multi-probe collaborative detection device; constructing a dual-branch feature extraction network, wherein the dual-branch feature extraction network comprises a surface topography feature branch and a physical feature branch; performing statistical integration on the features in the test area, calculating distribution features and determining a weight coefficient; and generating a performance analysis result through feature fusion and a multi-task output layer, and finally determining the performance grade of the titanium plate. According to the method, deep fusion of morphology information and physical characteristics is realized, and the accuracy and reliability of titanium plate performance evaluation are improved.

The invention discloses an agent-based test case generation method and device, equipment and a medium, and relates to the technical field of software testing, the method comprises the following steps: in response to a test case generation instruction for a target function, displaying a test case framework of the target function; in response to an interaction instruction for a preset position in the test case framework, obtaining a target test code of the target function; wherein the interaction instruction is used for triggering interaction between a first agent and a second agent, and the first agent is configured to be used for analyzing a logic structure of a function code of a target function to obtain a structure code of a test point of the target function; the second intelligent agent is configured to be used for generating a target test code based on the structure code of the test point; and displaying the target test code at a preset position to obtain a target test case of the target function. The problem that the generation accuracy of the test case is low can be solved.

The invention discloses a test case generation method and system for security and futures software. The method comprises the following steps: converting data in an original file into an embedded vector through an information analysis agent, and storing the embedded vector in a vector database; generating an initial test case set by using the plurality of test points and the data fragments corresponding to each test point through a case generation agent; constructing a business rule atlas to perform rule similarity scoring on each test case, deleting the test cases with low scores, and forming a high-score test case set by the test cases with high scores; semantic similarity scoring is carried out according to the historical test cases, sorting is carried out according to scores from high to low to form an optimal test case set, and the test case with the highest score is marked as the historical test case to be stored in the vector database. According to the method, the test cases of the security futures software can be automatically generated, redundant cases are reduced by evaluating the test cases, the case quality is improved, the workload of testers is greatly reduced, and the test efficiency is greatly improved.

The invention belongs to the technical field of PCB flying probe detection equipment, and particularly relates to a flying probe compensation method and system based on PCB curved surface modeling, and the method comprises the steps: obtaining the size of a PCB, and carrying out the equilateral triangle grid division; in the visual alignment process, the laser distance measuring sensor is synchronously driven to carry out rapid non-contact height measurement on the vertex of the grid; based on the vertex three-dimensional coordinates, fitting triangular patches through a space plane equation and splicing the triangular patches into a three-dimensional curved surface model; performing bilinear interpolation on an area formed by adjacent patches in the model to smooth a curved surface; and finally, selecting an interpolation function according to the position of the test point to calculate the accurate height, and generating a Z-axis displacement compensation value of the probe. According to the high-precision measurement and self-adaptive compensation of the PCB warpage, the efficiency and precision of the flying probe test are considered, and the problem of poor contact or overvoltage damage of the probe caused by the board warpage is effectively solved.

The invention provides a reducer box sealing performance test method and system based on an intelligent sensor, and relates to the technical field of sealing detection, and the method comprises the steps: collecting each sealing test point; generating a primary sealing test result; building a primary sealing test platform based on the intelligent sensor, generating a primary sealing test result, carrying out factory verification based on the primary sealing test result, and calling the box simulation model and the secondary leakage variable after leaving a factory to generate a secondary leakage model; secondary leakage fitness monitoring is performed, including instantaneous fitness monitoring and cumulative fitness monitoring. The technical problem that in the prior art, due to the fact that the sealing state change of the speed reducer under the actual working condition is difficult to reflect, sealing detection is inaccurate can be solved, and intelligent detection and evolution monitoring of the sealing performance of the speed reducer in the whole process from factory leaving to service are achieved through the intelligent sensor. The technical effects of improving the sealing reliability and preventing leakage faults are achieved.

The invention provides an optical fiber sensor battery monomer integration method, an optical fiber sensor battery system and a vehicle, and the method comprises the steps: carrying out the simulation of the charging and discharging process of a battery, screening out a plurality of target test point positions from the test point positions of target battery parameters of the battery based on a simulation result, the target battery parameter is air pressure, temperature, stress or gas; determining a blank area for placing an optical fiber sensor in the battery according to each target test point, and providing a placement space for the optical fiber sensor at the blank area by using a battery monomer electrode blank process; and placing the optical fiber sensor in the placement space, and fixing the optical fiber sensor and the battery to obtain an optical fiber sensor battery monomer. By adopting the scheme, the hierarchical perception of the single battery is realized, the detection dimension is expanded, and the acquisition of internal characteristics of the battery is increased, so that the accuracy and reliability of state estimation and fault diagnosis of the lithium ion battery are improved.

The invention provides a 3D structure core particle test layout design method supporting cross-layer cascade test and single core particle self-test, and the method comprises the following steps: a, designing the test point layout of 3D stacked core particles, each layer of core particles adopting a hexagonal arrangement mode, and enabling a test PIN in one layer to be connected with six signal PINs in the same layer; and meanwhile, a vertical test channel is arranged, so that the in-layer test PIN of each layer is connected with the corresponding test PIN of the adjacent layer through a vertical interconnection structure. According to the invention, full test coverage of 3D stacking is adapted, the problem that interlayer signals are difficult to test in a 3D structure is solved through the in-layer hexagonal layout and the vertical test channel, and full-scene coverage of in-layer, interlayer and cross-core particle signals is realized.

The invention relates to the technical field of circuit board detection, and provides a circuit board damage detection optimization method and system, and the method comprises the following steps: S1, synchronously collecting a contact resistance signal, a probe pressure signal and environment data of a circuit board test point through a probe array, and carrying out the optimization processing of the collected data parameters; s2, establishing a contact impedance dynamic model, depicting the dynamic change of the contact impedance of the circuit board, extracting a characteristic signal for analysis, and mining the mode characteristics of an abnormal signal; and S3, fusing the abnormal multi-source evidences of the circuit board, processing the uncertainty and relevance among the evidences, and reversely deducing the positions and reasons of the potential defects on the circuit board. Through a multi-dimensional verification and error self-correction mechanism, the error between a defect solution and a real defect is quantified and reversely deduced by using posterior error estimation, so that the reliability and consistency of a detection result are improved, a reliable result support is provided for engineering application of circuit board damage detection, and meanwhile, the dependence on detection experience of detection personnel is avoided.

The invention discloses a hardware-in-the-loop test method and device and electronic equipment, relates to the technical field of automotive electronics, and adopts a simulated annealing algorithm in an optimization stage, adjusts parameters according to characteristics of an electronic stability control system, optimizes data distribution, and improves test data quality and fault detection capability. In the verification stage, the generated test data is subjected to actual operation test, the data problem is fed back by comparing actual output with an expected result, and the optimized test data which does not pass verification is sent to the target hardware-in-loop test model for optimization adjustment, so that a closed-loop optimization verification process is formed. The iterative closed-loop process comprehensively covers all possible working conditions and fault modes, key test points are prevented from being omitted, the reliability of the electronic stability control system is enhanced, the accuracy, effectiveness, comprehensiveness and sufficiency of hardware-in-the-loop test of the electronic stability control system are ensured, and the reliability of the electronic stability control system is improved. And the limitation of hardware-in-the-loop test of the electronic stability control system is reduced.

The invention belongs to the technical field of road engineering roadbed nondestructive testing, discloses a roadbed humidity nondestructive testing method based on wireless radio frequency signal multi-parameter inversion, and aims to solve the problems that a traditional roadbed humidity testing method is destructive, low in efficiency and discontinuous in monitoring or detection parameters are easily interfered. The method specifically comprises the following steps of: firstly, embedding an RFID tag and acquiring an on-site received signal strength indication value; then establishing a relation model of the received signal strength indication value and the roadbed moisture content, and extracting characteristic parameters only influenced by the moisture content; then, constructing a neural network model, taking the extracted characteristic parameters as input, and utilizing field data to train the model to invert the roadbed moisture content; and finally, the spatial distribution of the moisture content of the roadbed is obtained by combining the distribution of the test points and the roadbed structure information, so that the efficient, non-contact and continuous monitoring of the humidity state of the roadbed is realized.

The invention belongs to the technical field of semiconductor device performance testing, and particularly relates to a VCSEL epitaxial wafer resistivity distribution measuring method and system, and the method comprises the steps: constructing a three-dimensional discretization model representing an epitaxial wafer and an unknown parameter vector containing the vertical resistivity, the top transverse resistivity and the substrate leakage junction nonlinear resistance; a physical response function is defined, the vector is iterated through a discrete point fitting algorithm, so that the total residual error between the analog voltage difference output by the function and the actually measured voltage value under the cross-order-of-magnitude current is minimum, and the real vertical resistivity is extracted from the optimal parameter vector; and obtaining the vertical resistivity of each point on the two-dimensional test point grid so as to generate a distribution diagram and carry out anomaly detection. According to the invention, the problem of measurement distortion caused by the leakage defect of the substrate is solved, and the measurement accuracy of the vertical resistivity is improved.

The invention discloses a PCB double-sided four-flying-probe test path optimization method, and belongs to the technical field of path optimization, and the method comprises the following steps: importing double-sided PCB data containing a test network and test points; obtaining an initial matching scheme of a network internal test point corresponding to each test network through the matching strategy, and optimizing each initial matching scheme to obtain a network internal test point path; constructing an initial test sequence between test networks through a recent insertion heuristic algorithm, and then introducing a local search algorithm into an adaptive large-scale neighborhood search algorithm to carry out iterative optimization on the initial test sequence to obtain a test sequence between the networks; and combining the test point paths in the networks and the test sequence between the networks, and outputting a double-sided four-flying-probe test path. According to the PCB double-sided four-flying-probe test path optimization method, the problem that the overall moving cost is difficult to further reduce in an existing method is solved.

The invention discloses a dynamic simulation test verification method and system for a pumped storage unit monitoring system, and the method comprises the steps: building a high-dimensional system state matrix of a pumped storage unit based on the physical parameters and structural features of a hydraulic, mechanical and electrical system of the unit, carrying out the dimension reduction of the high-dimensional system state matrix, and obtaining a dynamic simulation test result of the pumped storage unit; a dynamic simulation model of unit multi-physics field coupling is obtained; constructing a multi-dimensional parameter space based on the parameter sensitivity coefficient and the working condition boundary condition of the dynamic simulation model, and calculating optimal test point distribution through a high-dimensional point flow diameter algorithm to obtain a test scene library; based on the dynamic simulation model and the test scene library, obtaining a real-time monitoring signal sequence conforming to a monitoring system communication protocol; and based on the real-time monitoring signal sequence, signal acquisition, logic judgment and alarm control functions of the monitoring system are tested through an automatic test script, and a performance evaluation result of the monitoring system is obtained. The test comprehensiveness and effectiveness of the pumped storage unit monitoring system are improved.

The utility model relates to the technical field of capacitor processing, in particular to a detection tool for capacitor processing, which comprises a supporting mechanism used for supporting the whole device, the supporting mechanism comprises a workbench and two fixing blocks, and the supporting mechanism is provided with a detection mechanism used for applying pressure to different point positions of a capacitor shell. The detection mechanism comprises two electric telescopic rods. According to the utility model, through the arrangement of the detection mechanism, the device can carry out pressure detection on a plurality of point positions of the capacitor shell, the electric telescopic rod drives the detection head a to carry out pressure detection on the upper part of the capacitor shell, and the bidirectional threaded rod drives the two side plates to move oppositely. And meanwhile, a gear is driven to rotate through a micro electrode, so that a bearing circular plate can drive the capacitor shell to rotate, thereby changing a test point position, reducing manual operation and ensuring the detection effect of the device.

Systems and Methods for capacitance testing of a unit under test with parasitic capacitance directed to a guard rail. The system includes test points, wherein the plurality of test points are divided into at least two groups; a stimulus source; a first group guard relay electrically connected to each of the test points in a first; a second group guard relay electrically connected to each of the test points in a second; a guard rail coupled to the first group guard relay and the second group guard relay; a first group return relay electrically connected to each of the test points in a first group; a second group return relay electrically connected to each of the test points in a second group; a current measurement rail coupled to the first group return relay and the second group return relay; a current meter coupled to the measurement rail; and a controller.

The invention relates to a safety collision avoidance risk assessment method for a crane jib and electrified equipment, and belongs to the technical field of power construction. The method comprises the following steps: measuring electric field intensity by using an electric field sensor, and measuring and calculating a distance L1 from high-voltage live equipment to a test point; measuring and calculating the radial length L2 of the crane jib by using a pulse laser flight time measurement method; comparing the distance L1 from the electrified high-voltage equipment to the test point with the safety distance Ls1, and calculating a risk coefficient K1; comparing the radial length L2 of the crane jib with a safety threshold value Ls2, and calculating a risk coefficient K2; calculating a comprehensive risk coefficient Kave; and then the risk level is judged, and corresponding early warning is carried out. According to the invention, the problems of complex installation, high cost, poor compatibility and the like of a traditional anti-collision system are solved, the safety distance between the suspension arm and the electrified equipment in the hoisting operation can be evaluated in real time, the occurrence of collision accidents is effectively avoided, and the operation safety of an electric power construction site is guaranteed.

The invention discloses an intelligent control method and system for calibration of a full-automatic sectional direct-current voltage divider, and relates to the technical field of intelligent control and decision making, and the method comprises the steps: automatically recognizing basic parameters of a calibrated voltage divider through a scanning test, detecting the sectional characteristics of the calibrated voltage divider, and building a characteristic model of the calibrated voltage divider; determining a calibration scheme according to the characteristic model, generating test point distribution, time sequence control parameters and a security policy, performing segmented calibration based on the calibration scheme, calculating error information of each test point, obtaining an independent compensation coefficient of each segment according to segmentation characteristics by combining temperature compensation, and performing compensation correction; and obtaining the corrected test point calibration result distribution to evaluate the health state of the calibrated voltage divider, and outputting a calibration conclusion including health state evaluation. Through the intelligent calibration process, the calibration efficiency and accuracy of the direct current voltage divider are remarkably improved, meanwhile, the operation risk is reduced, and reliable technical guarantee is provided for high-voltage direct current measurement.

The invention discloses a non-standard ammeter anomaly detection method based on a parameterized protocol model, and the method comprises the steps: firstly constructing a parameterized protocol model which comprises test point models corresponding to a plurality of test points; loading the parameterized protocol model, and determining a detection execution sequence; generating a request frame for any test point according to communication information configured in the parameterized protocol model, sending the request frame to a tested ammeter, performing communication interaction with the tested ammeter, and receiving a response frame returned by the tested ammeter; performing verification on the response data, and performing field-level analysis and data conversion according to a verification result to obtain an actual detection value of the test point; and performing fault judgment according to the actual detection value and generating a detection report. According to the method, non-standard electricity meters of different models and different protocol formats can be adapted under the condition that detection program codes do not need to be modified.

The invention relates to the technical field of probe testing, in particular to a PCB flying probe test path optimization method based on electrical characteristics, which comprises the following steps: calculating accessibility scores of test points according to the distribution of board surface test points and elements to determine risk types of the test points; determining a risk area grade corresponding to the grid unit according to the accessibility score in combination with the potential shadow area; optimizing the test path of the probe according to the risk area grade corresponding to the grid unit, and adjusting the initial moving speed of the test path of the probe in different grid units; for the same moving time sequence of different probe groups, determining overlapped grids according to the initial probe angles and the test paths corresponding to the probes, and determining whether there is a collision risk between the probes in combination with the initial moving speeds of the probes in different grid units; and when a collision risk exists between the probes, corresponding adjustment measures are taken according to the number of the overlapped grids. According to the invention, the test path is optimized in combination with multi-dimensional design based on the electrical characteristics and testability of the board.

The invention discloses a rapid connection testing device for a printed circuit assembly board, and aims to solve the problems of high cost, low connection density, large occupied space, tedious operation and the like in the existing testing technology. The device comprises a quick-connection probe module, a positioning tray and a pull pin, the quick-connection probe module comprises a quick-connection probe seat module, a protective cover module and a spring, positioning and locking are realized by multiplexing existing mounting holes of a to-be-tested PCB, electrical connection is realized by utilizing contact of a spring probe and a test point, a quick-connection positioning guide sleeve, a lock bead and a quick-connection ring are combined to form a quick locking / unlocking structure, and the quick-connection probe seat module and the protective cover module are connected with the pull pin. The conductive bushing and the grounding support ring form a grounding loop in cooperation with auxiliary positioning of the guide pin. A special test connector is omitted, so that the material cost is reduced; the connection density and the signal rate are improved, and the PCB space is saved; the operation efficiency is improved through the quick connection structure, and the device is suitable for efficient mass production testing.

The invention relates to the technical field, and discloses a fisheye test needle group for testing a circuit board, which comprises a test board, the test board comprises a heating pressing block, an insulating component and a base, a test sample is placed between the heating pressing block and the insulating component, the test sample comprises a sample body and fisheye needles extending from pins on the sample body, and the fisheye needles are arranged on the base. A plurality of groups of double-end probes and elastic sheets are mounted in the base and are in butt joint with fisheye needles, the fisheye needles, the double-end probes and the elastic sheets form a test needle group, when the test sample sinks, the fisheye needles are in butt joint with the double-end probes, the elastic sheets are in butt joint with the fisheye needles to form two pairs of contacts, and when the test sample sinks to guide a first pair of contacts to appear, the first pair of contacts are in butt joint with the fisheye needles. And the wedge-shaped surface in the sinking direction guides the elastic sheet to incline so as to form the second pair of contacts, so that the current and voltage required by Kelvin testing can be met, the two pairs of contacts and a plurality of testing points are integrated in a single structure, and the use requirement is met by the appearance of lateral force while vertical downward force exists.

The invention discloses an intelligent main control board detection device and method, and the device comprises a recognition module, an operation module, a detection tool, a detection module, a control module and a display module, and the recognition module is used for transmitting a signal after recognizing that a PCB reaches a to-be-detected region; the operation module comprises a mechanical arm which is provided with a vacuum chuck and a label pasting mechanism; the detection jig is provided with a probe array and is matched with PCB test points; the detection module is connected with the PCB through a probe and executes short circuit detection and power-on function test; the control module coordinates all the modules; the display module has CAN communication, display screen and network uploading functions; wherein after receiving a signal of the identification module, the control module controls the operation module to transfer the PCB to the detection jig; then the detection module is triggered to perform short-circuit detection and then perform power-on function test; and finally, the operation module is controlled to label and sort according to a test result. According to the invention, a full-automatic transmission, identification, testing and sorting assembly line is constructed, the detection efficiency is greatly improved, and the misjudgment rate and the equipment damage rate are reduced.

The invention discloses a data acquisition and analysis method of a contour method for residual stress testing, and belongs to the field of residual stress detection.The data acquisition and analysis method comprises the steps that a high-precision numerical control machine tool is adopted to shape the two sides of a preset cutting face on a workpiece, and a contact type coordinate measuring instrument is adopted to establish two coordinate systems for a to-be-tested piece; cutting a test piece to be tested according to a preset position, determining a theoretical measurement point coordinate of a contour surface to be tested by using a finite element grid, and measuring two cut surfaces after cutting according to a previously established coordinate system and a measurement point by using a contact coordinate measuring instrument, and carrying out average error removal, noisy point removal and abnormal area background deduction operation on the measured abnormal data. According to the method, the coordinate system before and after cutting and the theoretical test point coordinates are preset, so that the obtained contour data are the points in one-to-one correspondence with the test points, complex transformation is not needed, and the data measurement error is reduced.

The invention provides an estimation method and system for a passive side frequency response function in transmission path analysis, and relates to the field of mechanical vibration noise analysis and control. Comprising the following steps: constructing a vibration transmission path model comprising an active subsystem, a transmission path and a passive subsystem; dividing the degree of freedom of the whole structure into four types; selecting at least one position point from the internal degrees of freedom of the passive part as a frequency response function target test point; n non-coupling position points are selected from the internal freedom degree of the active part to serve as reference points; excitation is applied to the reference point and the target test point, and sub-blocks of the overall frequency response function matrix are measured in a coupling state; calculating through a dynamic compensation formula to obtain a frequency response function from a target test point to a coupling point in the decoupling passive subsystem; and carrying out transposition operation to obtain a frequency response function from a coupling point to a target test point required in transmission path analysis. The problem that in traditional transmission path analysis, measurement needs to be carried out after a passive side structure is detached from a coupling system is solved.

The invention relates to the technical field of circuit board detection, in particular to a printed circuit board drilling quality detection method and device, and the method comprises the steps: injecting sinusoidal current signals with preset frequencies into a plurality of test points of a to-be-detected drilling region of a printed circuit board, extracting impedance values under each frequency component, and calculating the drilling quality of the printed circuit board; constructing an equivalent impedance spectrum containing a real part and an imaginary part according to the impedance value; according to the interlayer structure and the equivalent impedance spectrum of the printed circuit board, calculating equivalent resistance and equivalent capacitance of the drilling area to be measured to form a characteristic parameter set; comparing the data of each grid point in the characteristic parameter set with a preset threshold value, and integrating the grid points exceeding the preset threshold value to generate a defect state mark; and performing electrical topology constraint on the defect state mark to generate a defect positioning result. According to the invention, hidden defects in the drill hole and interlayer structures can be deeply detected, the electrical performance of the drill hole can be comprehensively evaluated, and accurate defect positioning and state marking can be provided.

The invention relates to the technical field of semiconductor device testing and testing probes thereof, in particular to a semiconductor device testing probe and a semiconductor device testing method thereof. The method comprises the following steps: firstly, acquiring a contact stability coefficient of a test probe at each test monitoring moment, further determining all abnormal contact moments under each abnormal contact type in a preset historical test time period, and further determining the abnormal contact moments according to the total number of the abnormal contact types and the contact stability coefficient; according to the different abnormal contact types and the change distribution of the contact resistance in the preset time domain at the abnormal contact moment under the different abnormal contact types, acquiring the pressure application abnormal coefficient of the test probe and adjusting the applied pressure. According to the invention, the contact state is evaluated by analyzing the change characteristics of the contact resistance, and then the pressure application abnormal condition of the test probe is evaluated to adjust the pressure application, so that the good contact between the test probe and the device test point is ensured, and the test accuracy of the semiconductor device is improved.

The invention belongs to the technical field of server detection, and particularly relates to a server network function test method and system, a terminal and a storage medium, and the method comprises the steps: defining a test target, and configuring probe interface parameters and a resource scheduling strategy; the probe reports the CPU, the memory and the network interface utilization rate of the server to the control node in real time, and the control node adjusts the distribution of the test task by calculating the real-time load coefficient and the dynamic weight of the node according to the configured resource scheduling strategy; executing a multi-dimensional test based on the test points distributed after the test task is adjusted; through configuring a resource scheduling strategy in the step S1 and combining calculation of a node real-time load coefficient and a dynamic weight in the step S2, dynamic allocation of a test task is realized. When the node load reaches the threshold value, task migration is triggered according to the dynamic scheduling logic, resource waste caused by fixed node configuration is avoided, test resources are made to incline towards low-load nodes, the test period is remarkably shortened, and the resource utilization rate is increased.

The invention provides a to-be-tested antenna positioning method and an antenna test system, and the method comprises the steps: carrying out the calibration compensation of a test pseudo-range between each test probe and a to-be-tested antenna at different test points through a calibration compensation value between each test probe, which is obtained through a time difference of arrival method; therefore, the calibrated and compensated test pseudo-range of each test probe between different test points and the to-be-tested antenna is obtained, the position of the to-be-tested antenna is calculated according to the calibrated and compensated test pseudo-range, the accuracy of the finally calculated position information of the to-be-tested antenna is good, and the to-be-tested antenna can be accurately positioned.

The invention provides an in-situ rock mechanical parameter detection method, device and system.The in-situ rock mechanical parameter detection method comprises the steps that an in-situ test point of a to-be-detected rock is determined, and the to-be-detected rock is preprocessed; performing in-situ acoustic detection, in-situ optical detection and in-situ electromagnetic inversion detection on the in-situ test point of the rock to be detected to obtain detection data; the detection data comprises an ultrasonic signal, a hyperspectral image and electromagnetic data; performing deep fusion processing on the detection data to obtain fused data; and calling a pre-trained multi-physics field coupling model, carrying out real-time comprehensive analysis on the fusion data, and determining mechanical parameters of the rock to be tested. By means of the method, information loss caused by sample disturbance or single testing means in a traditional method is avoided, mutual influence and correlation of different physical quantities in the in-situ environment are fully considered, and the problem that an existing rock mechanical parameter detection method is single is solved.

The invention provides a method for detecting wafer bonding alignment deviation. The method comprises the steps that a preset number of metal test points are arranged on two wafers to be bonded according to preset coordinates, and every two metal test points on a first wafer and every two metal test points on a second wafer serve as a test loop; detecting the conduction condition of each group of test loops after the two wafers are bonded; and determining the bonding alignment deviation between the two wafers according to the conduction condition of each group of test loops. According to the invention, the detection precision of the wafer bonding alignment deviation can be improved.