2141results about "Printed circuit testing" patented technology

An apparatus and a method for the testing of circuit boards, together with a test probe for this apparatus and this method, in which the contact tips of a test finger of a finger tester are monitored during the testing process by an optical detection device and their movement, at least when approaching a part of the circuit board test points of a circuit board to be tested, is corrected on the basis of the result determined by the optical detection device in such a way that the contact tip makes reliable contact with the circuit board test point concerned. The correction data hereby obtained may be used in the calculation of calibration data.

Provided is a method and test system for identifying a defective region of a photovoltaic cell from among a plurality of photovoltaic cells collectively forming a thin film solar module. A probe includes a plurality of test fingers arranged to be substantially simultaneously placed adjacent to an electric contact provided to different regions of one or more of the plurality of photovoltaic cells, and each of the test fingers is to receive an electrical output from the different regions of the one or more photovoltaic cells. A light source emits light to be converted by the photovoltaic cells into the electrical output during testing. A measurement circuit measures a property of the electrical output received from the different regions of the photovoltaic cells and transmits a measured value signal indicative of the property measured by the measurement circuit. And a control unit receives the measured value signal and generates a visible display indicating that at least one of the different regions of the solar module is a defective region based at least in part on the measured value signal, and also indicates a location of the defective region on the solar module.

A socket signal extender (SSE), and a system and method of testing an assembled device under test (DUT) board employing an SSE. In one embodiment, the SSE includes a cover having a portion configured to fit within a test socket. The portion is free of logic and includes electrical conductors configured to provide an electrical connection to contacts of the test socket.

The invention relates to a chuck apparatus for a wafer probe station in which the central conductive surface supports a device-under-test (DUT) over a conductive lower chuck portion. An insulator positions the center conductor surface of the chuck above the lower chuck portion and also positions an electrically isolated conductor along its periphery. A laterally extending shielding element is provided for shielding electromagnetic interference (EMI) from the center conductor surface and the lower chuck portion. The electrically isolated conductor and the conductive lower chuck portion may cooperate to form a line-of-sight electrical barrier between the center conductor surface and the laterally extending shielding element. The invention further relates to methods of manufacturing the chuck apparatus and using the apparatus to accomplish low current and voltage tests in a probe station.

Multiple planes within the sample are exposed from a single perspective for contact by an electrical probe. The sample can be milled at a non-orthogonal angle to expose different layers as sloped surfaces. The sloped edges of multiple, parallel conductor planes provide access to the multiple levels from above. The planes can be accessed, for example, for contacting with an electrical probe for applying or sensing a voltage. The level of an exposed layer to be contacted can be identified, for example, by counting down the exposed layers from the sample surface, since the non-orthogonal mill makes all layers visible from above. Alternatively, the sample can be milled orthogonally to the surface, and then tilted and / or rotated to provide access to multiple levels of the device. The milling is preferably performed away from the region of interest, to provide electrical access to the region while minimizing damage to the region.

A printed circuit board testing device for performing an electrical test on a printed circuit board having test contacts includes a test platform, a positioning unit, an electrical connection unit, and a detecting unit. The positioning unit is disposed on the test platform and adapted to receive the printed circuit board. The electrical connection unit is disposed on the test platform and has a plurality of preset electrical functions. The electrical test specific to the test contacts is performed on the test contacts by the detecting unit connected to the test contacts and the electrical connection unit and based on the preset electrical functions.

An apparatus for testing radio frequency (RF) and / or mixed signal semiconductor devices and or modules is described. specifically described is how the distributed stimulus for RF automatic test applications, unified testhead for automatic test applications, reverse card backplane for automatic test applications, direct coaxial interface for automatic test applications, cable-free interface for automatic test applications, micromachine switch matrix for automatic test applications, device specific module high speed date for RF automatic test applications may be used within tester apparatus described herein or in other test applications. Additionally a high speed date communications test apparatus which may be used in a variety of device testers is described herein.

A test probe is provided for probing signal information on a back-drilled plated through hole connector formed in a printed circuit board, where the test probe includes a conductive probe body with a distal tip region extending a predetermined minimum coverage length (LTIP) that is longer than a recess depth dimension (DPL) for a recessed plating layer formed in the back-drilled plated through hole connector with an elastomer test probe tip formed around the distal tip region and having a total tip width (WTIP) which is compressed when inserted into the recessed plating layer formed in a back-drilled plated through hole connector, thereby establishing a conductive path between the conductive probe body and the recessed plating layer.

An embedded device testing system for comparing actual device under test input / output vector pairs with modelled device under test input / output vector pairs, wherein actual device under test output vectors are sampled in accordance with a predefined timing reference.

A driver of a display device is provided. The driver for a display device includes a signal controller receiving first and second input image data, converting the first input image data into first output image data having a grayscale higher than that of the first input image data and converting the second input image data into second output image data having a grayscale lower than that of the second input image data; and a data driver converting the first and second output image data received from the signal controller into first and second data voltages and applying the first and second data voltages to corresponding pixels, respectively.

A method of locating in a non-destructive and non-invasive manner power plane-to-power plane shorts or I / O net-to-power plane shorts found in a printed circuit board or a multi-chip-module by way of a magnetic field generating probe is described. Thousands of nets can be simultaneously tested to detect not only the presence of a short but also to accurately pinpoint its position. For high resistance shorts, the probe is provided with a pot core housed inductor located at its tip, and is used at low frequencies to minimize the effect of the capacitive impedance between the power planes. For low resistance shorts, the probe is used at high frequencies, delivering equal but opposite current to each of two matched inductors at the tip of the probe to maximize mutual inductive coupling while minimizing electrostatic capacitive coupling with the board or module. In both cases, the highest current stress is on the probe rather than on the expensive and fragile package under inspection. This allows the test to be both more sensitive to high resistance shorts at low frequencies and is less destructive, thereby being less likely to blow filamentary shorts due to high current stresses through the board or module.

The present invention is directed to a method and apparatus for balancing forces in a fixture and reducing forces in a probe plate (208) housed in the fixture. A plurality of double-ended probes (200) are positioned in the probe plate (208). A first bit (216), located at one of the double-ended probe (200) is in contact with a board under test (206). A second bit (218), which is oppositely disposed and located on the other end of the double-ended probe (200) is in contact with a wireless PCB (202). A spring (220) runs the length of the double-ended probe (200) and is in contact with the first bit (216) and the second bit (218).

A test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. In an x-, y-, z-coordinate system where traces are printed along an x-y plane, the z-dimension is used to implement test access point structures. Each test access point structure is conductively connected to a trace at a test access point directly on top of the trace and along the z axis of the x-, y-, z-coordinate system above an exposed surface of the printed circuit board to be accessible for electrical probing by an external device.

The invention provides a flexible circuit board manufacturing process automatic monitoring and intelligent analysis system and method. The flexible circuit board manufacturing process automatic monitoring and intelligent analysis system includes a basic information module, a parameter acquisition module, a comprehensive database module, an intelligent data analysis module and a monitoring display and data report module; the parameter acquisition module includes a microscope automatic data acquisition device and a copper thickness testing device; the microscope automatic data acquisition device acquires line width and line distance of an etching processing procedure and aperture of a drilling processing procedure, the copper thickness testing device is adopted to measure copper thickness, and to procedure defect data are put into statistics; and a multivariate statistical process control method, a neural network and a support vector machine are adopted as basic analysis methods so as to perform intelligent analysis on acquired data, and predict processing procedures and production line abnormalities, and identify generated abnormality sources. With the flexible circuit board manufacturing process automatic monitoring and intelligent analysis system and method of the invention adopted, automatic monitoring on the manufacturing process and the quality of a flexible circuit board can be realized, and the stability of the procedures and the yield of products can be improved.

Double-faced detecting devices for an electronic substrate, the detecting device have a base and two probe-detecting machines oppositely located beside the base. The base has a guiding groove and a substrate platform with a through hole rotatably and movably mounted on the base via the guiding groove. Therefore, when the electronic substrate mounts on the substrate platform, the substrate platform enables to rotate from a horizontal position to a vertical position to expose two faces of the electronic substrate to face the two probe-detecting machines for a double-faced detection of the electronic substrate in high-frequency properties. Additionally, each probe-detecting machine is mounted on a pivot base and pivoted by the pivot base to adjust the height of probe to touch the electronic substrate at the vertical position.

The invention relates to an auxiliary testing circuit, a chip with the auxiliary testing circuit and a circuit board with the auxiliary testing circuit. The auxiliary testing circuit is used for assisting in testing the state of electrical connection between a plurality of pins and corresponding functional circuits of the chip. The auxiliary testing circuit comprises a pin selection unit, a voltage division unit and a test result output end. The voltage division unit comprises a test voltage input end, a voltage output end and a voltage division element connected between the test voltage input end and the voltage output end, wherein the test voltage input end is used for receiving test voltage. The pin selection unit is connected between the plurality of pins and the voltage output end and is used for controlling one of the pins to be electrically connected with the voltage output end according to an external control signal. The voltage output end is directly or indirectly connected to the test result output end. The auxiliary testing circuit of the invention has the advantages of simple detection process and few test points.

An inverter fault detection system of the present invention is provided with: bus voltage monitor means for monitoring the bus voltage of a three-phase inverter; output voltage monitor means for summing the phase output voltages coming from the three-phase PWM inverter, and for outputting the resulting summed output voltage through a filter having a low-pass characteristic of passing through only the cutoff frequency lower than the PWM carrier frequency; and fault determination means for determining that the three-phase PWM inverter is in the faulty state when the output voltage coming from the output voltage monitor means is almost the same as the voltage value corresponding to 3 / 2 times of the bus voltage monitored by the bus voltage monitor means.

There is provided with a load calculating device including: a variable acquiring unit configured to acquire, as monitoring variables, a detected value by a sensor monitoring a state of a circuit board and a performance characteristic obtained by a tool monitoring performance of the circuit board; a first storage configured to store a first statistical model that is one of a regression model, an occurrence frequency distribution and a probability distribution; a second storage configured to store a second statistical model that is one of a regression model, an occurrence frequency distribution and a probability distribution; and an arithmetic processor configured to calculate the intermediate variable from the monitoring variables acquired by the variable acquiring unit according to the first statistical model and calculate the physical quantity from calculated intermediate variable according to the second statistical model.

A circuit board inspection device for inspecting the operation of a circuit board having a predetermined part or wire formed therein includes a supporting substrate disposed substantially in parallel with the parts mounting surface of the circuit board, and a signal change detection unit made of a coil or a capacitor disposed in a position of the supporting substrate corresponding to the part or wire of the circuit board, with the supporting substrate being disposed substantially in parallel with the circuit board.

A probe assembly for capacitive testing electrical connections of a low profile component to a circuit assembly. The probe assembly is configured to reduce coupling of noise signals from the circuit assembly to the capacitive probe. The probe assembly includes a sensing member with a geometry that allows the probe to preferentially couple to test signals from the pins of a component under test rather than conductive structures on the circuit assembly, such as pads, and signal traces to which those pins are attached. The sensing member may be a vertical capacitive sense plate such that coupling is to an edge of the plate. The sensing member alternatively may be a horizontal capacitive sense plate with an active area of the probe surrounded by an isolation ring. Measurements made with such capacitive probes may provide test measurements that yield a reliable discrimination between a properly attached pin and an open pin.

The invention provides a planar flying probe tester and a PCB transmission method. The planar flying probe tester includes a material receiving mechanism, consisting of a material take-out mechanism for taking qualified and unqualified PCBs under test out of a probe bed testing material table; a loading mechanism, consisting of a feeding table, a feeding mechanical arm and a feeding conveying device; a flying probe testing host, consisting of a test host conveying device and a test device; and a laying-off mechanism, consisting of a PASS material table, an NG material table, a laying-off mechanical arm and a laying-off motion device. The material receiving mechanism and a probe bed are connected in a seamless manner, the feeding mechanism conveys the PCBs under test to the flying probe testing host and tests the electrical properties thereof, then the laying-off mechanism places the qualified or unqualified PCBs onto the PASS material table or the NG material table, and the test is completed. The test stability and accuracy are high, the retest efficiency is greatly improved, and the scrap rate of the PCBs and the retest cost are also reduced.

A signal testing method of a printed circuit board (PCB) applies a robot arm and an oscilloscope to test the PCB. The method controls the robot arm to move to test points of electronic signals of the PCB. The method further controls the oscilloscope connected to the robot arm to measure the electronic signals.

A printed circuit board test fixture that includes a mounting plate which supports a printed circuit board to be tested is provided. A probe support plate holder, positioned above the mounting plate, mechanically couples to a probe support plate and holds the probe support plate opposite the mounting plate. A base plate is positioned below the mounting plate. At least three alignment sliders are included, with each alignment slider including a guide rail and a runner block slidably coupled to the guide rail. The guide rails are coupled to the base plate. The runner blocks are coupled to the mounting plate to thereby allow for movement of the mounting plate only along an axis perpendicular to a plane of the mounting plate. Multiple balancing sliders coupled to the base plate and positioned at a back end of the printed circuit board test fixture.

The invention provides a design detecting device which can judge the position of the cross short circuit without making the electrodes contact with the conductive design. Two current electrodes and two detecting electrodes are arranged on the sensor in the approximately cross shape. The sensor moves along the crossing line of the cross short circuit, wherein the current electrodes apply the AC voltage to the cross line. In addition, the detecting electrodes and the opposite grid line are in electrostatic coupling. Through the movement of the sensor, when the detecting electrodes move to the opposite position of the grid line generating the cross short circuit, the detecting electrodes respond the larger AC voltage. According to the change of the voltage value generated by induction, the position of the cross short circuit is judged.

A testing system for automatic testing of circuit boards (1) in a circuit board manufacturing line. The testing system comprises a set (I) of test modules (4) comprising a testing apparatus. Each test module comprises a horizontal module conveyor (5) for conveying a circuit board (1) into and out of the test module. The test modules are arranged in a superposed relation with respect to each other. The set (I) contains test modules differing from each other so that the testing operations performed by these test modules are different from each other. A feed device (6) has been fitted to receive circuit boards from the first line conveyor (3) and to feed them into the test modules (4).

The invention discloses an array substrate, a display panel, and the testing method of the display panel. The array substrate comprises a plurality of display signal lines, which are disposed on the display area; a plurality of first bonding pads and a plurality of second bonding pads, which are disposed on a peripheral area around the display area, and are correspondingly connected with the plurality of display signal lines; a first testing area and a second testing area, which are disposed on two sides of a main body area along a first direction. The first bonding pads comprise first main body parts, and the second bonding pads comprise second main body parts. The first main body parts and the second main body parts are disposed on the main body area, and are arranged at intervals along a second direction. At least a part of the first bonding pads comprise first testing parts, and at least a part of the second bonding pads comprise second testing parts. The first testing parts are disposed on the first testing area, and the second testing parts are disposed on the second testing area. By adopting the technical scheme provided by the invention, a VT detection circuit is saved, and the lower narrow edge frame space of the display panel is saved.

The invention provides a printed circuit board maintenance method and system, wherein the maintenance method includes the steps of inputting a standard pattern and parameters of a printed circuit board to an automatic optical detection scanning host; obtaining a scanning pattern of a printed circuit board to be maintained through the host; comparing the scanning pattern with the standard pattern and parameters to find out difference points and recording coordinates; performing amplification displaying on the difference point through maintenance station rechecking equipment to judge whether the printed circuit board to be maintained is qualified; if yes, transporting the printed circuit board to a board collecting area; if no, repairing the printed circuit board; then performing rechecking through the rechecking equipment to judge whether the printed circuit board is qualified; if yes, transporting the printed circuit board to the board collecting area, and ending maintenance; if no, repairing the printed circuit board again; and repeating rechecking and maintenance till the printed circuit board is qualified. The method and system realize detection and repair of the printed circuit board, saves manpower and reworking material cost, improves efficiency, improves product quality, and avoids problems of missing detection and reliability caused by manual checking and repair.

A server stores multiple configuration data. A tester hardware is configured to be capable of changing at least a part of its functions according to configuration data stored in rewritable nonvolatile memory, to supply a power supply voltage to a DUT, to transmit a signal to the DUT, and to receive a signal from the DUT. An information technology equipment is configured such that, (i) when the test system is set up, the information technology equipment acquires the configuration data from the server according to the user's input, and writes the configuration data to the nonvolatile memory. Furthermore, the information technology equipment is configured such that, (ii) when the DUT is tested, the information technology equipment executes a test program so as to control the tester hardware, and to process data acquired by the tester hardware.

A device and method for providing a load calculating device is presented. In one embodiment, a load calculating device can include a variable acquiring unit configured to acquire monitoring variables. The monitoring variables can include in a detected value by a sensor monitoring a state of a circuit board and a performance characteristic obtained by a tool monitoring performance of the circuit board. The device can also store a first statistical model that is one of a regression model, an occurrence frequency distribution and a probability distribution; a second storage configured to store a second statistical model that is one of a regression model, an occurrence frequency distribution and a probability distribution. An arithmetic processor can then be used to calculate the intermediate variable from the monitoring variables according to the first statistical model and calculate the physical quantity from calculated intermediate variable according to the second statistical model.