1141 results about "Test probe" patented technology

The invention relates to the technical field of probe testing, and discloses a probe testing device and method, and the method comprises the steps: carrying out the synchronous collection of the electric signal response characteristics of a plurality of chip testing probes in a chip contact process, analyzing the signal transmission interference relation between the probes, and obtaining a multi-probe signal coupling feature pattern; identifying a target signal transmission channel to obtain a first test probe configuration scheme; performing test signal input and response acquisition on the chip to obtain electrical characteristic time-frequency data of the chip; and performing multi-probe collaborative analysis and feature extraction on the time-frequency data of the electrical characteristics of the chip to obtain abnormal indication information of the electrical performance of the chip, and adjusting test parameters and contact positions of a plurality of chip test probes to obtain a configuration scheme of a second test probe. Therefore, the test system can intelligently adjust the subsequent test strategy according to the preliminary test result, and the intelligence and automation of the test process are realized.

The invention discloses a high-conductivity palladium alloy for a chip test probe and a preparation method of the high-conductivity palladium alloy, and the palladium alloy comprises the following components in percentage by mass: 50-58% of Pd, 35-40% of Cu, 5-10% of Ag, 0.05-1.0% of Cr and 0.1-1.5% of auxiliary elements, the auxiliary element is selected from at least one of Al, Zn, In and Si; the resistivity of the palladium alloy is 8.0 mu omega.cm or below, the Vickers hardness is 450 HV or above, the 90-degree bending frequency is 8 or above, the tensile strength is 1500 MPa or above, and the ductility is 6% or above, the palladium alloy is subjected to pre-smelting and secondary smelting, and at least part of Cu and at least part of Cr in raw materials are mixed and pre-smelted to obtain a copper-chromium intermediate alloy; and the copper-chromium intermediate alloy and the remaining raw materials are mixed and then subjected to secondary smelting. The palladium alloy can meet the urgent requirements of probes in various forms on low resistance, high plasticity and toughness, fatigue resistance, mechanical strength and the like at the same time.

The invention discloses a large language model agent security test method and device based on a model context agreement, and the method comprises the steps: firstly deploying a test tool in a test server, defining an application program interface which comprises function parameters and test probe parameters, describing the test probe parameters as necessary technical requirements for executing nominal functions, and executing the nominal functions according to the test probe parameters; and inducing the tested LLM agent to transmit complete session context data when calling. The test server receives a tool call request including a function parameter value and session context data, a back-end concurrently processes the request, executes a nominal function to generate a benign result, and extracts the session context data at the same time. Afterwards, a benign result is returned to the tested LLM agent, and the extracted data is asynchronously transmitted to a remote log server for recording as a test log. And finally, comparing the test log with the actual operation history, judging whether a session context data leakage vulnerability exists or not, and quantifying the severity level so as to detect whether the LLM agent leaks session memories such as the user interaction history or not.

The invention is applicable to the technical field of PCB testing, and particularly relates to a PCB electrical performance testing method, which comprises the following steps of: acquiring test object information; wherein the object information comprises a PCB image and at least one test area, the PCB image corresponds to the PCB and reflects the circuit structure of the PCB, the test area is marked on the PCB image, and the test area comprises a main test position and an auxiliary test position; when an electrical performance test instruction is received, contact judgment information is obtained based on the test object information; when it is detected that the auxiliary test probe is in stable contact with the auxiliary test position, the control device controls the main test probe to continuously send test signals and collect test results in real time, and test analysis information is obtained based on the test results. According to the PCB electrical performance test method provided by the embodiment of the invention, the problem of high test error caused by asynchronous actions of the main test probe and the auxiliary test probe can be improved.

The utility model discloses a low-leakage double-signal test probe, which comprises a probe arm, a double-tip coaxial probe and a pair of connectors are regularly mounted on the probe arm, the pair of connectors comprises a Force end connector and a Sense end connector, two tips at the front end of the double-tip coaxial probe are bent towards each other and are close to each other but not in contact to form a double-tip structure, and the Force end connector is connected with the Sense end connector. And two needle rods at the rear end of the connector are electrically connected to the Force end connector and the Sense end connector respectively. According to the utility model, through the designed double-needle-point structure, the contact area between the needle point and the PAD can be increased, so that the contact resistance between the needle point and the PAD is effectively reduced, and the parasitic resistance of the probe and the contact resistance between the needle point and the PAD are perfectly eliminated. Meanwhile, the needle point only needs to be in effective contact with the PAD, the requirement for the needle inserting depth is low, damage to the PAD is small, the service life of the PAD can be remarkably prolonged, and the accuracy of a test result can still be guaranteed after repeated testing.

The invention provides a mainboard testing method and system, and relates to the technical field of mainboard testing methods.The mainboard testing method comprises the steps that firstly, an impedance compensation matrix is generated through pre-calibration sweep frequency signals, full-band dynamic calibration is conducted on probe impedance characteristics, and signal attenuation and phase deviation caused by impedance mismatch between a testing probe and a mainboard interface are eliminated; secondly, based on multi-channel frequency domain filtering and linear combination, separating frequency domain sensitive frequency bands and time domain fluctuation characteristics of test parameters, calculating parameter weights by fusing frequency domain energy and time domain variance, avoiding the limitation of single domain analysis, and enhancing the detection sensitivity of the hidden defects of the mainboard; according to the test parameter weight vector and the probe weight mapping matrix, the test parameter weight vector is converted into a test probe weight vector, finally, the parameter importance is quantified as a basis for probe excitation intensity and sampling rate adjustment, and the beneficial effect that test resources are distributed according to needs is achieved.

The invention discloses a circuit board defect detection method and system based on multi-band impedance matching, and relates to the technical field of circuit board quality inspection, and the method comprises the steps: determining corresponding test bias voltages of a reconfigurable impedance matching network at a plurality of test frequency points according to a band bias voltage relation table; for each test frequency point, test bias voltage matched with the test frequency point is applied to each adjustable element, and a radio frequency signal is injected into the circuit board to be tested, so that a corresponding reflection coefficient is acquired through a test probe; based on the multi-frequency sparse dictionary and a compressed sensing algorithm, reconstructing a three-dimensional scattering image in the circuit board; and calculating negative logarithm likelihood distribution corresponding to the three-dimensional scattering image, and respectively solving a hierarchy anomaly score of the corresponding circuit physical layer by combining the spatial information of each circuit physical layer so as to screen at least one abnormal circuit physical layer. Therefore, signal feature reconstruction is used for replacing high-precision physical imaging, and hierarchical space identification of circuit board defects is realized.

The utility model provides a testing device for chip testing, and relates to the technical field of chip testing. A plurality of test probes penetrate through an upper base, a conductive part is mounted at the bottom of the upper base and comprises a plurality of insulating component groups and a plurality of conductive component groups arranged at intervals along a first direction, each conductive component group comprises at least one conductive sheet, the top of each conductive sheet is in contact with the corresponding test probe, and the bottom of each conductive sheet is in contact with a tested chip. An insulating component group is arranged between two adjacent conductive component groups, and each insulating component group comprises at least one insulating sheet. According to the utility model, the conductive member is equivalently arranged between the tested chip and the test probe, the effective contact area with the tested chip is increased by using the conductive sheet of the conductive member, and the contact pressure between the conductive sheet and the tested chip is reduced relative to the contact pressure between the test probe and the tested chip, so that the current is shunted, and the test efficiency is improved. The current distribution is more uniform, and the situation that the tested chip is scratched due to the fact that the test probe is heated and softened is avoided.

The utility model relates to a motor stator electrical performance detection mechanism and equipment, which belongs to the technical field of motor stator electrical performance detection, and comprises a bottom plate, a plurality of clamping jaws arranged on the bottom plate, a top plate, an air cylinder arranged on the top plate, and a lifting plate connected with the output end of the air cylinder, the inclined blocks are fixed on the lifting plate; the clamping jaw comprises a fixed seat, a test probe arranged on the fixed seat, a jaw body and an elastic structure, the middle part of the jaw body is rotationally connected with the fixed seat through a pin shaft, and the jaw body comprises an inclined arm positioned at the upper part of the jaw body and a bent hook positioned at the lower part of the jaw body. A device comprises a fixing frame, a lifting mechanism, a carrying mechanism and a motor stator electrical performance detection mechanism. According to the scheme, the number of used air cylinders is small, cost is low, the space occupancy rate is low, and clamping force is stable.

The invention discloses a needle bed for testing an integrated circuit, and relates to the technical field of test needle beds. The device comprises a transverse plate, the top of the transverse plate is in sliding fit with a storage plate, the transverse plate is in sliding fit with a mounting plate, a plurality of elastic probes are mounted on the mounting plate, and each elastic probe comprises a fixed section and a pointed-cone-shaped movable section. During cleaning, the cleaning plate can be driven to be far away from the mounting plate, the driving mechanism synchronously drives the movable plates to be close to each other, and finally the driving part synchronously drives the movable section to rotate, so that the surface oxide layer of the test probe can be cleaned on the premise of not dismounting the test probe, and the test probe cleaning device is relatively convenient and easy to use.

The invention discloses a test method for a three-terminal laminated cell IV, and belongs to the technical field of solar cell testing, and the method comprises the steps: moving a three-terminal laminated cell to an IV test bearing platform, stabilizing the cell through an index plate, starting an upper end positioning camera, recognizing a mark point of the cell, and obtaining position information; the dividing plate rotates according to a set program and conveys the positioned battery piece to a test probe by means of high-precision mechanical transmission; probe pressing and position correction: after the battery piece is in place, upper and lower probes are accurately pressed into the front and back surfaces of the battery piece, and a test connection circuit is constructed; the IV test of the three-terminal laminated solar cell is realized through one-time probe pressing and two-time flash test. The brand-new three-terminal laminated cell IV test method provided by the invention ensures accurate measurement, avoids the risk of cell piece breakage caused by secondary pressing, realizes one-time pressing of the three-terminal cell, improves the test efficiency, and simplifies the operation links.

The invention discloses integrated electronic brake system PCBA program burning and detecting equipment which comprises a whole machine frame and a burning and testing mechanism, and a burning and testing machine base and a burning and testing upper tool are arranged on the lower portion in the frame of the burning and testing mechanism. A clamping block is slidably arranged at the upper end opening of a butt joint through hole in the burning test upper tool, a hydraulic fluid channel is annularly distributed, and the upper end opening is in linkage with the clamping block through a sleeve spring piston. A reciprocating lead screw in a lead screw box on the rear side is connected with a plate unloading motor and a grabbing clamp through a driving seat, path sliding blocks on the two sides of the grabbing clamp are matched with a downward pressing sliding way on the surface of an upper tool to achieve lifting, the lower portion of the lead screw box is communicated with a liquid pipe through a spring piston, and a toothed plate in a burning frame is meshed with a driving gear; pCBA automatic feeding, discharging, overturning and discharging are achieved through linkage of a grabbing clamp and a transmission mechanism, and the productivity is improved through synchronous operation of a front station and a rear station; the clamping blocks are hydraulically driven to form annular flexible support for the test probe, the posture of the probe is self-adaptively corrected through the arc-shaped clamping blocks, and probe inclination caused by PCBA positioning deviation is avoided.

The invention belongs to the technical field of underwater measurement, and discloses a test probe underwater depth automatic positioning method and system, and the method comprises the steps: collecting an absolute water pressure value of a current underwater environment, and carrying out the calculation of a hydrostatic pressure value through combining with water surface reference air pressure data; meanwhile, acoustic signals from the water surface base station are received, response is returned, and the round-trip propagation time of sound waves in the water body is measured and obtained; collecting water body temperature data and salinity change data, estimating density information of the current water body, and converting a hydrostatic pressure value into a pressure depth value; calculating an average sound wave propagation speed by adopting an empirical sound velocity model, and calculating an acoustic depth value of the probe in combination with back-and-forth propagation time of sound waves in the water body; the depth positioning precision and stability of the underwater probe in a complex environment are effectively improved, and high-reliability and high-precision underwater depth automatic positioning is realized.

The invention relates to the technical field of wafer testing, and discloses a wafer testing probe card and a wafer testing device. The discharging opening is formed in the outer surface wall of the machine shell; the control panel is fixedly installed on the side face of the machine shell. The movable seat is movably mounted on the inner bottom wall of the machine shell; the lifting seat is fixedly mounted on the top surface of the moving seat; and the detection seat is arranged at the top end of the lifting seat. Through the arrangement of the air blowing assembly, when the detection seat drives the wafer to move up and down, the pressing plate compresses or stretches the air guide bag along with pressing and releasing of the supporting plate, periodic compression and stretching of the air guide bag are controlled through the one-way valve between the guide pipe and the nozzle, intermittent air blowing to the probe is formed, extra energy supply is not needed, and the detection efficiency is improved. And moreover, the real-time performance and continuity of probe cleaning are realized, continuous cleaning of the surface of the probe in the test process is ensured, and test errors and chip damage caused by probe pollution are effectively prevented.

The invention provides a performance test and evaluation method, system and device for a power grid credential environment and a medium, and the method comprises the steps: obtaining real-time data of each node through employing a distributed test probe and a data flow distribution strategy, and constructing a digital twinborn body of the power grid credential environment; the digital twin body comprises twin nodes corresponding to the nodes; extracting multi-dimensional performance test data of each twin node under the performance test load by adopting a classification dimension convergence method; and based on the performance test prediction data of each twin node, performing risk assessment on each twin node by adopting an entropy weight-comprehensive sorting algorithm. According to the method, dynamic load balance of each node is ensured through a data traffic distribution strategy, normal operation of the power grid credential environment is prevented from being influenced during test evaluation, and the method is suitable for a complex scene in which the power grid credential environment is easily impacted by a high load; data evaluation is carried out through performance test prediction data, data exception can be captured, and potential performance risk bottlenecks of a power grid credential environment can be found in advance.

The invention provides a probe card tip condition detection method, a probe card tip condition detection structure, a wafer and a wafer test method, and relates to a probe card tip condition detection method, which comprises the following steps: determining a plurality of probes to be tested of a probe card; a plurality of probe pads are determined, and a metal wire structure is arranged between every two probe pads in sequence so as to be connected to form a test circuit; probes to be tested are inserted into the corresponding probe pads for contact connection; dividing and designing a plurality of test groups based on the positions of the probe pads in the test circuit, and measuring the contact resistance of the to-be-tested probes and the corresponding probe pads; and judging the tip state of the to-be-tested probe based on the contact resistance of the to-be-tested probe and the corresponding probe pad. The probe point condition of the probe card is monitored by using an electrical test means, so that the test cost is reduced, and the test accuracy and the detection efficiency are further improved.

The utility model relates to a lateral touch spring type touch button circuit board testing machine, which comprises a test board, a positioning jig, a test board, a lifting assembly and a touch test assembly, a plurality of test probes are arranged on the test board, the test probes extend towards the direction of the positioning jig, the positioning jig is used for placing a circuit board to be tested, and the lifting assembly is arranged on the test board. The positioning jig is arranged on the test board and arranged on the test board in a floating mode, the test board is movably arranged over the positioning jig through the lifting assembly, and the test board presses the circuit board to be tested downwards through the lifting assembly so as to enable the circuit board to be tested to be in contact conduction with the plurality of test probes; the touch test assembly comprises a touch pen and a lateral driving piece, the touch pen is movably arranged on the side edge of the positioning jig through the lateral driving piece, and the touch pen cooperates with the pressed circuit board to be tested so as to laterally touch the spring type touch key. According to the utility model, the spring type touch key is automatically touched through the touch test assembly, and the touch pen touches the spring type touch key in the side direction, so that the circuit board can be better compatible with other electrical tests of the circuit board.

The utility model relates to the technical field of chip aging test, and discloses a probe test seat applied to aging test, which comprises a lower pressing part, a base and a chip pressing claw arranged between the base and the lower pressing part, and is characterized in that the bottom of the base is provided with a probe test part; and the probe testing part comprises a basic probe station integrally arranged at the bottom of the base and an auxiliary limiting frame connected above the basic probe station through a first spring. According to the utility model, the auxiliary limiting frame for bearing the chip is connected to the basic probe station through the spring, can move up and down, and can play a buffering role when the chip is pressed down, so that the head of the probe is protected, and the chip can be in contact with the test probe only after becoming backward, so that the precision of the seating position of the chip is ensured, and the working efficiency is improved. And the contact accuracy of the chip and the probe is improved.

The utility model discloses an automatic bending and tin dipping device based on electromagnetic coil pins, which comprises a loading turntable structure provided with a controllable rotary turntable surface and a plurality of groups of electromagnetic coil stations; the loading and unloading carrying structure is arranged corresponding to the loading turntable structure; the pin bending structure is used for outputting stamping kinetic energy to bend electromagnetic coil pins; the soldering-aid dipping structure comprises a soldering-aid shifting and transposition assembly and a soldering flux lifting assembly, the soldering-aid shifting and transposition assembly is provided with a transposition kinetic energy output end, and the soldering flux lifting assembly is provided with a soldering flux lifting end; the pin tin immersion structure comprises a tin immersion transfer assembly and a tin melting liquid storage assembly. And the impedance detection structure comprises an upper and lower limit alarm resistance meter and a test probe, and can be arranged corresponding to the plurality of groups of electromagnetic coil stations in a switchable manner. The problems that in the prior art, bending and tin immersion processes of electromagnetic coil pins generally depend on manual operation, so that the overall automation degree, the operation efficiency and the qualified rate are low, and the labor cost is high are solved.

According to the test probe assembly, the test system and the test method provided by the invention, in the test probe assembly, the active test probe is additionally provided with the power detector and / or the signal generator on the basis of the passive test probe, so that the transceiving performance test of the tested piece can be realized under the condition that a test instrument is not used, the test cost is reduced, and the test efficiency is improved. The total transmitting power or the total receiving power of the tested piece can be accurately obtained in one-time transmitting testing or one-time receiving testing, the testing efficiency is greatly improved, and the method is particularly suitable for rapid testing of a production line.

A portable testing tool comprises a bottom plate, a plurality of supporting rods are arranged on the bottom plate, and testing spaces are formed among the supporting rods; the top plate is fixedly arranged at the top end of the supporting rod, a plurality of test probes are arranged on the top plate, and a wiring terminal used for being detachably connected with a calibrating device is further arranged on the top plate; the middle plate is arranged between the bottom plate and the top plate and can slide up and down along the supporting rods, a testing position is arranged on the middle plate, a positioning mechanism is arranged at the testing position, and a limiting mechanism used for limiting the height of the middle plate is arranged on the supporting rods. The middle plate capable of moving up and down is arranged, the to-be-tested electric energy meter is placed on the middle plate, the to-be-tested electric energy meter is in contact with the probe through movement of the middle plate, then verification is completed, the height of the middle plate is adjustable, verification requirements of the electric energy meters with different heights can be met, the design of the wiring terminals can achieve rapid replacement of the test tool, and the test efficiency is improved. Therefore, the calibration requirements of electric energy meters with different terminal distances can be met.

The present invention belongs to the technical field of semiconductor devices, and discloses a semiconductor device test probe station, including a detection table. A detection groove is provided at the top of the detection table, and an operation table is provided at the top of the detection table. A working box is installed on the operation table. An adjusting device is installed at the bottom of the working box, and a test camera is fixedly installed at the bottom of the adjusting device. Two electric push rods are fixedly connected to the bottom of the working box, and the two electric push rods are respectively located on the left and right sides of the test camera. Mounting frames are installed at the opposite ends of the two electric push rods, and a probe rod is installed on the mounting frame. A probe head is provided at the bottom end of the probe rod. The present invention can protect the probe head and the wafer bidirectionally, avoid the bending of the probe head and the breakage of the wafer, ensure the normal use of the test probe station, improve its service life, and improve the accuracy of the test results of semiconductor devices.

The invention discloses a resistivity static sounding in-situ test probe for evaluating unfrozen water content and ice content of frozen soil and a working method thereof.The test probe comprises a sounding probe body and a probe rod which are vertically distributed, the sounding probe body is located at the bottom end of the probe rod, and a coaxial cable is arranged in the probe rod in a penetrating mode; a broadband signal generator, an embedded data processor, an inclinometer, an annular electrode array, a temperature sensor, a pressure measuring assembly and a friction cylinder are sequentially arranged in the probe rod from top to bottom. According to the invention, resistivity inversion calculation and temperature compensation calculation are carried out through the embedded data processor, and end resistance, friction resistance, inclination, temperature, unfrozen water content, ice content and thaw collapse coefficient are output; according to the method, mechanical parameters and electrical parameters are synchronously obtained, multi-physical field coupling analysis is combined, the frozen soil thaw collapse deformation in-situ testing method based on broadband resistivity static sounding is constructed, and the defect that the content of unfrozen water and the content of ice in a soil body cannot be detected through an existing static sounding technology in China is overcome.

The invention relates to the technical field of semiconductor device testing and testing probes thereof, in particular to a semiconductor device testing probe and a semiconductor device testing method thereof. The method comprises the following steps: firstly, acquiring a contact stability coefficient of a test probe at each test monitoring moment, further determining all abnormal contact moments under each abnormal contact type in a preset historical test time period, and further determining the abnormal contact moments according to the total number of the abnormal contact types and the contact stability coefficient; according to the different abnormal contact types and the change distribution of the contact resistance in the preset time domain at the abnormal contact moment under the different abnormal contact types, acquiring the pressure application abnormal coefficient of the test probe and adjusting the applied pressure. According to the invention, the contact state is evaluated by analyzing the change characteristics of the contact resistance, and then the pressure application abnormal condition of the test probe is evaluated to adjust the pressure application, so that the good contact between the test probe and the device test point is ensured, and the test accuracy of the semiconductor device is improved.

The utility model discloses a testing tool of a current sensor, which relates to the technical field of chip testing and comprises the current sensor, a shell is arranged on the outer side of the current sensor, a magnetic core is arranged on the inner side of the shell, a Hall chip is arranged on the inner side of the magnetic core, pins are arranged on the side face of the Hall chip, and the pins are arranged on the side face of the Hall chip. According to the utility model, the pin part of the chip adopts the contact of the test probe for signal transmission, the test probe is fixed on the probe base, and then the test probe and the probe base are fixed on the slide block with the guide rail together, so that the purpose that the test probe is rapidly separated from or contacted with the pin of the chip is achieved; the rotatable screw on the limiting block on one side can be used for abutting against the probe base after the test probe is in contact with the chip pin, so that the probe is prevented from being separated from the pin, and the limiting effect is achieved. According to the invention, a plurality of current sensors can be conveniently tested at the same time, and the current sensors can be rapidly mounted and dismounted in a lossless manner, so that the production efficiency is remarkably improved, and the risks of chip pin deformation and the like caused by testing are reduced.

The invention provides a to-be-tested antenna positioning method and an antenna test system, and the method comprises the steps: carrying out the calibration compensation of a test pseudo-range between each test probe and a to-be-tested antenna at different test points through a calibration compensation value between each test probe, which is obtained through a time difference of arrival method; therefore, the calibrated and compensated test pseudo-range of each test probe between different test points and the to-be-tested antenna is obtained, the position of the to-be-tested antenna is calculated according to the calibrated and compensated test pseudo-range, the accuracy of the finally calculated position information of the to-be-tested antenna is good, and the to-be-tested antenna can be accurately positioned.

The invention discloses an impedance matching method and system for chip testing, electronic equipment and a medium, and relates to the technical field of data processing. The method comprises the following steps: establishing electrical connection between a test probe and a to-be-tested chip test point, and sending a preset detection signal; acquiring incident power and reflection power of the detection signal; calculating a first signal reflection coefficient based on the incident power and the reflection power, and determining an impedance deviation value and an adjustment direction according to a difference value between the first signal reflection coefficient and a preset standard reflection coefficient; determining a parameter adjustment step length according to the impedance deviation value; sequentially adjusting a variable resistor, a variable capacitor and a variable inductor in the impedance matching network according to the step length and the adjusting direction; detecting a second signal reflection coefficient when the impedance real part and imaginary part of the variable element reach the target range; and judging whether the second signal reflection coefficient converges to a preset range, and if yes, taking the current matching network parameter as an impedance matching result. By implementing the technical scheme provided by the invention, the impedance matching accuracy of the chip test can be improved.

The invention relates to the technical field of insertion loss test, and discloses a spring force control insertion loss test probe device which comprises a mounting seat, an elastic probe assembly and a fine adjustment assembly. A supporting frame is arranged at the bottom of the mounting base, the elastic probe assembly is located below the mounting base, the elastic probe assembly is connected with the supporting frame, the height of the elastic probe assembly is adjustable, the fine adjustment assembly is located on one side of the probe assembly, one end of the fine adjustment assembly is connected with the elastic probe assembly, and the fine adjustment assembly is used for adjusting the elastic value of the elastic probe assembly. The optimal contact pressure can be accurately set according to the characteristics of different circuit boards, poor contact caused by too small pressure or needle mark damage caused by too large pressure is avoided, the same set of device can adapt to the test pressure requirements of different circuit boards, and the problem that the fixed elastic K value cannot be adjusted, and consequently the needle mark difference between different boards is large is solved.

The utility model relates to the technical field of test tools, and discloses a test tool for an integrated circuit chip, which comprises a test board, the middle part of the test board is rotatably connected with a rotating table, the upper surface of the test board is provided with a plurality of placing tables which are arrayed by taking the rotating table as an axis, and the lower surface of the rotating table is provided with a driving motor for driving the rotating table to rotate. An L-shaped bearing frame is fixedly installed in the middle of the upper surface of the rotating table, a telescopic device is fixedly installed on the lower side face of the end, away from the rotating table, of the bearing frame, a fixing plate is fixedly installed at the telescopic lower end of the telescopic device, a testing plate is arranged on the lower surface of the fixing plate, and a plurality of testing probes are arranged on the lower surface of the testing plate. According to the integrated circuit chip testing device, integrated circuit chips to be tested and tested are sequentially and alternately placed and taken out, the driving motor is matched with the telescopic device to drive the testing plate and the testing probe to test the integrated circuit chips on the placing table, the waiting time needed in the testing process is shortened, and then the efficiency in the testing process of the integrated circuit chips is improved.

The invention discloses a back contact battery and a photovoltaic module, and the back contact battery comprises a battery body which comprises a first surface and a second surface which are oppositely disposed; the first surface comprises a first area close to the first edge; the plurality of first fine grids and the plurality of second fine grids are arranged on the first surface, are alternately distributed along the first direction and extend along the second direction; the first end part conductive piece is arranged on the first area, extends along the first direction and is connected with the at least two first fine grids, and the second fine grids are interrupted at the first end part conductive piece; the at least one first end conductive member is provided with a first voltage test point. Therefore, in the IV or EL test process, the test probe adopted in the IV or EL test is electrically connected with the first voltage test point, and the first voltage test point can be stably contacted with the test probe, so that stable electric connection is formed between the test probe and the first voltage test point, the test difficulty is reduced, and the reliability and stability of the IV or EL test are improved.