153results about "Contactless testing" patented technology

The invention relates to a secondary harmonic characterization system based on spatial light regulation and control. The secondary harmonic characterization system comprises an incident light path unit, a detection light path unit and a sample table, the incident light path unit sequentially comprises a laser, a polarizer, a half-wave plate, a light modulator, a long-pass optical filter and an incident objective lens in the light beam incident direction; a wafer is carried on the sample table; the detection light path unit sequentially comprises an adjustable detection objective lens, a light path adjuster, a polarization analyzer, a short-pass optical filter and a detector in the light beam reflection direction; according to the SHG signal representation detected by the detector, all control parameters of the light modulator, the adjustable detection objective lens, the light path adjuster and the sample table are regulated and controlled, and the SHG signal receiving efficiency of the detector is improved. According to the invention, it is ensured that the detector efficiently receives the SHG signal, and the SHG characterization precision is improved.

The invention provides a wafer ultrasonic detection method and device, and the method comprises the steps: carrying out the global ultrasonic scanning of a whole wafer along a two-dimensional spiral path, obtaining a plurality of initial detection echo signals, forming a global echo signal group, and recording the position coordinates of the initial detection echo signals; determining a suspected bubble area based on the global echo signal group; the suspected bubble area at least has an initial measurement echo signal whose intensity is lower than a preset signal intensity threshold value; positioning the position coordinate of a suspected bubble area based on the position coordinate of the initially measured echo signal; performing local ultrasonic scanning on the suspected bubble area to obtain a plurality of retest echo signals to form a local echo signal group; judging whether bubbles exist in the suspected bubble area based on the local echo signal group and determining defect types of the bubbles; the resolution of the global ultrasonic scanning is lower than that of the local ultrasonic scanning. According to the invention, global low-resolution scanning along the spiral path and local high-resolution scanning of the wafer can be realized, and the dual advantages of efficiency and accuracy are achieved.

The invention discloses a femtosecond pulse laser modulation-based GaN-based micro light-emitting diode test system, which comprises a femtosecond pulse laser excitation module, a first detection light path, a to-be-tested GaN-based micro light-emitting diode, a photovoltage detection and bias control module, a photoluminescence detection module and a control module, the control module is configured to control the excitation power and the external bias voltage of the femtosecond pulse laser excitation module, and synchronously collect a photoluminescence spectrum signal and a photovoltage signal; according to the excitation power, the external bias voltage, the photoluminescence spectrum signal and the photovoltage signal, the competition relation between carrier drift extraction and local radiation recombination under different bias electric field conditions is obtained, and therefore an experimental basis is provided for structural design and working bias optimization of the GaN-based micro light-emitting diode device to be tested.

A method for non-contact detection. The method includes providing a semiconductor device. The semiconductor device has an epitaxial stack, a first electrode and a second electrode connected to the epitaxial stack. The method further includes applying a microwave to the first electrode to cause the semiconductor device to emit light and detecting the light emitted from the semiconductor device.

The invention relates to the field of semiconductor device and integrated circuit research, in particular to a semiconductor device dose rate effect laser simulation system. Multiple wavelengths and a wide energy range are achieved through the optical fiber laser pulse seed source assembly and the solid laser amplifier assembly, the pulse width can range from 1 ns to 100 microseconds, variable complex waveforms such as square waves, rectangular waves, sine waves and pulse strings are achieved, and pulse laser with the energy range from the nanojoule level to the joule level and adjustable wavelengths and waveforms can be output according to requirements. The high-low energy laser adopts a common-path design, so that the system integration degree is improved; light spots are adjustable from centimeter level to micron level, and global irradiation and micro-area positioning and scanning of an irradiation sample can be realized. According to the invention, dose rate effects under different conditions can be accurately and flexibly simulated, the blank of a high-energy, variable-waveform and multi-wavelength dose rate effect laser simulation system is filled up, and an efficient solution is provided for the reliability research of devices under a complex irradiation environment.

The embodiment of the invention provides a light-emitting device detection device and method, and relates to the technical field of display. In the light-emitting device detection device and method, the light-emitting device grabbing unit grabs the light-emitting device, the second coil in the light-emitting grabbing unit induces the change of the electromagnetic signal in the first coil to generate the induction current used for driving the light-emitting device, and the detection unit detects whether the light-emitting device normally emits light under the action of the induction current. Compared with the prior art, physical contact points and connecting lines required in the test can be reduced, the possibility of damaging the light-emitting device by manual intervention is reduced, meanwhile, the performance of the light-emitting device can be effectively detected, and the detection accuracy is improved.

The invention provides a positioning method and system applied to soft failure of an advanced process SRAM (Static Random Access Memory). The method comprises the following steps: determining boundary conditions of failure of a chip; performing laser scanning test: scanning pixel points on the chip one by one by using laser under the condition around the boundary condition to excite Pass / Fail state change of the chip, so that a contrast difference is generated between a failure position and a normal position, and a laser scanning image and a contrast image are obtained; and superposing the laser scanning image and the contrast image to find a failure position on the laser scanning image, comparing the laser scanning image with the corresponding layout layer, and positioning a hot spot on the layout layer according to the failure position. According to the invention, the dynamic test of the chip can be realized through the combination of the existing light emission microscope equipment and the test machine, and the laser scanning function of the light emission microscope equipment is combined to actively excite the change of the state of the chip when the chip fails and is in a normal critical state, so that the failure position is positioned. And the yield and the reliability of the advanced integrated circuit SRAM are improved.

A method includes illuminating a surface of a sample with a first light having a first wavelength (λ1) and detecting first intensities of a first photoluminescence induced within the sample by absorption of the first light by the sample. The method also includes illuminating the surface of the sample with a second light having a second wavelength (λ2) that is different from the first wavelength and detecting second intensities of a second photoluminescence induced within the sample by absorption of the second light by the sample. The method also includes generating an output representing the first intensities and the second intensities.

The invention relates to wafer test equipment, which comprises an electric test assembly, which is arranged on a mounting rack and comprises a telescopic member, a fixed end of the telescopic member is provided with a probe disc, the probe disc is provided with a plurality of probes corresponding to electrode pads of a wafer chip to be tested one by one, the probe disc is provided with a plurality of through holes between the probes, and the through holes are communicated with the probe disc. The telescopic end of the telescopic piece is provided with a suction cup, the suction cup is located below the probe disc, and the suction cup is provided with a plurality of suction rods extending into the through holes; and a light testing assembly. According to the wafer test equipment, the to-be-tested wafer is fixed on the suction rod after the angle and the position of the to-be-tested wafer are adjusted, and then the suction cup is driven to move downwards, so that the probes on the probe disc can be in contact with the metal bonding pads of the chips on the to-be-tested wafer, and electrical performance tests can be simultaneously carried out on all the chips on the wafer through the plurality of probes; and the optical fiber array disc is moved to be positioned on the wafer, so that all chips can be subjected to optical testing at one time, and the testing efficiency of the wafer is greatly improved.

This analysis device 1 comprises: a tester 10 that inputs a test signal St having a prescribed frequency to a semiconductor device D; an X-ray irradiation device 11 that irradiates the semiconductor device D with X-rays R; a detector 15 that detects X-rays (transmitted X-rays Rt) from the semiconductor device D due to the irradiation with the X-rays R and outputs a detection signal Sd on the basis of the detected result; and a signal processing device 16 that performs, on the detection signal Sd, signal processing based on the prescribed frequency.

The application provides a chip-scale package interconnection structure failure analysis method and device, comprising: determining the failure external pin corresponding to the failure CSP package interconnection structure according to the current-voltage characteristic curve corresponding to each external pin; collecting and analyzing the time-domain reflection waveform of the failure external pin by using the electro-optical terahertz pulse reflection technology, positioning the target interconnection failure area in the interconnection path where the failure external pin is located according to the amplitude, time delay and waveform distortion characteristics of the reflection pulse; scanning the target interconnection failure area by using the three-dimensional X-ray microscopic imaging technology, and determining the target position of the failure point on the interconnection path where the failure external pin is located and the corresponding structural defects based on the scanning result. The application realizes the non-destructive failure analysis of the CSP package interconnection structure by combining the electro-optical terahertz pulse reflection technology and the three-dimensional X-ray microscopic imaging technology, and improves the failure point fault positioning accuracy and efficiency.

This invention relates to a dual-wavelength pump-probe system and method for characterizing carrier lifetime in silicon waveguides, belonging to the field of carrier dynamics characterization technology. The system employs a dual-wavelength collaborative measurement architecture. After polarization adjustment, power adjustment, and time delay, the pump light is focused from above the chip to illuminate the silicon waveguide under test, exciting free carriers. A normalized detection mechanism is constructed by collecting the probe light before and after the silicon waveguide chip under test to establish the ratio of input reference to output signal. Simultaneously, a synchronous detection link is formed using a modulation unit and a phase-locked loop detection unit to effectively suppress the influence of environmental noise, light source power fluctuations, and coupling drift on the measurement results. Furthermore, the interference of pump scattered light on the probe signal is reduced through an output filter structure, thereby significantly improving the sensitivity, stability, and repeatability of silicon waveguide carrier lifetime measurement. By fitting the normalized transmission variation curves under different time delays, direct measurement of carrier lifetime is achieved.

Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation while other utilize four wave-mixing or multi-wave mixing. Corona discharge may be applied to the sample to provide additional information. Some approaches involve determining current flow from a sample illuminated with radiation.

This application provides a key parameter testing system and method for fiber-optic single-photon avalanche diodes (SPADs). The system uses a testing module to drive multiple SPADs under test, generates laser trigger signals based on parameter testing requests, and acquires pulse parameters for each SPAD under test under different testing modes with and without light source illumination. A laser generation module generates an initial pulse signal based on the laser trigger signal; a laser adjustment and transmission module adjusts the light attenuation value of the initial pulse laser and separates it into multiple test light sources with equal laser power; a control module monitors the laser power of the laser generation module and configures the laser adjustment parameters of the laser adjustment and transmission module; and the system determines the key parameters of each SPAD under test based on the pulse parameters. The system provided in this application can quickly detect the key parameters of multiple SPADs while ensuring detection accuracy, and the parameter testing process is simple and intuitive.

The application provides a film layer detection method, provides a to-be-detected film layer, focuses test laser on a first target position in the to-be-detected film layer and continuously irradiates for a first preset time period, obtains first intensity information of second harmonic generated by the first target position, determines doping concentration information of the first target position according to an initial intensity value in the first intensity information, and determines a doping type of the first target position according to intensity change information in the first intensity information. In this way, the doping type and the doping concentration inside the to-be-detected film layer can be determined based on the intensity information of the second harmonic, the to-be-detected film layer can be monitored, the monitoring time and means are flexible, the to-be-detected film layer will not be physically damaged, and a complete device structure including an electrode is not required, so that rapid analysis and online monitoring of the to-be-detected film layer can be realized.

The objective is to provide an inspection probe for easily inspecting semiconductor devices without contact. [Solution] The inspection probe head is an inspection probe head equipped with a radiating antenna, and includes a power connector attached to the main surface side of the substrate and connected to the power terminal of the semiconductor element to supply power to the semiconductor element, and a receiving antenna attached to the main surface side of the substrate and connected to the power connector and the power terminal to receive electromagnetic wave signals radiated from the radiating antenna of the semiconductor element. The receiving antenna is formed on the main surface of the substrate.

Methods for characterizing semiconductor doping in wide-bandgap semiconductor samples include: measuring an initial value V0 of the surface voltage at a region on the surface of the semiconductor sample in darkness; charging the region to deep depletion in darkness by depositing a specified corona charge at the region; measuring the surface voltage value at the region in darkness after charging; and using a specific photon flux f. eff The light irradiates the charging region, and a specific photon flux f eff A photon energy above the semiconductor bandgap is used, sufficient to generate free minority carriers in the semiconductor sample, thereby causing photoneutralization of the corona charge. The relationship between the photoneutralization-induced corona charge decay and the irradiation time t at the region is monitored using non-contact time-resolved measurements of the surface voltage V(t). The monitored time-resolved surface voltage decay data V(t) is analyzed to determine the photoneutralization time constant τ. ph ; and using a specific photon flux f eff Light neutralization time constant τ ph It serves as a semiconductor doping index, and its value characterizes the semiconductor doping concentration in that region.

There are provided systems and methods comprising obtaining design data of each of a plurality of given overlay targets comprising a plurality of stacked layers, using at least part of the design data to simulate image data of the given overlay target that would have been acquired by an electron beam examination system, using the image data to predict, before actual manufacturing of each given overlay target, one or more given attributes informative of quality of one or more images of the given overlay target after being manufactured according to the design data, and using the one or more given attributes determined for each given overlay target to select at least one optimal overlay target among the plurality of different overlay targets, wherein the at least one optimal overlay target is usable to be actually manufactured on the semiconductor specimen.

An analysis device 1 comprises: an LSI tester 3 that inputs a test pattern signal TP to a semiconductor device D and outputs a trigger signal indicating start timing of the test pattern signal TP and a test result signal TR indicating a test result, either Pass or Fail, of the semiconductor device D; an SSPD 13 that detects light emitted from a field of view set on the semiconductor device D and outputs a detection signal; and a processing unit 19 that processes the trigger signal and the detection signal to measure elapsed time from the start timing to the timing of the detection signal, generates light emission timing data indicating the elapsed time, classifies the light emission timing data into either Pass or Fail on the basis of the test result signal TR that is output from the LSI tester 3, and calculates, for each Pass and Fail, a total of frequency of the elapsed time indicating multiple light emission timing data when the test pattern signal TP is repeatedly input.

A metrology system may include an illumination source to generate an illumination beam and an illumination sub-system to direct the illumination beam to a sample with an inversion-symmetric substrate and one or more films disposed on the inversion-symmetric substrate. The system may further include a filter configured to block a wavelength of the illumination beam and pass a wavelength associated with a second harmonic of the illumination beam and a detector to capture second harmonic generation (SHG) light. The system may further include a controller to receive metrology data from the detector associated with the SHG light from with an interface between the inversion-symmetric substrate and the one or more films and generate one or more metrology measurements associated with the one or more films based on the metrology data.

This analysis device comprises: an optical scanner that irradiates a prescribed position on one surface of an object to be measured and scans said position; a photodetector that detects light reflected from the prescribed position as a result of light irradiation and outputs a detection signal; and an optical scanner control unit that controls the optical scanner. The optical scanner control unit has: a high-speed response circuit that responds with a first time constant; a low-speed response circuit that responds with a second time constant greater than the first time constant; and a changeover switch for selecting either the high-speed response circuit or the low-speed response circuit.

A method includes: providing a first semiconductor device including a backside interconnection structure, the first semiconductor device being formed by a semiconductor process; and generating a physical failure analysis model by an inspection process. The inspection process includes: directing an electron beam toward the frontside of the first semiconductor device; and applying an electrical signal to an electrical contact of the first semiconductor device through an electrical path that goes through a shunt board attached to a switchable interface trace bank, the electrical contact being associated with a position of the electron beam. The method further includes: generating a parameter of a revised semiconductor process according to the physical failure analysis model and the semiconductor process; and forming a second semiconductor device by the revised semiconductor process using the parameter.

The application discloses a method for determining Josephson junction abnormality and application thereof, and belongs to the technical field of quantum chip testing. The method for determining Josephson junction abnormality comprises the following steps: collecting a topographic image of a specified area of a Josephson junction, and measuring the conductivity of the area corresponding to the topographic image to form a conductivity imaging graph; and determining Josephson junction abnormality information according to the topographic image and the conductivity imaging graph, wherein the abnormality information comprises microscopic defects, and the microscopic defects at least include one of local defects, stress-induced leakage current and negative bias temperature instability. In the manner, the present application can solve the problem that the current microscopic electron microscope cannot determine the small defects of the Josephson junction due to low resolution, and the position and main reason causing the resistance failure of the Josephson junction can be determined according to the analysis of the topographic image and the conductivity imaging graph obtained by testing the specified area.

The utility model provides an X-ray measuring system with high signal resolution. The X-ray measuring system comprises an X-ray generator, an X-ray optical assembly group, a multi-dimensional X-ray detector and a processing device. The X-ray generator is configured to generate an incident X-ray beam. And the X-ray optical assembly group is used for guiding the incident X-ray beam to a sample to be detected. And the multi-dimensional X-ray detector is used for receiving measurement X-rays generated by irradiating the sample to be detected by the incident X-ray beam. The multi-dimensional X-ray detector includes an insulating layer, a plurality of first electrode layers, a photodiode layer, an X-ray conversion material layer made of amorphous selenium, and a second electrode layer. The processing device is configured to collect an X-ray signal to be measured and generate a plurality of measurements, where the plurality of measurements includes a plurality of modal signals of different orders.

The application is a method for measuring heterojunction interface recombination rate by electron beam induced current, which considers both depletion zone bulk recombination and front interface recombination, and considers both diffusion movement and drift movement caused by non-uniform built-in electric field in the depletion zone, and obtains a new carrier collection probability function. The application analyzes the characteristics of heterojunction interface recombination by electron beam induced current, which is the most important recombination mechanism affecting short-wave response of heterojunction device. EBIC / I b The application calculates the recombination rate S p of heterojunction interface, thereby obtaining a set of parameters capable of reliably evaluating the quality of heterojunction interface.

The invention provides a defect distribution detection method for an optoelectronic semiconductor device. The method comprises the following steps: S1, injecting a single excitation source with constant parameters into the optoelectronic semiconductor device; s2, the optoelectronic semiconductor device emits light under the single excitation source with the constant parameters, and a light-emitting intensity distribution image, relative light-emitting intensity data phi xy, rel of each pixel point in light-emitting intensity distribution and a light-emitting spectrum phi (N) of the device are obtained; s3, calculating quantum efficiency spectrum distribution at any coordinate position xy in the luminous intensity distribution image of the optoelectronic semiconductor device; s4, calculating carrier collection rate distribution of different layer depths of the optoelectronic semiconductor device according to the quantum efficiency spectrum distribution; s5, calculating the spatial distribution of excessive and minority carriers of different layer depths of the optoelectronic semiconductor device according to the carrier collection rate distribution; and S6, obtaining defect distribution of different layer depths of the optoelectronic semiconductor device. Therefore, the defect distribution of different layer depths can be inverted only by depending on the light-emitting image of the optoelectronic semiconductor device under a single injection condition, and the method has the advantages of simplicity and convenience in operation, low cost and rapidness.

To provide an estimation device, an estimation method, and a program capable of estimating an SEU cross section with high accuracy.SOLUTION: A measurement unit 12 counts the number of SEUs generated when a semiconductor device 13 is irradiated with neutrons or protons emitted from a radiation source 11 to measure an SEU probability, a setting unit 21 sets an arithmetic expression for calculating the SEU probability based on a model function simulating an SEU cross section, a calculation unit 22 calculates an estimated value of the SEU probability based on the arithmetic expression, and a comparison unit 23 compares a measured value of the SEU probability with the estimated value and changes a model parameter included in the model function such that the measured value matches the estimated value. The setting unit 21 changes the model function using the model parameter changed by the comparison unit 23, corrects the model function based on the SEU probability measured by the measurement unit 12 when the radiation source 11 irradiates the semiconductor device 13 with protons, and estimates the corrected model function as the SEU cross section.SELECTED DRAWING: Figure 1

The invention belongs to the technical field of quality detection, and discloses a high-precision semiconductor device packaging quality detection system. Comprising the following steps: acquiring electrical performance data including current, resistance and voltage data; correcting the current data by using a magneto-optical temperature correction method; calculating resistance and voltage data based on the corrected current data; the obtained thermal performance data comprises junction temperature and thermal resistance data; calculating junction temperature data of the high-precision semiconductor device by using an improved Kalman filtering algorithm; obtaining thermal resistance data based on the junction temperature data; preprocessing the electrical performance data and the thermal performance data to obtain a preprocessed data set; based on the preprocessed data set, inputting the preprocessed data set into a pre-trained auto-encoder model, and predicting to obtain a packaging quality index; judging whether the packaging quality of the high-precision semiconductor device is qualified or not according to the packaging quality index; and the accuracy and the reliability of packaging quality detection of the high-precision semiconductor device are effectively improved.

Provided is a substrate testing apparatus including a substrate support including a first surface configured to support a substrate and a second surface opposite to the first surface, and a photographing hole penetrating through the first surface and the second surface, a camera arranged below a lower surface of the substrate support, and configured to photograph the skeleton chips through the photographing hole of the substrate support, and a probe device arranged above the substrate and configured to apply a voltage to the skeleton chips. The probe device comprises a probe pin configured to contact a chip bump arranged on an upper surface of a skeleton chip, a probe card in contact with an upper surface of the probe pin, a lower plate arranged under a lower surface of the probe card, and a support protrusion arranged under the lower plate, and configured to be detachable.

The utility model discloses a non-contact full-automatic carrier Hall mobility test system for a radio frequency HEMT (High Electron Mobility Transistor) structure. The non-contact full-automatic carrier Hall mobility test system comprises an electromagnetic control assembly, a sample stage movement assembly, a microwave assembly, a signal detection assembly, a signal regulation assembly, a circuit control assembly, an industrial personal computer and data analysis software. According to the utility model, the total electromagnet intensity can be + / -1.2 T, the larger the magnetic field intensity is, the stronger the Hall effect is, and the test resolution and accuracy can be effectively improved; the back copper block lifting mechanism adopts a high-precision servo motor, the resolution ratio is higher, and accurate positioning of a measurement signal point can be realized through a software algorithm; according to the utility model, the price is reduced, the period is shortened, the consistency is better, the parameters are adjustable, and further improvement can be realized.