441 results about "Junction area" patented technology

The invention relates to an expansion joint (10) for connecting regions of a rail-based grid storage system (50, 50′, 50″; 104, 104′, 104″), the expansion joint (10) comprising: —a first rail element (12) and a second rail element (11), the rail elements (12, 11) being elongate and configured to slide relative to one another in a longitudinal direction in a junction area where they overlap, —the expansion joint (10) having a profiled upper surface that defines one or more tracks (27′, 27″) for supporting container handling vehicles (200, 300, 400), the tracks (27′, 27″) extending from the first rail element (12) through the junction area to the second rail element (11), wherein in the junction area, each rail element (11, 12) provides a portion of the or each track (27′, 27″) of the profiled upper surface so that there is a transition extending along the expansion joint (10) from the first rail element (12) to the second rail element (10) for the or each track (27′, 27″). The invention further relates to an automated storage and retrieval system comprising said expansion joint (10) and a method of connecting regions (50, 50′, 50″; 104, 104′, 104″) of a rail-based grid storage system and / or delivery rail system using one or more of the expansion joints (10)

The invention belongs to the technical field of back contact cells, and particularly relates to a back contact cell, a preparation method thereof and a cell assembly. A second semiconductor layer comprises an intrinsic silicon layer and a second doped silicon layer; the second doped silicon layer comprises second doped microcrystalline silicon and second doped amorphous silicon located at the overlapping region, and further comprises an amorphous silicon insulating layer, and the amorphous silicon insulating layer is located outside the second doped amorphous silicon and does not cover the second doped microcrystalline silicon; an isolation groove is formed in the part, located in the overlapping area, of the conductive film layer, and a distance is reserved between the isolation groove and the junction of the side face of the first semiconductor layer and the second semiconductor layer. Leakage current generated at the junction of the side face of the first semiconductor layer and the second semiconductor layer can be remarkably reduced, meanwhile, the passivation effect of the second semiconductor layer is guaranteed, the isolation groove does not need to stretch across the junction, the second semiconductor layer cannot be damaged, the parallel resistance of the battery is improved, and the current and efficiency of the battery are improved.

An optical modulator includes, a semiconductor substrate, an optical waveguide portion disposed on the semiconductor substrate, a first P-N junction disposed on the semiconductor substrate, and a second P-N disposed on the semiconductor substrate. The optical waveguide portion provides an optical path for light that is to be modulated. The first P-N junction is disposed on the semiconductor substrate along the optical path and defines a border between an N-doped portion disposed on the semiconductor substrate and a P-doped portion disposed on the semiconductor substrate. The second P-N junction is disposed on a portion of the semiconductor substrate alongside the optical path and spaced apart from the first P-N junction.

The invention discloses a precision machining device for motor flange bearing production, and particularly relates to the technical field of bearing machining, the precision machining device comprises a rack, and a workpiece supporting unit, a grinding unit and an abrasive feeding unit are arranged on the rack; the workpiece supporting unit comprises a mounting shaft, the grinding unit comprises a grinding wheel, and omission areas are formed at the junction of the outer ring part grinding surface and the flange part grinding surface and the junction of the outer ring part and the flange part; the abrasive feeding unit comprises a feeding pipe, and the feeding pipe conveys abrasive particle materials to the omission area. Abrasive particles are supplemented into the omission area through the feeding pipe, under the movement of the grinding wheel and the bearing outer ring, the abrasive particles continuously move in the omission area and the junction area of the outer ring part and the flange part, and grinding machining of the area is formed. The grinding omission that the grinding wheel cannot make full contact with the junction of the outer ring part and the flange part is supplemented, the grinding machining precision of the device is guaranteed, and the machining quality of products is improved.

The cylindrical lithium ion battery comprises a positive current collecting plate and a negative current collecting plate, the positive current collecting plate comprises a first plate body and a second plate body, the first plate body is provided with a first center hole, the second plate body comprises a connecting part, the connecting part is provided with a fusing groove, the negative current collecting plate comprises a third plate body and a flange, and the flange is provided with a second center hole. The third disc body comprises a main body part and a plurality of extension parts extending outwards from the main body part in the radial direction, the edges of the extension parts and the edges of the turned-over edges are jointly sunken inwards in a junction area to form first stress release grooves, and the turned-over edges can be bent relative to the third disc body along the first stress release grooves; the extension part is provided with a thinning part extending in the radial direction. When the cylindrical lithium ion battery is assembled, liquid can be selectively injected at the positive electrode side or the negative electrode side, and the cylindrical lithium ion battery also has the characteristics of low manufacturing cost and high reliability and safety.

A portable barrier includes a junction assembly having a first junction support, a second junction support, and a third junction support, a first fastener, and a second fastener. The first junction support is spaced apart from the second junction support to define a first junction space. The second junction support is spaced apart from the third junction support to define a second junction space. The first fastener defines a first axis and extends through the first junction support, the second junction support, and the third junction support. The second fastener defines a second axis and extends through the first junction support, the second junction support, and the third junction support. And the first axis is spaced apart from the second axis. The portable barrier further includes a pedestal assembly including a plurality of legs that are movable with respect to each other. The plurality of legs includes a first leg and a second leg. The portable barrier additionally includes a cover assembly including a plurality of arms that are movable with respect to each other, the plurality of arms includes a first arm and a second arm, and a covering connected to the first arm and the second arm. Also, the portable barrier includes a supplemental component pivotally coupled to the junction assembly. The first strut pivots with respect to the junction assembly about the first axis during movement of the portable barrier between the storage mode and the protection mode. In addition, the second strut pivots with respect to the junction assembly about the first axis during movement of the portable barrier between the storage mode and the protection mode. And the junction assembly pivots with respect to the pedestal assembly about the first axis during movement of the portable barrier between the storage mode and the protection mode.

The invention provides a color filling method and electronic equipment, a first interface is displayed, the first interface comprises a first area and a second area, the color of the first area is a first color, the color of the second area is a second color, and the junction of the first area and the second area comprises M colors, the M colors are different from the first color and the second color; determining P colors according to the second color, the third color and one or more colors in the M colors in response to an operation of filling the second area with the third color by the user; the second color is replaced by the third color, one or more colors in the M colors are replaced by the P colors, and the new color of the junction is determined according to the color to be filled, the color of the seed point and the color of the junction, so that on the basis of ensuring the filling effect, the color transition can be better performed, the sawtooth feeling is reduced, and the filling efficiency is improved. And the drawing experience of the user can be improved.

The invention provides a method for improving morphology of junctions of gate oxides with different thicknesses on STI (shallow trench isolation), and the method comprises the steps: 1, providing a substrate, forming shallow trench isolation on the substrate, and forming a gate oxide layer on the substrate; step 2, after a photoresist mask layer is formed, etching the exposed gate oxide layer; 3, trimming the photoresist mask layer to adjust the boundary of the photoresist mask layer; 4, etching the exposed gate oxide layer again; and 5, after the photoresist mask layer is removed, forming a grid electrode on the substrate. According to the invention, the boundary of the photoresist mask layer is adjusted step by step through multiple times of finishing of the photoresist mask layer formed on the gate oxide layer, and one time of etching of the gate oxide layer is carried out after each time of finishing, so that a gate-oxide junction with smooth morphology can be obtained, residues formed at the gate-oxide junction in a subsequent process are reduced, and the performance of a device is further improved.

The invention provides a wind generating set tower tube weld joint optimization method based on hydrodynamics, and relates to the technical field of hydrodynamics, the wind generating set tower tube weld joint optimization method comprises the following steps: obtaining an image of a junction of to-be-welded positions of a wind generating set tower tube, and extracting a junction center line in the image of the junction; according to the extension direction of the boundary center line, a constraint condition for keeping energy continuity of the molten metal at the inflection point of the extension direction is constructed, and the heat flux density formed by the molten metal at the inflection point of the center line is calculated; according to the heat flow density needing to be met in the step S2, the welding heat needing to be absorbed by the to-be-welded material when the welding seam is formed at each inflection point of the tower barrel welding seam is calculated; and a welding parameter-inflection point heat mapping model is constructed, optimal welding parameters are output through a global optimization algorithm, the fatigue strength of a welding seam under the wind load effect is improved, and the service life of a tower drum of the wind generating set is prolonged.

The invention relates to the technical field of monocrystalline silicon processing, particularly provides a preparation method of monocrystalline silicon, and aims to solve the problem that the crystal quality is influenced by crystal distortion in the existing monocrystalline silicon preparation process. In order to achieve the purpose, the preparation method of the monocrystalline silicon comprises the steps that in the first stage of equal-diameter growth of the monocrystalline silicon, the crystal pulling speed is controlled to be gradually increased to the preset pulling speed, and the liquid opening distance is controlled to be gradually reduced to the preset distance; and in the second stage of equal-diameter growth of the monocrystalline silicon, controlling the crystal pulling speed to maintain the preset pulling speed, and controlling the liquid opening distance to maintain the preset distance. According to the method, the two technological parameters of the liquid opening distance and the crystal pulling speed in the monocrystalline silicon growth process are adjusted in advance, the temperature consistency of the area nearby the molten silicon liquid level can be improved, a stable thermal field is formed at the junction of the crystal and the silicon solution, and therefore the distortion proportion of the crystal can be reduced, and the crystal forming quality is improved.

The utility model provides a tool mold for preparing a composite structure coating on the surface of a sensitive element chip, and relates to the technical field of pyroelectric infrared sensors. The tool mold comprises an upper cover plate and a lower cover plate, a plurality of coating coating areas are arranged on the upper cover plate, and each coating coating area comprises a covering area and a hollow area; the shape of the coating area is the same as that of the sensitive element chip, the coverage area and the hollow area are symmetrical about the symmetry axis of the coating area, and the coverage area and the hollow area coincide after the coating coverage area rotates by 180 degrees along the center point or rotates reversely; a bulge extending to the hollow area is arranged at the junction of the coverage area and the hollow area; the lower bottom plate is provided with a plurality of sinking grooves which are in one-to-one correspondence with the chip coating areas, and the sinking grooves are used for placing sensitive element chips; the upper cover plate is arranged above the lower bottom plate, the upper cover plate and the lower bottom plate are fastened through a connecting device, and the sensitive element chip is fixed between the upper cover plate and the lower bottom plate. The tool mold is not prone to deformation and stable in structure, and the tool mold for preparing the composite coating has the beneficial effects of being short in technological process, easy to operate and good in repeatability and consistency.

A gate structure is formed on a substrate at the junction of a well region and a drift region, the gate structure on the drift region is doped to form a first doped region and a second doped region which are adjacent to each other, the first doped region is doped with first type ions, and the second doped region is doped with second type ions; the conduction types of the second type ions and the first type ions are different, so that the first doped region and the second doped region form a reverse biased PN junction, an electric field caused by the interconnection structure can be balanced and dispersed in the direction from the drain electrode to the source electrode, and the high voltage of the interconnection structure can be effectively isolated; besides, the first doped region and the second doped region form a reverse-biased PN junction to disperse the high potential difference between the first doped region and the second doped region, so that the electric field intensity and the potential peak value on the surface of the device are effectively reduced, the segmented voltage division effect is beneficial to optimization of electric field distribution on the surface of the device, electric field concentration is reduced, and the performance of the device is improved. Therefore, the breakdown voltage of the semiconductor structure is improved.

The invention provides a manufacturing method of a sigma trench, which comprises the following steps: providing a substrate, forming a gate oxide layer and a gate structure on the substrate, the gate structure comprising a gate, a first mask layer and a second mask layer which are sequentially formed on the gate oxide layer; etching for the first time by taking the second mask layer as a mask until the second mask layer is removed, forming a first groove in the substrate on two sides of the gate structure, and gathering polymers generated by etching the second mask layer in the etching process on the gate oxide layer on the side wall of the first groove and a junction area of the gate oxide layer, the gate and the substrate as an etching protection layer; and performing second etching by taking the first mask layer as a mask, protecting the substrate covered by the etching protection layer from lateral etching by the etching protection layer, and forming a sigma-like groove in the first groove. According to the method, the etching protection layer is formed on the side wall of the first groove through the polymer generated by the second mask layer in the first etching process, the area is prevented from being excessively etched, serious lateral pushing of the area is avoided, and therefore the shape of the groove can be adjusted and controlled more easily.

The invention discloses an etching method of a passivation layer, and the method comprises the steps: forming the passivation layer on a metal layer, the metal layer being formed in an interlayer dielectric layer, the interlayer dielectric layer being formed on a substrate, and the substrate being used for forming a semiconductor device; covering the passivation layer with a light resistor, and removing the light resistor in the target region through exposure and development in sequence to expose the passivation layer in the target region; wet etching is carried out, so that the passivation layer of the target area is thinned; and performing dry etching until the metal layer of the target area is exposed. After the passivation layer on the metal layer is covered with the light resistor, the target area is exposed through exposure and development in sequence, the passivation layer of the target area is removed through wet etching and dry etching in sequence, the metal layer of the target area is exposed, and therefore the appearance of the edge of the junction area of the exposed metal layer and the passivation layer is steeper, and the light resistance of the metal layer is improved. And the residue of the passivation layer is reduced, so that the phenomena of skip plating and falling of the subsequent electroplating metal layer are avoided.

The invention discloses a power module packaging structure. According to the chip, a non-linear conductive material coating is arranged at the connecting part of the edge of each metal bonding pad and a chip substrate, and the connecting part of the edge of each metal bonding pad and the chip substrate is the joint of the metal bonding pad, the chip substrate and an insulating encapsulating material, namely the three-phase point. Through the arrangement of the non-linear conductive material coating, the resistivity is high in a normal low field, and electric leakage is prevented; and when the local electric field intensity is increased sharply (terminal at the three-phase junction), the resistivity is reduced sharply, the electric field is uniformly dispersed, and the peak of the local electric field is inhibited, so that the overall dielectric strength and creepage distance of the module are improved. According to the technical scheme, the insulation reliability of the power module under high-voltage, high-frequency and high-temperature working conditions is remarkably improved, particularly, partial discharge is restrained at a three-phase point, the service life of the module is prolonged, and the production and maintenance cost is reduced.

The present application relates to a kind of low scattering carriers for RCS test, including carrier body, carrier body includes first surface and second surface, first surface and second surface are connected to form hollow cavity, hollow cavity is used to accommodate cylindrical target component;One end of hollow cavity is tip, the other end is open end, open end is circular, cylindrical target component is installed in hollow cavity through open end;Horizontal plane is formed at the junction of first surface and second surface, the height of first surface beyond horizontal plane is less than the height of second surface beyond horizontal plane, the radius of curvature of first surface gradually increases from tip to open end direction, the radius of curvature of second surface increases first and then decreases from tip to open end direction.The low scattering carrier in the present application can simulate the installation state of cylindrical target component, realize the accurate evaluation of the RCS of cylindrical target component.

An electronic package is provided and includes a substrate structure, an electronic element disposed on the substrate structure and an encapsulation layer encapsulating the electronic element, where at least one functional circuit is formed on a surface of a substrate body of the substrate structure, and a wire having a smaller width is arranged on a boundary line at a junction between an encapsulation area and a peripheral area, so that when a mold for forming the encapsulation layer is formed to cover the substrate structure, the mold will create a gap around the wire to serve as an exhaust passage. Therefore, when the encapsulation layer is formed, the exhaust passage can be used to exhaust air, so as to avoid problems such as the occurrence of voids or overflows of the encapsulation layer.

The invention relates to the technical field of photovoltaic power generation, in particular to a solar cell and a photovoltaic module. The solar cell comprises a substrate, a patterned doped silicon layer, a passivation layer and an electrode, wherein the doped silicon layer is located between the substrate and the passivation layer; the doped silicon layer comprises a first sub-layer with a first thickness and a second sub-layer with a second thickness, the first sub-layer and the second sub-layer are connected along the first direction, the first thickness is greater than the second thickness, and the second thickness is greater than or equal to 0 [mu] m; the orthographic projection of the junction of the first sub-layer and the second sub-layer on the substrate is a boundary, the boundary comprises a plurality of connected units, and the units comprise convex units and / or concave units; the protruding direction of the protruding units is in the second direction, and the protruding shape of the protruding units is in a non-sharp-corner shape. The concave direction of the concave unit is in the second direction, and the concave shape of the concave unit is a non-sharp-corner shape; the second direction intersects with the length direction of the electrode; an electrode is in contact with the first sub-layer through the passivation layer.

The invention discloses a method for reducing critical current density in SOT driving magnetization overturning, and relates to the technical field of spintronics, and the method comprises the following steps: building a structure model of a magnetic film which is of a double-layer structure, symmetrically arranging two defect areas on the magnetic layer along the x-axis direction, the physical parameter value of the defect area is smaller than that of the magnetic layer; the junction of the magnetic layer and the defect region is a domain wall; the structure model is subjected to micro-magnetic simulation, a magnetic domain and domain wall evolution process is obtained, the critical current density in SOT driving magnetization overturning is determined based on the evolution process, the critical current density is the minimum current density for driving domain wall movement, and the maximum current density is the minimum current density for driving domain wall movement. And the SOT effective field generated by the critical current density is the minimum SOT effective field required for unpinning the domain wall from the defect area. The method can be compatible with the existing micro-nano electronic process and material system.

The invention relates to an expansion joint for connecting regions of a rail-based grid storage system, the expansion joint comprising: a first rail element and a second rail element, the rail elements being elongated and configured to slide relative to one another in a longitudinal direction in a junction area where they overlap, the expansion joint having a profiled upper surface that defines one or more tracks for supporting container handling vehicles, the tracks extending from the first rail element through the junction area to the second rail element, wherein in the junction area, each rail element provides a portion of the or each track of the profiled upper surface so that there is a transition extending along the expansion joint from the first rail element to the second rail element for the or each track. The invention further relates to an automated storage and retrieval system comprising said expansion joint and a method of connecting regions of a rail-based grid storage system and / or delivery rail system using one or more of the expansion joints.

Provided is a multilateral junction, a well system, and a method. The multilateral junction, in one aspect, includes a lateral branch template having a lateral window for positioning proximate a junction between a lateral wellbore and a main wellbore, and a lateral branch connector adapted to be sealably engaged to the lateral branch template, a portion of the lateral branch connector extending through the lateral window. The multilateral junction, according to this aspect, further includes one or more sealing elements configured to expand in volume located proximate a joint between the lateral branch template and the lateral branch connector.

According to the coil component and the electric valve provided by the utility model, the limiting structure is arranged in the coil component, and at least one part of the limiting structure is arranged at the junction of the insulating layer and the free section, so that one side, at least close to the insulating layer, of the free section can be limited and supported through the limiting structure. Through the scheme, the movement range of the part, close to the insulating layer, of the free section of the wire (namely the junction of the free section and the insulating layer) is limited, namely the movement range of the part, exposed out of the insulating layer, of the wire relative to the part, fixed in the insulating layer, of the wire is limited at least from one direction; in this way, large stress concentration caused by large-angle bending of the position where the wire penetrates out of the insulating layer is prevented at least from one direction, so that the risk that the wire is bent to be damaged or broken at the position is reduced or avoided, and the product reliability is improved.

The embodiment of the invention provides a chip module, a chip module preparation method and electronic equipment, and belongs to the technical field of chips, chips are arranged on the two opposite faces of a substrate of the chip module, packaging of the chips is achieved through a first packaging piece and a second packaging piece, heat dissipation of the first chip is achieved through a first heat dissipation piece, and the heat dissipation efficiency of the first chip is improved. The layout of the first heat dissipation piece is not limited by the preparation process, the short circuit prevention interval and the like, so that the projection of the first heat dissipation piece can at least partially cover the projection of the heat conduction area of the first chip, the heat dissipation path is shortened, the heat resistance is reduced, and the heat dissipation effect is improved. The end face of the first end of the first heat dissipation piece is recessed inwards relative to the face, back to the substrate, of the second packaging piece, a preset distance is formed between the end face and the face, back to the substrate, of the second packaging piece, and when the packaging layer is thinned to form the second packaging piece, thinning removal depth does not reach the first heat dissipation piece. The problems of layering, cracking and the like at the junction of the side wall of the first heat dissipation piece and the packaging layer are avoided, the grinding operability and reliability of the packaging layer are improved, and the yield is improved.

The invention discloses a manufacturing method of a grinding wheel for a high-uniformity and easy-to-sharpen grinding single crystal diamond cutter, and belongs to the field of superhard materials and products in machining, the manufacturing method mainly comprises the steps of wet mixing, tape casting, laser cutting, lamination, matrix surface treatment, integrated sintering, size processing, sharpening and the like, and finally the grinding wheel with the total thickness of an abrasive layer being 7-15 mm is formed. The grinding wheel layer is formed by intersecting and laminating a piece a and a piece b, the height of diamonds at the junction of the piece a and the piece b tends to be consistent, the diamond exposure height and smoothness are better compared with direct feeding sintering, meanwhile, the piece a can be designed to be of a porous structure through proper binder selection, and therefore the dressing efficiency is further improved, and the dressing effect is better. And higher processing quality and efficiency of the diamond cutter are indirectly improved.

The invention provides a topological optimization-based negative chamfering tool microstructure design method, which comprises the following steps of: performing three-dimensional orthogonal cutting thermal-mechanical coupling simulation on a negative chamfering tool to obtain positive stress distribution of a target area of the negative chamfering tool in a cutting state; wherein the target area is a V-shaped area or an inclined plane area formed at the junction of the rake face and the chamfered edge; and based on the normal stress distribution of the target area, adjusting the material density distribution of the target area by using a variable density method, and carrying out topological optimization on the material density distribution of the target area by taking the tool nose stress minimization as a target function to obtain the microstructure of the target area. Compared with a traditional micro-texture tool with a simple structure, the method can perform structural design on a stress concentration area to improve the stress condition of the tool, so that the cutting performance of the tool is improved, the service life of the tool is prolonged, and the quality of a machined surface is improved.

The invention relates to a foundation treatment design method considering cooperative deformation control of a junction area of different treatment forms, which considers differential settlement forms of the junction area of different foundation treatment forms and the influence of the differential settlement forms. And it is ensured that the slope ratio of the junction area of different foundation treatment forms does not exceed the limit value by adjusting foundation design parameters and differential settlement control measures. And finally, the construction drawing design scheme can meet the use requirements.

The invention provides a germanium-on-insulator structure and a preparation method thereof. The preparation method comprises the following steps: providing a silicon-based epitaxial germanium wafer; forming a dielectric layer on the surface of the epitaxial germanium layer of the silicon-based epitaxial germanium wafer; performing oxygen injection on the surface of the dielectric layer, and forming an oxygen injection layer at the junction of the silicon substrate of the silicon-based epitaxial germanium wafer and the epitaxial germanium layer; performing heat treatment on the silicon-based epitaxial germanium wafer, and forming a silicon oxide layer at the junction of the silicon substrate and the epitaxial germanium layer; and removing the dielectric layer to form the germanium-on-insulator structure. According to the invention, the silicon-based epitaxial germanium wafer is used as the source material of the germanium-on-insulator, and a wafer bonding step in a common SmartCut process is avoided, so that the problem of bubbles in the wafer bonding step is avoided. And compared with a bonding interface, the strength of an epitaxial growth interface is higher, and the reliability of a final product is better.

A method for forming a semiconductor structure, the method comprising: providing a substrate including a target layer for forming a target pattern, forming a pattern definition layer on the target layer, and forming a first sacrificial layer in the pattern definition layer; removing the first sacrificial layer at the junction of the pattern definition layer and the first sacrificial layer to form a first opening; forming a first sidewall layer on the sidewall of the first opening, the first sidewall layer including a first sub-sidewall layer and a second sub-sidewall layer; filling a second sacrificial layer in the first opening, the second sacrificial layer and the first sacrificial layer constituting a sacrificial structure; removing the sacrificial structure in contact with the sidewall of the first sub-sidewall layer or the sidewall of the second sub-sidewall layer to form a second opening surrounded by the sacrificial structure, the second sub-sidewall layer, and the target layer; forming a second sidewall layer on the sidewall of the second opening; and transferring the patterns of the first sidewall layer and the second sidewall layer to the target layer to form a target pattern. The present invention not only increases the process window but also reduces the pitch between target patterns.

An electrostatic discharge protection structure and a method for forming the same, comprising: a substrate including a first region and a plurality of second regions; a first well region located in the first region, having a first doping ion in the first well region; a second well region located in the second region, having a second doping ion in the second well region; a first gate structure located on the first region; a second gate structure located on the second region; a first doping layer and a second doping layer respectively located in the substrate on both sides of the second gate structure, having a first doping ion in the first doping layer and the second doping layer, the first doping layer and the second doping layer are respectively located in the second well region, and the first doping layer is further in contact with the first well region. By forming a reverse-biased junction at the junction of the first well region and the second well region, since the first gate structure is connected in series with the reverse-biased junction, the resistance value of the branch formed by the first gate structure and the reverse-biased junction is increased, thereby reducing the risk of the first gate structure being broken down, and thus improving the performance of the finally formed semiconductor structure.

A foldable display device includes a reflective display panel, a light guide layer, and at least one light source. The light guide layer is located on the reflective display panel and includes a non-bending area, a bending area, and a junction area. The bending area is located in the middle of the light guide layer. The junction area is located between the bending area and the non-bending area. The light source is located on the reflective display panel and faces the sidewall of the non-bending area, and is configured to emit light to the light guide layer. Because the thickness of the non-bending area is greater than the thickness of the bending area, sufficient light input to the light guide layer is ensured. The smaller thickness of the bending area reduces the material rigidity of the bending area, allowing the foldable display device to fold at the bending area. The thickness of the junction area is between the non-bending area and the bending area, thus enabling total internal reflection of light from the light guide layer to the bending area. This ensures sufficient light input without requiring an additional light source and also improves the power efficiency of the foldable display device.