127 results about "Shunt capacitance" patented technology

An IPD high-selectivity band-pass filter based on a weak coupling transformer technology comprises an LC parallel resonance circuit, an LC series resonance circuit, an LC parallel resonance circuit and a fourth capacitor C4, and inductors in the LC parallel resonance circuit and inductors in the LC parallel resonance circuit have a weak transformer coupling relation; the coupling coefficient required by the weak coupling transformer provided by the invention is very small and can be realized in a mode of adjacently placing metals on the same layer, so that the structural complexity of the filter is effectively reduced; the band-pass filter is based on an IPD technology, an extra decoupling equivalent inductor is introduced through a weak transformer coupling technology, the extra decoupling equivalent inductor and a parallel capacitor which is connected between the input end and the output end of the filter in a bridging mode form a new resonance path, and a transmission zero point is introduced into an upper stop band and a lower stop band of the filter respectively to improve the selectivity of the filter. According to the invention, the selectivity of the filter can be effectively improved on the premise of not additionally introducing an inductance element and not increasing the order of the filter.

The invention provides a signal acquisition system of a photoelectric detector. In the signal acquisition system, a transimpedance pre-amplification circuit is arranged at the output end of the photoelectric detector, and a passive high-pass filter circuit is connected between the transimpedance pre-amplification circuit and a post-voltage amplification circuit. And a feedback network is formed in the transimpedance pre-amplification circuit and is used for converting a current signal output by the photoelectric detector into a proportional first voltage signal and outputting the proportional first voltage signal. The filter circuit is a third-order LC high-pass filter circuit and is used for suppressing direct current, low frequency and self-beat frequency components and keeping a 10-90MHz pass band flat. The rear voltage amplification circuit adopts a voltage amplification structure of a voltage operational amplifier, the voltage gain Av is 6-10, and the super-band gain is limited through a shunt capacitor. According to the embodiment of the invention, through the structure and parameter setting, the noise gain peak value is suppressed, and the system stability is improved.

The invention discloses an intermediate frequency filter chip based on a gallium arsenide IPD process, which adopts the GaAs IPD process with three metal layers and comprises six resonators, twelve capacitors and three metalized grounding holes. The six resonators are composed of capacitors C1-C6 and inductors L1-L6 which are connected in series / in parallel, the inductors are all of self-built octagonal structures, and wiring is only conducted on the middle layer and the uppermost metal layer; a branch series capacitor Ca-Cc and a main parallel capacitor Cd-Cf respectively form six transmission zeros outside a low-frequency band and a high-frequency band. According to the invention, the characteristics of small size and wide band of the filter chip are realized, the loss is reduced, the in-band flatness is improved, and the filter chip has high frequency selectivity and high out-of-band rejection capability.

The invention provides a parameter design method for a multi-voltage rectification LCC converter, and the method comprises the steps: building a voltage precise mathematical model of a resonant cavity parallel capacitor through employing a fundamental wave equivalent method based on the condition that output capacitors of the multi-voltage rectification LCC converter and a multi-voltage rectifier participate in resonance; the gain of the voltage-multiplying LCC resonant converter is modeled through a voltage accurate mathematical model of a resonant cavity shunt capacitor; determining the number of rectifier bridges, the turn ratio of a transformer and the capacitance value of a rectification voltage-multiplying capacitor according to the voltage of the parallel capacitor of the resonant cavity and the gain of the voltage-multiplying LCC resonant converter; and determining values of the resonant cavity series-parallel capacitor and the resonant cavity inductor according to the capacitance value of the rectification voltage-multiplying capacitor. According to the method, analysis and calculation of the output filter capacitance are incorporated into parameter design of accurate modeling, a scheme for selecting the number of the voltage doubling rectifier bridges is given, and the size can be reduced and economic benefits can be increased under the condition that working condition requirements are met.

The invention discloses a power grid voltage stability evaluation method and system, which are applied to the field of voltage stability evaluation, and the method comprises the steps: determining a low-frequency component and a high-frequency component of each node of a target power grid; voltage sag information of the corresponding node is obtained; determining a first target node according to an analysis result of the voltage sag information; determining a high-frequency modeling mode of each node based on the voltage sag information; analyzing the high-frequency component, and determining a target frequency band; in the target frequency band, determining the corresponding node as a second target node based on an analysis result of the high-frequency operation model; and obtaining a stability evaluation result of the target power grid based on the first target node, the second target node and the topological information, and at least adjusting the switching group number of the parallel capacitor group of the target power grid according to the stability evaluation result. The power grid voltage stability assessment method and system provided by the invention can accurately assess the power grid voltage stability and provide an accurate basis for the control of the power grid voltage.

Single band and multiband wireless antennas are an important element of wireless systems. Competing tradeoffs of overall footprint, performance aspects such as impedance matching and cost require not only consideration but become significant when multiple antenna elements are employed within a single antenna such as to obtain circular polarization transmit and / or receive. Accordingly, it would be beneficial to provide designers of a wide range of electrical devices and systems with compact single or multiple frequency band antennas which, in addition to providing the controlled radiation pattern and circular polarization purity (where required) are impedance matched without substantially increasing the footprint of the antenna and / or the complexity of the microwave / RF circuit interfaced to them, whilst supporting multiple signals to / from multiple antenna elements in antennas employing them. Solutions present achieve this through provisioning one or more capacitive series reactances discretely or in combination with one or more shunt capacitive reactances.

The invention relates to the technical field of high-voltage dry-type reactive power compensation, and discloses an underground mining high-voltage dry-type reactive power compensation device. Comprising a dry-type iron core filter reactor module, a high-voltage self-healing parallel capacitor module, an intelligent measurement and control protection integrated module, a heat dissipation dustproof adaptive adjustment module, a high-voltage insulation wiring terminal group, a fault positioning and early warning module and a remote monitoring communication module. All the modules are integrated into a whole through modular design. According to the invention, a modular integrated design is adopted, each functional module is uniformly arranged in the mining explosion-proof shell to form a uniform grounding loop, the shell meets the explosion-proof standard, the protection grade reaches IP65, and the high-grade insulation design of each module is matched, so that the underground high-dust, high-humidity and explosive environment is effectively adapted; the problems that a traditional device is large in potential safety hazard and poor in adaptability are thoroughly solved, and the safety and reliability of the device are remarkably improved.

The invention discloses a cable outer sheath fault detection method considering signal attenuation, and the method comprises the steps: S1, building a detection model of a clinging type cable outer sheath, and enabling the detection model to take two parallel cable metal sheaths as signal transmission lines; s2, establishing a distributed parameter model, wherein the distributed parameter model comprises a series resistor, a series inductor, a parallel conductor and a parallel capacitor per unit length; s3, establishing a shunt capacitance calculation model and calculating total shunt capacitance; s4, building a signal attenuation amplitude calculation model, evaluating the attenuation degree of the detection signal, and judging the applicability of the detection signal according to the attenuation degree; and S5, on the premise of judging that the signal is applicable, injecting a traveling wave signal into the cable metal sheath, and positioning a damage point of the cable outer sheath based on the reflected signal. According to the method, the problems that the fault detection precision is low and the signal applicability cannot be evaluated in advance due to serious signal attenuation in the tightly laid cable tunnel are solved, and the detection accuracy and reliability are remarkably improved.

The application provides a non-continuous three-phase rectifier adjustable power decoupling method, and relates to the field of power electronics. The method is characterized in that a capacitor equivalent circuit is connected in parallel to the DC side of a three-phase PWM rectifier, the capacitor equivalent circuit is composed of a first capacitor connected in series with an active negative capacitor circuit, and a digital signal controller is used to sample the relevant voltage and current signals of the AC side and the DC side, and the active negative capacitor capacitance is adjusted by controlling the switching tube, so that the equivalent capacitor circuit can be flexibly adjusted. The application does not require an additional DC power supply, the capacitance and inductance of the passive device used are small, and the volume advantage is significant. The closed-loop control has high precision and equivalent inhibition effect as the traditional large capacitor. The equivalent capacitance is adjusted only by software, the external physical structure does not need to be changed, and the adjustment range is wide. The preset DC side voltage fluctuation amplitude can be calculated and adjusted automatically, different unbalanced working conditions can be adapted, the fluctuation suppression demand can be met, different working modes can be switched according to the AC side working condition, and the application is not continuously operated, so that the switching loss is lower.

The application discloses a kind of Buck converter operating state online detection methods under CCM mode, parallel a known capacity capacitor at the output of Buck converter, collect the output voltage ripple before parallel capacitor and the output voltage ripple after parallel capacitor, then combine the average value of output voltage, the parameter of output filter capacitor can be calculated, and the performance of switching power supply will not be affected by parallel capacitor;Without additional excitation auxiliary measurement, without disassembling power supply, the operating state of Buck converter can be detected online, and Buck converter is not impacted in any way;In the long-term operation process of Buck converter, the working state and aging condition of Buck converter can be judged according to the parameter of capacitor, to achieve the purpose of Buck converter fault detection.

The invention discloses an LC interface filter which comprises a parallel capacitor and a series inductor with eddy current magnetic loss, and the structural design of the inductor (10) enables the eddy current magnetic loss to be far larger than magnetic hysteresis loss; the inductor is composed of a magnetic material tube (12), an electric conductor (14) is wound outside the magnetic material tube, and the magnetic material tube and the electric conductor are isolated through an insulating sheet (16).

The embodiment of the application discloses a parameter acquisition method of an oscillation waveform detection system, relates to the technical field of power system control, and accurately acquires the equivalent resistance value, the equivalent inductance value and the equivalent distributed capacitance value of a winding of a transformer to be measured, the output voltage of a high-voltage direct-current power supply, the maximum input voltage of a data acquisition module, the maximum charging current value allowed by a charging detection loop and the like, and based on the indexes, the first capacitance value of a parallel capacitor, the second capacitance value of a voltage division capacitor, the third capacitance value of a measurement capacitor and the resistance range of a current limiting resistor in the oscillation waveform detection system are acquired, the uncertainty caused by empirical design is avoided, the quality of generated oscillation waveforms is ensured to be stable and controllable, consistent and reliable detection results on transformers of different capacities and voltage grades are ensured, and the accuracy and universality of the oscillation wave detection method in practical application are improved.

A frequency synthesis circuit includes a first inductor coupled to receive a first input signal at an input frequency, and a second inductor coupled to receive second input signal at the input frequency and out-of-phase relative to the first input signal. The circuit has first and second transistors with control terminals coupled to the first and second inductors, respectively. A first resonant tank of an inductor in parallel with a capacitor is coupled between a power supply terminal and the first transistor. A second resonant tank of an inductor in parallel with a capacitor is coupled between the power supply terminal and the second transistor. The first and second resonant tanks are tuned to a selected harmonic of the input frequency. An injection-locked oscillator has inputs coupled to the first and second transistors.

The utility model discloses an intelligent power supply system, and specifically relates to the power supply management field, the intelligent power supply system comprises an input filter network, the input filter network comprises a resistor R7, one end of the resistor R7 is connected with an input terminal VIN, the other end of the resistor R7 is successively connected with three parallel capacitors, the three parallel capacitors are respectively a capacitor C2, a capacitor C3 and a capacitor C4, and the capacitor C2, the capacitor C3 and the capacitor C4 are connected with the input terminal VIN. The other ends of the three parallel capacitors are all connected with a ground wire GND and are used for filtering ripples of the input end VIN and stabilizing voltage; and the boost power conversion module comprises an inductor L1, one end of the inductor L1 is connected with an output node of the input filter network, and the other end of the inductor L1 is connected with a boost node N1. By constructing a multi-stage coupling control access including input filtering, boost control, overvoltage clamping, current sampling and output feedback regulation, a quick response to power disturbance, load fluctuation and an abnormal state and a self-adaptive power supply regulation mechanism are realized.

The invention discloses a self-healing parallel capacitor aging test device and method for an AC power system. The method comprises the following steps: S1, preparation before test; s2, carrying out a first-stage aging test; s3, carrying out a charge-discharge cycle test; s4, performing a second-stage aging test; and S5, detecting after the test. According to the self-healing parallel capacitor aging test device and method for the alternating-current power system, automatic control over the whole test process is achieved, it is guaranteed that test conditions meet the national standard requirement, the influence and closing impact on a power grid in the test process are eliminated, the accuracy and reliability of a test result are improved, and the test efficiency is improved. A standardized method is provided for performance evaluation of the capacitor, and the problems that an existing test device is low in integration and automation degree, poor in test precision, large in power grid influence and insufficient in safety protection are solved.

The utility model discloses a miniaturized LTCC low-pass filter with high out-of-band rejection, and the interior of a ceramic substrate is provided with an inner electrode, three inductors of an inductor layer and three parallel capacitors of a first capacitor layer form three resonators, and three transmission zero points are formed; the second capacitor layer and the third capacitor layer form a cross coupling capacitor, the third capacitor layer and the grounding layer form four grounding capacitors, and the three resonators are connected with one another and form a seven-order low-pass filter together with the four grounding capacitors; the bottom of the ceramic substrate is provided with an external electrode port, the external electrode port comprises two input / output ports and a grounding electrode port, the resonators are connected with the input / output ports, and the grounding capacitor is connected with a grounding point and the ports. According to the technical scheme, high suppression of multiple frequency multiplication is achieved, high-frequency warping points are suppressed, high-frequency stop-band suppression of the filter is improved, and the filter has the advantages of being small in size, low in loss, high in integration level, high in reliability and capable of being produced on a large scale.

A circuit includes an amplifier, a bias voltage node, and a first set of switches configured, based on a first reset signal being asserted, to couple amplifier input nodes to the bias voltage node and to short-circuit amplifier output nodes. First and second feedback branches each include a respective circuit network including parallel capacitors, with first ones of the capacitors directly connected to the amplifier input nodes. The first and second feedback branches further include a second set of switches intermediate the amplifier input nodes and second ones of the capacitors, and a third set of switches intermediate amplifier output nodes and the capacitors. These switches selectively couple the capacitors to the amplifier input and output nodes, based on a second reset signal being asserted. The second reset signal is asserted for a time interval exceeding a time interval in which the first reset signal is asserted.

A converter system, for example for vehicle-to-vehicle charging, comprises galvanically isolated modular first and second converters with the same maximum rated voltage, a DC voltage bus connecting the converters, and an electronic control unit. The DC bus input voltage is converted to an output voltage via switching control signals to the modular converters. The system's rated voltage can be the maximum of the input and / or output voltage, or it can be the maximum input voltage and approximately 50 percent of the maximum output voltage. The maximum input and output voltages can be the same. If the rated voltage is approximately 50 percent of the maximum input voltage, capacitors can be connected in parallel to the modular converters on one input side.Circuits can be connected to the bus to control the conversion of the input voltage via switching control signals.

The application discloses a kind of transmitter chip architecture of ultra-low area high output power, it is related to wireless communication circuit technical field.The architecture includes mutually coupled first single-core oscillator OSC1, second single-core oscillator OSC2, driving voltage synthesis transformer TFM1, power amplifier active core PA, output matching transformer TFM2 and parallel capacitor C1-C6.OSC1 and OSC2 are realized same frequency same phase oscillation by electrical or electromagnetic coupling, TFM1 is matched with C1-C4, and two-way oscillation voltage is superimposed in phase, generates amplitude doubling driving voltage, is directly input PA amplification, and is output after completing impedance matching by TFM2 and C5-C6 again.Compared with traditional oscillator, driving amplifier and power amplifier architecture, the application omits driving amplifier and interstage matching transformer, and the area of core circuit is ≤0.038mm 2 , output power reaches 13dBm, realizes the synergistic optimization of ultra-low area and high output power, and adapts miniaturization, high-performance communication demand.

The utility model discloses a high-capacity low-ESR laminated solid-state aluminum capacitor which comprises a shunt capacitor body, and the shunt capacitor body comprises a plurality of capacitor split bodies which are stacked up and down and connected in parallel. Each capacitor split body comprises a plurality of capacitor chips, a conduction frame and a shell, the capacitor chips and the conduction frame are arranged in the shell, the two surfaces of the conduction frame are both provided with a plurality of superposed capacitor chips, an anode pin and a cathode pin are respectively led out from the two sides, facing the shell, of the conduction frame, and the anode pin and the cathode pin are connected with the shell. The anode pins of the plurality of capacitor split bodies are connected in a conductive manner, and the cathode pins of the plurality of capacitor split bodies are connected in a conductive manner. According to the invention, the plurality of capacitor split bodies which are stacked up and down and connected in parallel are arranged, and the anode pin and the cathode pin of each capacitor split body are connected in a conducting manner, so that the capacity and the yield of the capacitor can be effectively improved.

The invention discloses a surface acoustic wave filter and electronic equipment, and belongs to the technical field of filters. The surface acoustic wave filter comprises: a resonator structure having a first finger strip extending along a first direction; the capacitor structure is connected with the resonator structure in parallel, the capacitor structure comprises two bus bars which are oppositely arranged, a target finger bar which is connected with one bus bar and is separated from the other bus bar is arranged between the two bus bars, and the target finger bar extends in the second direction; the capacitor structure is divided into first finger strip regions and second finger strip regions which are alternately arranged along the length direction of the bus bar; wherein the target finger strip in the first finger strip area is a first target finger strip, the target finger strip in the second finger strip area is a second target finger strip, and the finger strip parameters of the first target finger strip and the second target finger strip are different. The surface acoustic wave filter can reduce excitation of clutters.

The application discloses a band-pass filter with multiple zero points and high out-of-band suppression based on an IPD technology. Mainly includes main circuit, input and output port; the main circuit includes first parallel capacitor, first series capacitor, first parallel inductor, second parallel capacitor, second parallel inductor, second parallel capacitor, second series capacitor, third parallel capacitor, first series inductor, third series capacitor, fourth parallel capacitor, fourth series inductor, fourth series capacitor. The application adds four zero points to suppress high frequency and low frequency, realizes higher out-of-band suppression, and improves the filtering characteristic of the band-pass filter; and higher out-of-band suppression is realized by adopting an optimized circuit structure.

The application discloses a full-bridge phase-shift converter with voltage clamping, which comprises a transformer, a primary side circuit and a secondary side circuit. The secondary side circuit comprises a first synchronous rectification switch, a second synchronous rectification switch, an output inductor, a plurality of diodes, a capacitor, an energy release unit and an output capacitor. The capacitor provides a clamping voltage. The energy release unit is connected in parallel with the capacitor and converts the clamping voltage into an output voltage. The output capacitor is connected in parallel with the energy release unit and provides the output voltage.

The invention provides an equipment attitude identification-based wireless charging system anti-offset control method, which comprises the following steps of: firstly, acquiring electrical information of a primary side system under different roll angles and butt joint distances of equipment, specifically voltage and current at two ends of a shunt capacitor and a phase difference between the voltage and the current; the method comprises the following steps: establishing an equipment docking attitude parameter identification model by taking voltage and current at two ends of a shunt capacitor and a phase difference between the voltage and the current as input information and taking a roll angle and a docking distance of equipment as output information, and identifying a docking attitude of the equipment before starting stable charging to ensure that the equipment enters a charging process in an optimal attitude; in the stable charging process, the posture of the equipment is continuously monitored, and the problems of unstable charging, efficiency reduction and the like caused by equipment deviation due to factors such as ocean current impact and the like are solved in real time.

The utility model relates to the field of low-voltage parallel capacitors, and discloses a high-safety low-voltage parallel capacitor which comprises a cylindrical shell, a core rod coaxial with the shell is arranged in the shell, a capacitor assembly is arranged on the periphery of the core rod, and a wire holder electrically connected with the capacitor assembly is arranged above the capacitor assembly. An explosion-proof belt which is recessed towards the inside of the shell is fixed on the peripheral side wall of the shell, when the capacitor assembly is heated to drive the shell to expand, the explosion-proof belt is straightened from a folded state, the connection between the capacitor assembly and the wiring section terminal is broken by expansion of the shell, and the capacitor assembly does not continue to heat any more. The risk that the shell continues to expand and explode is avoided, and the use safety performance of the low-voltage parallel capacitor is improved.

The invention relates to the technical field of intelligent power grids, and discloses an efficient energy-saving system of an intelligent power grid. Comprising an intelligent reactive power compensation regulator, a shunt capacitance control switch, a capacitor bank and a three-phase current transformer, the intelligent reactive power compensation regulator comprises a digital quantitative monitoring module and an intelligent computing control module, and the digital quantitative monitoring module collects information in real time and sends the information to the intelligent computing control module, so that the intelligent computing control module generates an optimal output control combination instruction; the shunt capacitance control switch adopts a zero-potential switch, and the zero-potential switch is switched on or switched off when the potential difference between the two ends is approximately zero; and the intelligent reactive power compensation regulator sends the optimal output control combination instruction to the shunt capacitance control switch to control the connection or disconnection of the capacitor bank. Parameters are collected in real time through the digital quantitative monitoring module, an optimal compensation strategy is generated in combination with the intelligent operation control module, and the hysteresis and error problems of traditional simulation control are solved.

The application discloses a commutation margin hybrid compensation system, method and device and related equipment, and the system comprises at least one 12-pulse converter bridge, at least two converter transformers, a smoothing reactor, a network-side AC bus, at least two commutation margin hybrid compensation devices, the commutation margin hybrid compensation device comprising a valve-side AC bus, a shunt capacitor bank and at least one current source converter; the shunt capacitor bank and the current source converter are both connected in parallel on the valve-side AC bus; the shunt capacitor bank is configured to provide reactive compensation to the 12-pulse converter bridge and filter out high-order harmonics; the current source converter is configured to increase the actual extinction angle of the 12-pulse converter bridge by outputting a preset harmonic current. The scheme effectively increases the commutation margin, reduces the risk of commutation failure, accurately compensates for reactive power and harmonics nearby, saves the traditional AC filter, reduces the occupied area, and reduces the loss and cost.

The application discloses a parallel structure of power load capacitance, and solves the problem of fixed load capacitance mode in the prior art, which is inconvenient to disassemble and assemble. The application comprises a capacitance module, wherein the capacitance module is provided with an input end and an output end; the capacitance module comprises at least two groups of series-connected busbars, the busbars are provided with a plurality of evenly-distributed capacitance supports, and the capacitance supports are provided with a plurality of evenly-distributed and parallel-connected capacitors. The application has the advantages of simple and reliable structure, convenience in disassembly and assembly, small leakage inductance, parallel connection of multiple capacitors through the parallel structure of power resonance capacitance power capacitors, balanced alternating current and voltage among the capacitors, and reduction of induced inductance caused by the parallel capacitors.

The present invention provides a parallel binary model for measuring a capacitance value of a gate oxide layer of a gate oxide MOS device. The parallel binary model is a parallel circuit model formed through parallel connection of a parallel capacitor Cp and an equivalent resistor Rp. The parallel binary model is used to measure the gate oxide MOS device through an LCR meter by adopting frequency f1 to obtain parallel capacitance Cp1 and parallel conductance Gp1. A dissipation factor D1 is calculated. In a case that D1<0.1, the measured parallel capacitance Cp1 is the capacitance value of the gate oxide layer of the gate oxide MOS device. In a case that D1>0.1, the parallel binary model is used to measure the gate oxide MOS device through the LCR meter by adopting frequency f2 to obtain parallel capacitance Cp2 and parallel conductance Gp2.

The utility model relates to the technical field of chip capacitors, in particular to a chip capacitor with a parallel structure. The chip capacitor comprises chip capacitors, a parallel connection assembly is arranged between the two chip capacitors, a protection assembly is arranged at the upper ends of the chip capacitors, the parallel connection assembly comprises installation grooves formed in the two sides of the upper ends of the chip capacitors, and electrode plates are installed at the bottoms of the inner walls of the two installation grooves. When the chip capacitors need to be connected in parallel to increase the capacitance, the chip capacitor on the upper side is dragged, so that the positive electrode and the negative electrode of the chip capacitor on the upper side are clamped into the chip capacitor fixing groove on the lower side respectively, the positive electrodes and the negative electrodes of the two chip capacitors are aligned, meanwhile, the fixing rod is clamped into the fixing groove, and protrusions are arranged on the surface of the fixing rod; the two chip capacitors are fixed and used in the vertical space of the circuit board, so that the parallel capacitors are reasonably used in the space of the circuit board as far as possible, and the labor intensity of workers is reduced.