4 results about "Boost inverter" patented technology

This invention relates to a reference sampling phase-locked loop (PLL) adapted for low-voltage applications, comprising: a reference sampling phase detector module, a low-pass filter module, a voltage-controlled oscillator (VCO), a frequency divider module, and a clock signal generation module. This invention achieves normal sample-and-hold functionality by employing a high-level boost inverter to reduce the on-resistance of the sampling switch and decrease the sampling time constant under low voltage. Simultaneously, it allows for the use of a larger sampling capacitor to improve noise, enabling normal sampling operation of the PLL under low voltage and superior clock jitter performance. Furthermore, by adding a low-pass filter at the output of the reference sampling phase detector, high-frequency poles are introduced, improving reference spurious signals without affecting the phase margin. Finally, a combination of a current-mode logic divider and a multi-mode programmable divider is used to ensure normal operation of the reference sampling PLL under low voltage and superior spurious and clock jitter performance.

This application discloses an interleaved parallel three-phase single-stage boost inverter and its carrier phase-shift modulation method, device, and medium, relating to the field of power electronic converters. The method includes: generating a three-phase modulation wave, the three-phase modulation wave corresponding to the three-phase output of the interleaved parallel three-phase single-stage boost inverter; generating a carrier signal, wherein the three-phase carrier signal is phase-shifted by 120° sequentially, and the carrier signal corresponding to the two interleaved bridge arms in each phase is phase-shifted by 180°; comparing the three-phase modulation wave with the two carrier signals of the corresponding phase respectively to generate a drive signal for each switch; controlling the on / off state of the switch in each interleaved bridge arm according to the drive signal, so that the interleaved parallel three-phase single-stage boost inverter switches between different operating states, realizing current sharing and ripple cancellation. This application reduces input current ripple, inductor volume, and device stress.

The application discloses a single-stage boost-buck dual four-tube Buck-Boost inverter with parallel input and differential output. The inverter comprises a main power circuit and a control circuit, wherein the main power circuit comprises two-phase high-frequency operated four-tube Buck-Boost converters, each phase four-tube Buck-Boost converter is composed of two half-bridges, a main power inductor and filter capacitors on the input and output sides; the control circuit comprises input and output voltage sampling circuits, inductor current sampling circuits, output current sampling circuits, logic gate circuits and single-chip microcomputers; the input sides of the two-phase four-tube Buck-Boost converters of the main power circuit are connected in parallel, and the output sides are connected in differential output, thereby realizing single-stage boost-buck inverter operation in a wide input voltage range. The application widens the input voltage range of the inverter, and has the advantages of high switching frequency, high power density, soft switching of all switching tubes and low inductor current effective value.

The application relates to the field of power electronics, and discloses a single-stage boost inverter, which comprises a left bridge arm, a right bridge arm, a first inductor L3, a second inductor L4, a controller, a first filter capacitor and a second filter capacitor, the left bridge arm comprises a second upper tube S7 and a second lower tube S8, the connection point of the second upper tube S7 and the second lower tube S8 constitutes a left bridge arm output node Vacl, the right bridge arm comprises a first upper tube S5 and a first lower tube S6, and the connection point of the first upper tube S5 and the first lower tube S6 constitutes a right bridge arm output node Vacn. Through the mode that the left and right bridge arms alternately participate in boosting in positive and negative half cycles, the first inductor L3 and the second inductor L4 respectively complete energy storage and energy release in different half cycles, and the reference point of the boost loop is formed in the bridge arm clamping mode, so that the functions of boosting and inverting are realized simultaneously under the single-stage topological structure.