312 results about "Gate current" patented technology

An AC controller which provides programmable switching of AC power flow, together with producing a source of DC power for operating the AC controller. The AC controller is connected in series with only one side of the AC power source and the AC load. The AC controller utilizes a thyristor for AC power control switching. During the operation, the AC controller steals a small portion of each half-cycle of the AC power to provide DC power to the AC controller. The AC controller enables the flow of AC current by providing a gate current pulse at any predetermined time during the half cycle. Once the thyristor is ON, the AC current flows through the thyristor until the AC cycle is at or near zero. To provide an OFF state, the AC controller does not provide a gate current pulse. The AC controller uses an microcontroller for the programmable capability. The AC controller can be programmed to provide a flashing light function, a time delay off mode, an automatic fade mode, a dimming function, a burglar deterrent function, and a time delay dim function. With a three-position switch which can replace existing types of wall switches, three modes of operation are achieved: ON, OFF, and MODE. The mode position initiates operation of the special function of the controller.

A two-wire load control device (such as, a dimmer switch) for controlling the amount of power delivered from an AC power source to an electrical load (such as, a high-efficiency lighting load) includes a thyristor coupled between the source and the load, a gate coupling circuit coupled between a first main load terminal and the gate of the thyristor, and a control circuit coupled to a control input of the gate coupling circuit. The control circuit generates a drive voltage for causing the gate coupling circuit to conduct a gate current to thus render the thyristor conductive at a firing time during a half cycle of the AC power source, and to allow the gate coupling circuit to conduct the gate current at any time from the firing time through approximately the remainder of the half cycle, where the gate coupling circuit conducts approximately no net average current to render and maintain the thyristor conductive.

Aspects of the present invention provide an enhancement mode (E-mode) insulated gate (IG) double heterostructure field-effect transistor (DHFET) having low power consumption at zero gate bias, low gate currents, and / or high reliability. An E-mode HFET in accordance with an embodiment of the invention includes: top and bottom barrier layers; and a channel layer sandwiched between the bottom and the top barrier layers, wherein the bottom and top barrier layers have a larger bandgap than the channel layer, and wherein polarization charges of the bottom barrier layer deplete the channel layer and polarization charges of the top barrier layer induce carriers in the channel layer; and wherein a total polarization charge in the bottom barrier layer is larger than a total polarization charge in the top barrier layer such that the channel layer is substantially depleted at zero gate bias.

A smart dimmer for control of a lighting load from an AC power source can replace any switch in a three-way or four-way lighting control system. The smart dimmer can be connected on the line-side or the load-side of a three-way system with a standard three-way switch in the other location. According to one embodiment of the present invention, the dimmer includes two triacs to control the intensity of the connected lighting load. The dimmer preferably includes two gate drive circuits coupled to the gates of the triacs for rendering the triacs conductive each half-cycle of the AC power source. The gate drive circuits include sensing circuits for detect whether the gates currents are flowing after the triacs are rendered conductive. A controller is operable to determine the state of the lighting load in response to whether the gate current is flowing or not flowing.

A two-wire load control device (such as, a dimmer switch) for controlling the amount of power delivered from an AC power source to an electrical load (such as, a high-efficiency lighting load) includes a thyristor coupled between the source and the load, a gate coupling circuit coupled between a first main load terminal and the gate of the thyristor, and a control circuit coupled to a control input of the gate coupling circuit. The control circuit generates a drive voltage for causing the gate coupling circuit to conduct a gate current to thus render the thyristor conductive at a firing time during a half cycle of the AC power source, and to allow the gate coupling circuit to conduct the gate current at any time from the firing time through approximately the remainder of the half cycle, where the gate coupling circuit conducts approximately no net average current to render and maintain the thyristor conductive.

In order to provide a switching device driving unit that, even in a case where a threshold voltage of a switching device is varied, can suppress variations in switching speed, and prevent a power loss caused by an unnecessary gate current in a constant ON operation state of the switching device, so that a desired slew rate can be easily set, a control current source circuit sets to different values based on a first input driving signal, in a driving current to be source-outputted to a gate or a base of the switching device, a current in a stage of an initial ON operation of a switching operation of the switching device and a current in a stage after completion of the switching operation.

A load control device for controlling the power delivered from an AC power source to an electrical load includes a thyristor, a gate coupling circuit for conducting a gate current through a gate of the thyristor, and a control circuit for controlling the gate coupling circuit to conduct the gate current through a first current path to render the thyristor conductive at a firing time during a half cycle. The gate coupling circuit is able to conduct the gate current through the first current path again after the firing time, but the gate current is not able to be conducted through the gate from a transition time before the end of the half-cycle until approximately the end of the half-cycle. The load current is able to be conducted through a second current path to the electrical load after the transition time until approximately the end of the half-cycle.

Usually, in power converters, the load on a MOSFET is inductive, and the current cannot change rapidly. The drain current is the upper limit of the Miller current, so that if the gate current is larger than the drain current, the gate capacitance will continue to discharge and there can be no Miller shelf. If a parallel capacitor is used with a MOSFET, once the drain voltage starts to rise, the load current divides, placing a new lower limit on the Miller current. To drive a MOSFET with a gate current that exceeds the drain current, the circuit impedances have to be very low, suggesting a new geometry and packaging arrangement for the MOSFET and gate drive. A compatible gate turn of circuit is also disclosed.

Disclosed is a switching gate driver of an IGBT device, including a resistor unit to control a gate current of the IGBT device; and a voltage reader that outputs a control signal to control a variable resistor unit of the resistor unit to the resistor unit, according to a collector-emitter voltage of the IGBT device.

A semiconductor power conversion apparatus capable of protecting an IGBT from an overvoltage by supplying a sufficient gate current to the gate of the IGBT. The IGBT is protected from the overvoltage by connecting clamping elements connected in series between a collector of the IGBT and the gate thereof, and by connecting a resistor to each of different junction points between the clamping elements connected in series.

The present invention relates to a monolithic component of protection of a line against overvoltages than a determined positive threshold or smaller than a determined negative threshold, including in antiparallel a cathode-gate thyristor (Th1) and an anode-gate thyristor (Th2), the gate of the cathode-gate thyristor being connected to a negative threshold voltage (−V) via a gate current amplification transistor (T1), the gate of the anode-gate thyristor being connected to a positive threshold voltage (+V). The monolithic component is made in a substrate divided into wells separated by isolating walls (3, 4), the smaller surfaces of which are coated with insulating layers (5, 6), the smaller surface of the substrate being uniformly coated with a metallization (M1).

Various methods for forming semiconductor devices are provided that include the step of implanting dopants into the devices to achieve doping concentrations that allow complementary n- and p-channel SJT behavior with devices of substantially equal gate length and gate width. Moreover, complementary SJT devices are provided that include n- and p-channel devices that have approximately equal gate lengths and widths. SJT devices may be appropriately doped and configured such that input current and the output current both vary substantially exponentially with a gate-source voltage in the sub-threshold mode, and such that the drain current varies substantially linearly with the gate current through a substantially constant current gain that is given by a ratio of the drain current to the gate current.

Disclosed is a semiconductor apparatus having an IGBT, which includes a switch SWon 1 for supplying a gate current during an operation for turning on the gate of the IGBT, a switch SWoff 1 for discharging a gate capacitance during an operation for turning off the gate, a switch SWon 2 for increasing the gate current, a timer 14 for turning on the switch SWon 2 in conjunction with the turn-on of the switch SWon 1 and then maintaining the turn-on of the switch SWon 2 only for a first predetermined time, a switch SWoff 2 for increasing the discharge current during the gate turn-off operation, and a timer 15 for turning on the switch SWoff 2 in conjunction with the turn-on of the switch SWoff 1 and then maintaining the turn-on of the switch SWoff 2 only for a second predetermined time.

In a gate driving circuit, when a driving target device is turned on, an auxiliary driving element is turned on to form a closed circuit comprising a DC power source, a reactor, an auxiliary driving element and an OFF-driving element, and make reactor current flow in the direction from a power source intermediate point to an output point in advance. Just before the driving target device is turned on, the OFF-driving element is turned off to form a resonance circuit comprising the reactor, the auxiliary driving element and the gate capacitance, and make gate current (reactor current) flow so that the gate capacitance is charged by using resonance phenomenon of the resonance circuit.

A method of predicting a lifetime of a semiconductor device at a predetermined operating condition includes performing a hot carrier injection (HCI) accelerated stress test on a plurality of MOS transistors. For each HCI test, a HCI lifetime and a maximum substrate or gate current are determined. The HCI test data is fit with a hot carrier lifetime model and fitting parameters are obtained. A wafer level test is performed on at least 10N transistors in which a maximum substrate or gate current is determined for each transistor. A median lifetime to failure is determined for the statistical distribution of maximum substrate or gate current values at the predetermined operating condition. From the determined median lifetime to failure, a projected lifetime at a fractional cumulative failure is calculated.

Electronic circuitry is described having a first transistor having a first gate dielectric located between an electrically floating gate and a semiconductor substrate. The first injection current flows through the first gate dielectric to establish a first amount of electrical charge on the gate electrode. The electronic circuitry also includes a second transistor having a second gate dielectric located between the gate electrode and the semiconductor substrate. A band-to-band tunneling current flows between valence and conduction bands of the second transistor to create a second injection current that flows through the second gate dielectric to establish the first amount of electrical charge on the gate electrode. Non volatile memory cell circuits having the above described circuitry are also described.

JFET and MESFET structures, and processes of making same, for low voltage, high current and high frequency applications. The structures may be used in normally-on (e.g., depletion mode) or normally-off modes. The structures include an oxide layer positioned under the gate region which effectively reduces the junction capacitance (gate to drain) of the structure. For normally off modes, the structures reduce gate current at Vg in forward bias. In one embodiment, a silicide is positioned in part of the gate to reduce gate resistance. The structures are also characterized in that they have a thin gate due to the dipping of the spacer oxide, which can be below 1000 angstroms and this results in fast switching speeds for high frequency applications.

A junction field-effect transistor (JFET) with a gate region that includes two separate sub-regions having material of different conductivity types and / or a Schottky junction that substantially suppresses gate current when the gate junction is forward-biased, as well as complementary circuits that incorporate such JFET devices.

Disclosed is a semiconductor apparatus having an IGBT, which includes a switch SWon 1 for supplying a gate current during an operation for turning on the gate of the IGBT, a switch SWoff 1 for discharging a gate capacitance during an operation for turning off the gate, a switch SWon 2 for increasing the gate current, a timer 14 for turning on the switch SWon 2 in conjunction with the turn-on of the switch SWon 1 and then maintaining the turn-on of the switch SWon 2 only for a first predetermined time, a switch SWoff 2 for increasing the discharge current during the gate turn-off operation, and a timer 15 for turning on the switch SWoff 2 in conjunction with the turn-on of the switch SWoff 1 and then maintaining the turn-on of the switch SWoff 2 only for a second predetermined time.

In a gate driving circuit, when a driving target device is turned on, an auxiliary driving element is turned on to form a closed circuit comprising a DC power source, a reactor, an auxiliary driving element and an OFF-driving element, and make reactor current flow in the direction from a power source intermediate point to an output point in advance. Just before the driving target device is turned on, the OFF-driving element is turned off to form a resonance circuit comprising the reactor, the auxiliary driving element and the gate capacitance, and make gate current (reactor current) flow so that the gate capacitance is charged by using resonance phenomenon of the resonance circuit.

An arcing protection circuit for the screen and accelerator grids of an ion thruster engine includes an impedance, which in one embodiment, is fixed, and in another, is variable, coupled in series between the accelerator grid of the engine and a current return path of the grid in such a way that an increase in accelerator grid current resulting from a plasma arc occurring between the screen grid and the accelerator grid is converted by the impedance into a rapid reduction in the voltage difference between the screen and accelerator grids, thereby extinguishing the arc. The arcing protection circuit also includes a monitoring circuit coupled to the accelerator grid that senses an increase in the voltage on the accelerator grid resulting from the plasma arc, and in response thereto, causes the accelerator grid power supply to reduce the voltage on the accelerator grid.

The invention provides a switching device driving unit that, even in a case where a threshold voltage of a switching device is varied, can suppress variations in switching speed, and prevent a power loss caused by an unnecessary gate current in a constant ON operation state of the switching device, so that a desired slew rate can be easily set. A control current source circuit (21) sets to different values based on a first input driving signal (UD), in a driving current to be source-outputted to a gate or a base of the switching device (11), a current (I1+I2) in a stage of an initial ON operation of a switching operation of the switching device and a current (I1) in a stage after completion of the switching operation.

Disclosed is an apparatus for protecting a secondary battery, in which, when the secondary battery such as a lithium-ion secondary battery is exposed to high temperature exceeding a working range due to a change in external environment, external impacts, and so on, or heated due to spontaneous generation of heat caused by internal defects, the secondary battery is discharged. The apparatus includes a thyristor or transistor having an anode and a cathode connected both terminals of the secondary battery respectively, and shorting both terminals of the secondary battery when gate current is supplied, and a temperature sensor detecting temperature of the secondary battery and supplying the gate current to the thyristor or transistor when the detected temperature is higher than predetermined temperature. Thereby, when the temperature of the secondary battery increases due to any one of a change in external environment, external impacts, heat generation of the battery caused by internal defects, overcharge, and the like, the secondary battery is discharged into a safe state, so that it is possible to prevent the secondary battery from swelling, inflammation, or detonation to thus improving safety.

The invention discloses a magnetic-flux-gate current sensor, and relates to a device used for measuring current. The magnetic-flux-gate current sensor is provided with a magnetism gathering shell and adopts winding orthogonal distribution, and comprises a magnetic-flux-gate detecting probe and a signal processing circuit, wherein the magnetic-flux-gate detecting probe consists of a magnetic core with an annular magnetic core, and an excitation winding with a secondary feedback winding; the signal processing circuit is divided into two parts, namely an exciting circuit and a zero flux detecting circuit; the exciting circuit part further comprises an exciting signal generating circuit and a signal driving circuit; the zero flux detecting circuit part further comprises two parts, namely an integrating comparator circuit and an H-bridge driving circuit. According to the magnetic-flux-gate current sensor, the coupling among windings is eliminated; meanwhile, the magnetism gathering shell is introduced, effective magnetic fields are gathered, and the influence caused by surrounding stray magnetic fields is shielded; the defect of poorer accuracy of a current measurement result caused by a greater output error of the existing magnetic-flux-gate current sensor generated in actual measurement is overcome; the measurement sensitivity is further improved.

The invention discloses a driving circuit of a silicon-carbide semiconductor field-effect transistor. The driving circuit comprises a PWM control circuit, a driving signal amplifying circuit, an opening circuit, a turning-off circuit, a gate current-increasing circuit and a voltage change rate control circuit. With the gate current-increasing circuit, the driving current is increased during the opening process of the SiC MOSFET and the rising of the gate-source voltage of the SiC MOSFET is accelerated, so that the opening speed of the SiC MOSFET is increased. With the voltage change rate control circuit, the Miller capacitance between the SiC MOSFET drain and gate is enhanced and the SiC MOSFET drain-source voltage change rate is reduced, so that the current spike during opening of the SiCMOSFET is reduced. After the SiC MOSFET drain-source voltage does not change, a voltage control switch is turned off to avoid the SiC MOSFET false conduction caused by the crosstalk, so that the safeoperation of the SiC MOSFET is ensured.