57 results about "Tunneling current" patented technology

The invention relates to the technical field of quantum computing and molecular electronic devices, in particular to a probabilistic bit device based on polyfluoroaryl methyl free radicals and a preparation method of the probabilistic bit device. According to the probabilistic bit device, the coupling efficiency of molecules and electrodes is improved by virtue of the characteristic that the paramagnetic unpaired electron spin state of tri (polyfluoroaryl) methyl free radical molecules can be used as a random expansion physical entropy source and high electronegativity and stability formed by modification of a plurality of strong electron-withdrawing fluorine atoms in the molecules. During the operation period of the device, the spin fluctuation can efficiently regulate and control tunneling current passing through molecules, promote random conversion between output high and low current states, show excellent random binary fluctuation characteristics, and simultaneously have high sensitivity and long coherence time. Compared with the prior art, the device has remarkable advantages in the aspects of device stability, energy efficiency ratio and external field controllability. The preparation method is simple and convenient to operate, mild in reaction condition and beneficial to large-scale production.

The invention discloses an atomic-scale construction method for manufacturing a semiconductor substrate quantum simulator, which comprises the following steps: firstly, depositing singly distributed metal atoms on a semiconductor substrate at a controllable deposition rate by adopting a vacuum thermal evaporation method, and then depositing metal atoms on the semiconductor substrate at a controllable deposition rate by utilizing a longitudinal control method of a scanning tunneling microscope (STM). The metal atoms adsorbed on the surface of the substrate are carried at a target position by accurately regulating and controlling the dragging speed of the needle tip, the tunnel junction bias voltage and the tunneling current, so that lifting, placing and moving of a single atom are realized. The construction of artificial quantum dots and quantum dot molecules is realized by regulating and controlling the distance between metal atoms. A source electrode, a drain electrode and a grid electrode of quantum dot molecules are controlled in an integrated mode through vacuum evaporation, and the quantum simulator capable of simulating quantum behaviors of a specific molecular structure is formed. According to the invention, the coupling strength of the artificial quantum dot molecules is accurately regulated and controlled through the external grid voltage, and the quantum characteristics of molecule front track filling and electron transport kinematics thereof can be accurately simulated.

The application relates to the technical field of wireless communication, and discloses a digital predistortion method for improving the linearity of a power amplifier in a phased array system, which comprises the following steps: step one, acquiring nonlinear parameters of a power amplifier under dynamic load in real time, wherein the nonlinear parameters comprise input signal amplitude and phase characteristics, temperature parameters and quantum tunneling current parameters; step two, generating a predistortion compensation signal based on the nonlinear parameters, wherein the predistortion compensation signal comprises a quantum phase compensation term and a dynamic phase change compensation term; and step three, superimposing the predistortion compensation signal to an original input signal to generate a predistortion modulation signal. The application improves the linearity of the power amplifier by introducing the quantum phase compensation term and the dynamic phase change compensation term, and improves the accuracy of predistortion compensation by accurately acquiring the nonlinear parameters in real time under the dynamic load environment.

The invention discloses an adjacent tunnel fluid channeling ratio simulation test device and method combined with boundary conditions, the adjacent tunnel fluid channeling ratio simulation test device combined with the boundary conditions comprises an upstream tunnel model, a downstream tunnel model and a middle section road surface, and the side surface of the middle section road surface is provided with a crosswind simulation mechanism. And a full-spectrum lamp is arranged above the middle section of the road surface. The invention further relates to an adjacent tunnel fluid channeling ratio simulation test method in combination with the boundary conditions. According to the method, the sulfur hexafluoride (SF6) concentration is used as a basis for quantitatively calculating the fluid channeling ratio, fluid channeling analysis of traffic pollutants and high-temperature fire smoke can be combined, and a more accurate adjacent tunnel pollutant fluid channeling ratio is obtained by combining terrain wind environment boundary conditions and pavement thermal environment boundary conditions; and more reliable experimental data is provided for the design of adjacent tunnels and the type selection of ventilation and fire fighting equipment.

The application provides a P-on-n type tellurium cadmium mercury in-situ growth embedded planar heterojunction detector, characterized by comprising, from bottom to top, a substrate material layer, an n-type absorption layer, an n-type isolation grid layer for isolating pixels, an array P-type cap region located in the isolation grid of the n-type isolation grid layer, a passivation layer covering the n-type isolation grid layer and the array p-type cap region, an electrode contact hole arranged in the array P-type cap region and not covered by the passivation layer, and a contact electrode layer arranged in the electrode contact hole. The n-type isolation grid layer is used for isolating tellurium cadmium mercury heterojunction materials into independent pixels, the array P-type Cap region is used for growing and forming a pixel structure, a tellurium cadmium mercury p-on-n heterojunction detector is obtained, damage to the tellurium cadmium mercury material is effectively avoided, leakage caused by poor coverage and interface compactness of the passivation layer is avoided through planar passivation, interface defects are reduced, tunneling current is inhibited, and the performance of the detector is improved.

The application discloses a kind of based on van der waals contact vertical p-n junction diode and preparation method, semiconductor device.The two-dimensional material vertical p-n junction diode includes metal top electrode, p-type two-dimensional material, n-type two-dimensional material and bottom electrode from top to bottom vertically stacked, wherein, the material between adjacent two layers is formed by van der waals force van der waals contact, so that the material of adjacent two layers mutually adhere and do not fall off.Based on the interface of vertical p-n junction diode of van der waals contact is flat and has no defect and lattice damage, avoid the damage of traditional evaporation method to two-dimensional material lattice, make that the schottky barrier and tunneling current caused by fermi pinning in device significantly reduce, to greatly improve the rectification performance of the device.The application solves the technical problem that existing two-dimensional material vertical p-n junction device has schottky barrier and larger tunneling current.

The embodiment of the invention provides an array substrate and a display panel. The array substrate comprises a substrate body, an active layer arranged on one side of the substrate body and a source and drain electrode layer arranged on the side, away from the substrate body, of the active layer, the active layer comprises a channel part and doping parts located on the two sides of the channel part, the source and drain electrode layer comprises a connecting electrode, the connecting electrode comprises a first conductive part and a second conductive part, and the first conductive part is connected with the second conductive part. The conductivity of the first conductive part is smaller than that of the second conductive part, the second conductive part is arranged on the side, away from the substrate, of the first conductive part, and the first conductive part is electrically connected with the doping part; according to the thin film transistor, the contact impedance between the first conductive part and the doping part is smaller than 10000 ohms, tunneling current between the first conductive part and the doping part is increased, the device performance of the thin film transistor is improved, and the accuracy of data voltage received by the pixel electrode is guaranteed.

Example embodiments of the present disclosure relate to a simulation method for a semiconductor device, an electronic device and a storage medium. The method comprises: discretizing a barrier-related parameter based on a predetermined range and a step length of the predetermined barrier-related parameter to generate a plurality of first data points; and determining a transmission coefficient corresponding to each of the plurality of first data points, wherein the transmission coefficient comprises a first transmission coefficient corresponding to a first barrier unit having a constant barrier height and a second transmission coefficient corresponding to a second barrier unit having a linearly varying barrier height. Embodiments of the present disclosure can efficiently and accurately calculate the barrier transmission coefficient for any shape barrier, improve the calculation efficiency of the tunneling current, and thus reduce the calculation amount and save costs.

The application relates to a base sequencing verification method based on ion current and tunneling current characteristics, which comprises the following steps: measuring ion current and tunneling current; comparing the drop of the ion current with a standard ion current drop to obtain the classification probability of the base corresponding to the ion current belonging to the base corresponding to the standard ion current drop; comparing the tunneling current with a standard tunneling current to obtain the classification probability of the base corresponding to the tunneling current belonging to the base corresponding to the standard tunneling current; distributing a time weight to the classification probability of the ion current according to the time of measuring the ion current relative to the time of measuring the tunneling current; inputting the classification probability of the ion current, the time weight of the classification probability of the ion current and the classification probability of the tunneling current into a neural network model to obtain a probability; and taking the base type corresponding to the maximum probability as the type of a base to be identified. The application can improve the accuracy and reliability of base identification and reduce the error rate of base identification.

The invention provides a light-emitting diode, a light-emitting device and a light-emitting device. According to the invention, the P-type doped first ohmic contact layer is formed on one side of the N-type semiconductor layer, and the first electrode formed by the transparent conductive material is formed above the first ohmic contact layer. The first electrode and the P-type first ohmic contact layer can form forward current conduction from the first ohmic contact layer to the first electrode, and on the other hand, a strong built-in electric field is formed between the heavily-doped P-type first ohmic contact layer and the N-type semiconductor layer, so that the valence band top electron energy level of the P side is higher than the conduction band bottom electron energy level of the N side; therefore, a forward tunneling current from the N-type semiconductor layer to the P-type first ohmic contact layer can be generated under the action of an external electric field, so that the light-emitting diode has good electrical performance; a metal material layer is not formed between the first electrode and the first ohmic contact layer any more, so that light absorption and shielding are reduced, and the light emitting effect of the light emitting diode is improved.

A memory array and a structure of the memory array are provided. The memory array includes flash transistors, word lines and bit lines. The flash transistors are arranged in columns and rows. The flash transistors in each column are in serial connection with one another. The word lines are respectively coupled to gate terminals of a row of the flash transistors. The bit lines are respectively coupled to opposite ends of a column of the flash transistors. Band-to-band tunneling current at a selected flash transistor is utilized as read current during a read operation. The BTB tunneling current flows from one of the source / drain terminals of the selected flash transistor to the substrate, rather than flowing from one of the source / drain terminals to the other. As a result, charges stored in multiple programming sites of each flash transistor can be respectively sensed.

The application discloses an in-situ transmission electron microscope sample rod integrated with a scanning tunneling microscope and a detection method, and belongs to the technical field of electron microscopes. The sample rod comprises a sample rod body, an axial STM probe assembly integrated with the sample rod head, a front-end rotatable sample support and a linear-rotation conversion driving mechanism. The linear-rotation conversion driving mechanism converts axial linear motion into angular displacement, and drives the rotatable sample support to be in-situ flipped by 90 DEG between a horizontal TEM mode and a vertical STM mode. In the STM mode, the sample surface is parallel to the electron beam and opposite to the STM probe tip, and at the same time, an automatic electrical contact assembly is closed to realize reliable grounding of the sample. The application effectively solves the problems of geometric visual angle conflict, electron beam scattering interference and unstable grounding existing in the traditional combined technology, and realizes lossless, high signal-to-noise ratio in-situ switching of transmission imaging and tunneling current analysis in a vacuum environment.

The application discloses a Schottky transistor realizing a metal-semiconductor tunneling Schottky junction and a preparation method thereof, and belongs to the technical field of semiconductor electronic devices. The application utilizes the characteristic that the width of a depletion layer is inversely proportional to the tunneling strength, constructs a Schottky contact and an ohmic contact between a metal and a semiconductor, limits the width of the depletion layer by using an external physical means to obtain a semiconductor material with an extremely thin physical thickness, and applies a gate voltage to modulate the width of a Schottky barrier of a metal-semiconductor Schottky junction generated by the Schottky contact, so as to realize the tunneling effect of electrons from the semiconductor material to the metal material. The width of the barrier of the metal-semiconductor interface is dynamically modulated by the gate voltage, so that the tunneling current is accurately controlled.

The present invention provides a single-molecule detection device and method based on electrochemical gating technology in the quantum tunneling region. It is a detection technology that regulates the alignment of molecular energy levels and adjusts molecular conductivity by regulating gate voltage. A functionalized tunneling electrode is prepared at the tip of a nanopipette and placed in a solution containing a single molecule. The gate potential and bias voltage are dynamically adjusted, and the tunneling current signal flowing through the single molecule is recorded and analyzed in real time. It can actively regulate the structure, charge state and energy state of the single molecule. According to the conductivity change spectrum of the single molecule under different potential conditions, dynamic detection of the single molecule is achieved, significantly improving the detection accuracy of single molecules based on tunneling electrode detection.

The invention discloses a preparation method of a laminated PbS quantum dot detector, and belongs to the technical field of infrared detectors. The method comprises the following steps: preparing a ligand and a dispersing agent; providing a substrate; preparing a bottom electrode on the substrate; preparing a hole transport layer on the bottom electrode, wherein the hole transport layer comprises a NiOx thin film and a PbS-EDT thin film; preparing a long-wave light absorption layer on the hole transport layer, wherein the long-wave light absorption layer comprises 2000nm PbS CQD; preparing a short-wave light absorption layer on the long-wave light absorption layer, wherein the short-wave light absorption layer comprises 1550nm PbS CQD; preparing an electron transport layer on the short-wave light absorption layer, wherein the electron transport layer comprises a C60 thin film and a thin film; and preparing a top electrode on the electron transport layer. According to the method, the short-wave light absorption layer and the electron transmission layer are in direct contact to form a main junction, the electron tunneling potential barrier is increased by utilizing the wide-band gap characteristic of the short-wave light absorption layer, meanwhile, the defects are low, trap auxiliary tunneling current is reduced, dark current is reduced, and full coverage of 1550-2000 nm can be achieved through the design of stacking the long-wave light absorption layer and the short-wave light absorption layer.

The embodiment of the invention relates to a simulation method for a semiconductor device, electronic equipment and a storage medium. The method comprises the following steps: discretizing barrier-related parameters based on a predetermined range and step length of the predetermined barrier-related parameters to generate a plurality of first data points; and determining a transmission coefficient corresponding to each of the plurality of first data points, where the transmission coefficients include a first transmission coefficient corresponding to a first barrier cell having a constant barrier height and a second transmission coefficient corresponding to a second barrier cell having a linearly varying barrier height. According to the embodiment of the invention, the barrier transmission coefficient can be efficiently and accurately calculated for barriers in any shape, the calculation efficiency of the tunneling current is improved, the calculation amount is further reduced, and the cost is saved.

The application discloses a gallium nitride temperature sensor and a preparation method and application thereof. The gallium nitride temperature sensor comprises a gallium nitride layer, a tunneling layer, a cathode and an anode, the tunneling layer is arranged on at least a part of the surface of the gallium nitride layer, and an electrode hole is arranged on the tunneling layer; the cathode is arranged in the electrode hole and is in contact with the gallium nitride layer; and the anode is arranged on a part of the surface of the tunneling layer, and the anode is not in contact with the cathode. The temperature sensor adopts a new type of metal-tunneling layer-gallium nitride structure, utilizes the principle that the probability of carrier tunneling through the tunneling layer increases after being excited by heat, that is, the thermal tunneling effect, detects the size of the tunneling current to realize temperature detection and sensing, and has the advantages of high temperature resistance, high linearity and high sensitivity, and can better meet the temperature measurement requirements of application scenes such as high power and high temperature.

To provide a device allowing a sample to easily enter a sample measurement flow path in which measurement electrodes are disposed.SOLUTION: A device used for measuring a tunnel current includes: a base material; a flow path formed in the base material; and a pair of measurement electrodes for measuring a tunnel current when a sample passes. The flow path includes: a sample supply flow path; a sample measurement flow path in which measurement electrodes are disposed; a first taper flow path that is disposed between the sample supply flow path and the sample measurement flow path, and allows flow path width to become narrower toward the sample measurement flow path from the sample supply flow path; and a sample collection flow path for collecting a sample that passes the sample measurement flow path. The width of a connection part between the first taper flow path and the sample measurement flow path ranges from 20 nm to 200 nm.SELECTED DRAWING: Figure 1A

The application discloses a gate tunneling current model for simulating a gate tunneling current of a semiconductor device; the gate tunneling current of the gate tunneling current model is formed by multiplying a main function by a first function; the first function is a function formed by active region environment parameters of the semiconductor device and used for simulating the influence of the active region environment on the gate tunneling current. The application further discloses an extraction method of the gate tunneling current model. The application can simulate the influence of the active region environment on the gate tunneling current of the device, thereby improving the model fitting precision and being beneficial to designing a more reasonable layout.

The application provides a hybrid conduction mechanism surrounding gate transistor, which comprises a surrounding gate MOSFET device, a second source region and a second drain region; the surrounding gate MOSFET device comprises a substrate, a first source region and a first drain region; the first source region and the first drain region are doped with first ions; the second source region is formed between the substrate and the first source region, the second drain region is formed between the substrate and the first drain region, and the height of the second source region and the second drain region is not lower than the height of the substrate between the first source region and the first drain region; the second drain region is doped with the first ions, and the second source region is doped with second ions. The technical scheme solves the problem of bottom parasitic channel current leakage of the surrounding gate MOSFET device, and by additionally arranging the second source region and the second drain region, a tunneling field effect transistor (TFET) device structure is connected in parallel at the bottom of the traditional surrounding gate MOSFET device, so that the surrounding gate channel diffusion drift current and the bottom channel band-to-band tunneling current are hybridly conducted, and better super-steep switching characteristics are obtained.

The invention provides a Schottky diode temperature sensor based on an aluminum gallium nitride heterojunction and a preparation method thereof, and relates to the technical field of temperature sensors, the Schottky diode temperature sensor comprises a substrate, and a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer which are laminated on the substrate; the first groove penetrates through the cap layer and extends into any one of the barrier layer, the insertion layer and the channel layer; the dielectric layer is laminated on the cap layer and extends into the first groove; the second groove is formed in the first groove, penetrates through the dielectric layer, the cap layer, the barrier layer and the insertion layer and extends into the channel layer; the anode is filled in the second groove and covers a partial region of the dielectric layer; and the cathode groove is formed in the dielectric layer, and the cathode groove is filled with a cathode. According to the invention, the second-order groove is formed near the anode through local etching, and the tunneling current is reduced through thinning the barrier layer, so that the conduction of the device is more in line with a thermal emission model, and the temperature sensitivity is greatly improved.

The present application relates to a kind of non-scanning single-photon polarization three-dimensional imaging method, comprising: constructing pulse laser echo photon number calculation model: pulse laser emits laser pulse, after each light pulse is irradiated to target, the photon number of return to single-photon avalanche photodetector each pixel is related to detection distance;Construct single-photon detector signal and noise model: signal photon and background photon are incident on the photosensitive surface of detector to complete photon injection, based on the quantum efficiency of detector, photoelectric conversion is generated echo electron and canister noise electron, noise electron is generated by thermal current, tunneling current, then carries out electric injection, then based on avalanche probability, avalanche multiplication is completed, and finally, the signal is read out through avalanche signal detection;Construct polarization modulation laser radar ranging model, improve target polarization three-dimensional imaging distance.

A fin field-effect transistor device with hybrid conduction mechanism, including a fin field-effect transistor, a second source region, and a second drain region; the fin field-effect transistor includes a substrate, a fin channel region, a first source region, and a first drain region; the height of the second source region is not lower than the height of the substrate between the first source region and the first drain region; the first source region the first drain region and the second drain region are doped with first ions; the second source region is formed between the substrate and the first source region, the second drain region is formed between the substrate and the first drain region, the second source region is doped with second ions. This scheme can realize hybrid conduction of fin channel diffusion drift current and bottom channel band-to-band tunneling current, thus obtaining better ultra-steep switching characteristics.

The application provides a silicon-based transistor channel temperature measuring device and method, and relates to the technical field of temperature measurement. The measuring device comprises: a superconducting coil, which is used for providing a magnetic field for a transistor to form two spin state energy levels; a low-temperature thermostat, which is used for providing a low-temperature environment for the transistor, and in the low-temperature environment, a first ratio of particle population numbers on the two spin state energy levels satisfies a Boltzmann distribution related to a temperature value of the channel; a tunable laser module, which is used for generating a first laser in a near-infrared wave band; a current processing module, which is used for collecting a tunneling current; a processor, which is used for determining a photoionization signal strength; based on the photoionization signal strength, a second ratio of probabilities of photoionization events occurring on the two spin state energy levels is determined; based on the second ratio, the first ratio is determined; and according to the Boltzmann distribution and the first ratio, the temperature value of the channel is obtained.

The invention discloses a DNA modification and positioning method based on quantum dots, and relates to the technical field of DNA sequencing, and the method comprises the following steps: S1, combining CdSe quantum dots at the tail end of DNA to form a DNA and quantum dot compound; s2, enabling the DNA and quantum dot compound to pass through a nanopore of a nanopore detection system under the driving of an electric field, and collecting a tunneling current signal in real time by utilizing a current amplifier of the nanopore detection system; s3, performing filtering and noise reduction processing on the acquired tunneling current signal to obtain a processed current signal; s4, the processed current signals are subjected to feature recognition, the current base type and a recognition result are obtained, and the recognition result is recognition accuracy or recognition inaccuracy. According to the invention, the signal-to-noise ratio of single-base identification is improved, and the accuracy and stability of base identification are improved.

The invention discloses a ferroelectric transistor read-write method with high durability and high current reliability. A used ferroelectric transistor comprises a P-type doped semiconductor substrate, an N-type doped source electrode, a P-type doped drain electrode, a ferroelectric gate stack and a control gate. Corresponding level or floating operation is applied to the source electrode, the drain electrode and the control gate respectively in the write-in and read-out operation processes. The source electrode is floated in the writing process, so that excessive electron trapping is avoided, electrons required by ferroelectric flipping are provided by utilizing a band-to-band tunneling mechanism at the drain electrode, the increase of interface traps is reduced, and the durability is improved. In the read-out stage, the band-to-band tunneling current at the source electrode is used for reading out, and the current is not influenced by an interface state generated at the drain electrode in the writing process, so that excellent current reliability is obtained. The method does not involve the change of the gate stack material and structure of the ferroelectric transistor, does not need to introduce additional recovery cycle and corresponding area and delay cost, and is high in practical value.

The application discloses a diode based on a p-type nickel oxide-silicon nitride insulating layer-n-type gallium oxide structure and a preparation method, and mainly solves the problem of poor application effect of a Schottky diode under a large power in terms of a forward current density and a reverse breakdown voltage. The diode comprises, from bottom to top, a cathode ohmic metal layer, a heavily doped gallium oxide substrate, a lightly doped epitaxial layer gallium oxide and an anode metal, wherein a silicon nitride insulating thin layer and a p-type nickel oxide layer are additionally arranged between the lightly doped epitaxial layer gallium oxide and the anode metal. The silicon nitride insulating thin layer and the p-type nickel oxide layer change the energy band structure between the n-type gallium oxide and the p-type nickel oxide, so that a larger tunneling current is generated between the n-type gallium oxide and the p-type nickel oxide, and the forward current density and the reverse breakdown voltage of the device are increased. The actual measurement shows that the forward current density of the device is increased by 616%, and the reverse breakdown voltage is increased by 102%, and the device can be used in a large power working environment with a large current density and a high breakdown voltage.

The present application provides a semiconductor structure and a method for forming the same. The semiconductor structure includes: a semiconductor substrate including a first region and a second region and an isolation structure isolating the first region from the second region; a gate structure located on the semiconductor substrate in the first region and the second region; a first spacer located on the sidewalls of the gate structure; a source and a drain located in the semiconductor substrate on both sides of the gate structure, wherein the first region also includes a lightly doped source extending below the first spacer on the source side of the first region; and a second spacer located on the sidewalls of the first spacer on the drain side of the first region and the sidewalls of the first spacer in the second region. The semiconductor structure and method for forming the same described in the present application can improve the bipolar effect of a TFET device, increase the tunneling current of the device, and improve device reliability.